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Full text of "icMaster :: 1983 IC Master Volume 2"

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,.luUCTOR NITRON OKI SEMICONDU J. . 

SIGNETICS SILICONIX SOLID STATE MICRO S1mv., 

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JJITSU AMERICA FUJITSU MICROELECTRONICS GENERAL INSTRUMM 
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■TORS ^AUSTRALIA A J DISTRIBUTORS PTY LTb AUSTRIA LBG GMBH 
"NGLAND PATERSON/STEADMAN & PARTMER LTD J B TRATSART 

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•FORMATION COMMUNICATION CbRP NORWAY i^" 
pPAIN SAGITRON SWIT2ERLAND W 9^ 
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Engineering design begins with the IC MASTER 



$95.00 



J 



8000 PPM I 



7000 PPM I 



6000 PPMi 



5000 PPM 



4000 PPM I 



3000 PPM I 



2000 PPM I 



1000 PPMI 

500 PPM I 
250 PPM I 
OPPMi 



NATIONAL SEMICOWDUCTOR 
WORLDWIDE OUTGOING !C 
ELECTRICAL DEFECT PROCESS 
AVERAGE (PARTS PER MILLION) 



6/78 



6/79 



6/80 



T 

6/81 






1980, WE REJECTED 
ACCEPTABLE QUAUTY 
LEVELS OTHERS STILL 
ACCEPT TODAY. 



AUGUST 1982 
189 PPM 



6/82 



At National Semiconductor, 
we take rejection very personally. 

That's why we moved so 
dramatically towards zero defects 
during the last four years. 

All the way from 8,000 parts- 
per-million in September, 1978 to 
a remarkably low 189 parts-per- 
million in August, 1982. A truly 
astounding 4,100% improvement. 

We've made a corporate com- 
mitment to achieve the highest 
productquality in the industry. And 
that means all our people, from 
top management to the loading 
dock, consider quality the highest 
priority for all our products. 

What's more, as the industry 
leader in advanced CMOS, we 
feel even more compelled to 
demonstrate the quality of our 
CMOS parts. 

For example, take our new 



NSC800 microprocessor. It 
started out with a better than aver- 
age AQL and today stands at a 
level below 100 parts-per-million. 

That's an especially impres- 
sive number for a complex new 
product coming off a new fabrica- 
tion line. But only the beginning 
of our goals for all our advanced 
CMOS products. 

To help achieve these goals, 
we've set up systems to ensure 
optimum quality all the way from 
design and manufacturing through 
shipment. These systems have a 
single purpose: to keep us moving 
toward zero defects. 

We won't settle for less. 

No matter what others are 
willing to settle for. 



Making CMOS do more. 



^ National Semiconductor 



GET HIGH nCHNOlOGY 
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3M 

Mostek 

Motorola 

National 

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RCA 

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Sprague 

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AMD 

Allen-Bradley 
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Schweber is the high technology leader in distribution. Our technology centers are located nationwide. Staffed 
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SCHWEBER ELECTRO'NICS CORPORATION 




SCHWEBER 
ELECTRONICS 



1983 




VOLUME II 




CONTENTS 

VOLUME I 



© IC MASTER 1983 



Introduction to IC MASTER 


3 


Advertisers' Index 


8 


Master Selection Guide (Function) Index 10 


Part Number Index 


34 


Part Number Guide 


198 


Logo Guide 


218 


Application Note Directory 


227 


Military Parts Directory 


350 


Testing 


355 


Cross Reference 


356 


QPL Selection Guide 


362 


Digital Devices 


444 


Microprocessors 


1042 


Selection Tables 


1048 


System Components 


1085 


Microprocessor Development Systems 1606 


Microcomputer Boards 


1750 


Support Board Index 


1770 


Advertisers' Product Index 


1985 


Alternate Source Directory 


2065 


Manufacturers and Distributors 


2301 


Directory 




VOLUME II 




Introduction to IC MASTER 


2403 


Advertisers' Index 


2408 


Interface Devices 


2410 


Linear Devices 


2882 


Memory Devices 


3448 


PROM Programmers 


4000 


Custom/Semicustom Devices 


4108 


2401 



VOLUME 11 



1983 




Engineering design begins with the IC MASTER 



Publisher, Jerry Eimbinder 

Associate Publisher, James W. Graham 

Editorial Director, Frank Egan 

Editor, Dave Howell 

Assistant Editor, Gail LoBue 

Assistant Editor, Kathy Schmidt 

Technical Editor, Paul Seamon 

Production Director, Dan Chillak 

Typographical Consultant, Joe Finazzo 

Circulation Manager, Garry Mayes 

Coordinator, Joanne Hill 

Manager, Catalog Production, Lanny Levin 

Catalog Design Director, Michelle Arnold 

Catalog Design Assistant, Bill Hennessey 

Art/Production Supervisor, Charlotte Newman 

Art Staff, Edith Cyran, 
Carol Hansen, Mary Koczanowski 

Production Manager, Martha Gaska 

Production Assistant, Brenda Buff 

Marketing Services Manager, Georgeann Johnson 

Sales Administration Supervisor, 
Addle Bislgnano 

Sales Billing Supervisor, Aline Lewin 

HEARST BUSINESS COMMUNICATIONS, INC./ 

UTP DIVISION 

President, Manley R Ludwig 

Vice President, Theodore Breuer 

Vice President, Robert J. Males 

Chairman, Executive Committee, 
Arthur I. Rabb 

HEARST BUSINESS COMMUNICATIONS, INC. 

President, Robert J. Males 

THE HEARST CORPORATION 

President, Frank A. Bennack, Jr. 

Chairman, Randolph A. Hearst 

Group Vice President, Books and Business Publishing, 

Gordon L Jones 

Publishing Consultant, Richard E. Deems 

HEARST BUSINESS COMMUNICATIONS, INC./ 

UTP DIVISION 

East Coast: 

645 Stewart Avenue 
Garden City, NY 11530 
Tel: (516) 222-2500 TWX: 510-222-1673 (UTP GRCY) 

West Coast: 
1333 Lawrence Expressway, Suite 101 
Santa Clara, CA 95051 
Tel: (408) 248-8044 TWX: 910-338-0272 

IMPORTANT NCmCE 

Considerable effort has been expended to make IC MASTER accurate and 
complete, but IC AMSTER cannot assume responsibility for inaccuracies, 
ommisions. manufacturers' claims, or their representations. No portion of 
this txxjk may be reproduced without express written permission of the 
publisher. © IC rMSTER, solely owned by Hearst Business Communica- 
tions Inc/UTP Division, 1983. 




2402 



CMOS Static RAM (Integrated Device Technology Photo) 



© IC MASTER 1983 



IMPORTANT FEATURES OF YOUR 
IC MASTER 



ONE COMPLETE SOURCE 

IC MASTER is the original and only complete 
guide to currently available integrated circuits, 
microcomputer boards, development systems. 
PROM programmers, gate arrays, and other re- 
lated components of concern to the design engi- 
neer. It has become the first place to look in the 
critical selection of ICs, boards, systems, and 
equipment. If only one device can fit the require- 
ments of a new design or if hundreds are avail- 
able, you can find out in seconds by using the IG 
MASTER. 



EASY TO USE 

The IC MASTER saves you time. No longer do you 
have to spend long, tedious hours and days 
searching through manufacturers' catalogs and 
data sheets for information. The MASTER gives 
you — at your fingertips — an easy way to narrow 
your IC choices quickly accurately and system- 
atically with the knowledge that you have just 
surveyed the entire industry 



PART NUMBER INDEX 

This revolutionary index lists all device types 
made by over 225 manufacturers in numerical 
sequence excluding prefixes or suffixes. You can 
find a device number even though you do not 
know either the full part number or even the 
manufacturer. Once a basic device number is 
located in the index, you can obtain instant iden- 
tification of all manufacturers making a device by 
that number, regardless of function, and deter- 
mine the full part number designation. All page 
references to data sheet material and any existing 
application note abstracts are also provided. The 
Part Number Index should not be used as an 
alternate source directory because two manufac- 
turers may use the same part number, by coinci- 
dence, for totally different devices. 



PART NUMBER GUIDE 

The information in this guide allows you to break 
down each company's part numbering system 
into product temperature ranges, packaging vari- 
ations, and functions. It is an invaluable tool for 
the elimination of costly and time-consuming 
ordering errors caused by lack of standardization 
from manufacturer to manufacturer in part num- 
bering systems. 



APPLICATION NOTE 
DIRECTORY 

Application note descriptions are arranged al- 
phabetically by function and application cate- 
gory Each note's description identifies the spe- 
cific device or devices featured, provides a 25 to 
30 word abstract, and identifies both the man- 
ufacturer that originated the note and the specific 
application note number. This section provides all 
the information necessary for you to update your 
application note files speedily or thoroughly re- 
search the existence of application note material 
for a specific design problem. 



MILITARY PARTS DIRECTORY 

Cross reference chart identifies all IC devices hav- 
ing received JAN qualification. This chart in- 
cludes a cross reference listing of device numbers 
and corresponding military standard 38510 slash 
numbers and vice versa. 



MILITARY DEVICE 

TESTING TABLE 

This table identifies IC manufacturers who test to 
military standard 38510 and the screening to mili- 
tary standard 883 that they provide. 



MILITARY PARTS INDEX 

This guide to JAN qualifed parts makes it possible 
to search devices by function, and to determine if 
a JAN qualified part exists for a particular func- 
tional need. 



ADVERTISERS' PRODUCT 
INDEX 

This index directs the reader to detailed product 
information for the parts whose manufacturers 
have included data sheets in IC MASTER. When 
you are looking for data on a particular manufac- 
turer's products, this index provides the fastest 
way to find the information you seek. 



ALTERNATE SOURCE 
DIRECTORY 

The most comprehensive industry-wide, pin-for- 
pin, functional equivalent Alternate Source Direc- 
tory ever compiled. This directory is updated by 
asking all IC manufacturers to identify each com- 
petitive device for which they make a pin-for-pin 
substitute. 



MASTER SELECTION GUIDE 

Each guide is organized by specifications and 
categories to direct the reader easily and quickly 
to the device most likely to fill the requirements of 
a particular application. Once the reader finds 
those devices that are closest to his needs, he 
sees available sources, and is directed to addi- 
tional data if provided by advertisers. 



MANUFACTURERS AND 

DISTRIBUTORS DIRECTORY 

Locations and phone numbers are given for man- 
ufacturers' field sales offices, representatives, and 
distributors, both domestic and international. 



MASTER 
SELECTION 
GUIDE INDEX 

pg. 10 



PART 
NUMBER 
INDEX 

pg-34 



PART 
NUMBER 
GUIDE 

pg. 198 



APPLICATION 
NOTE 
DIRECTORY 

pg. 227 



© IC MASTER 1983 



2403 




• Find All Products That Meet Desired Specifications 

• Obtain Data For A Particular Device • Decode Part Numiiers 

• Determine Alternate Sources • Plus Mucii More 



An engineer can use IC MASTER to solve a wide variety 
of problems. Answers provided to engineers by IC 
MASTER can range from finding the device that best 
meets a particular set of specifications to helping to 
determine which family of devices should be used in 
building a system. 

Some of the typical problems that IC MASTER can solve 
are illustrated in the following examples; 



Who makes a TTL 4-bit binary full-adder 
with look-ahead carry? 

All functions are listed, in alphabetical order, in the 
Master Selection Guide Index. In this case, the engineer 
looks under adders; in the column adjacent to adders, 
he sees that all types of adders are listed. The particular 
adder being sought is covered in the Digital section of IC 
MASTER. 

Now that the engineer knows that the devices he 
seeks are catalogued in the Digital section, he can turn 
to the Digital Master Selection Guide and see the page 
number where information on these devices can be 
obtained. 

When he turns to this page, he will notice that certain 
device numbers and manufacturers are printed in bold 
face type while others appear in regular type face. Bold 
face type is used whenever a part's manufacturer has 
provided a data sheet for the device in IC MASTER. The 
page number assigned to the data sheet also appears in 
bold face type so that the engineer can turn to it directly 



Who Makes a High-Speed 12-Bit, Analog- 
to-Digitai Converter With Guaranteed ±¥2 
LSB Linearity and 13-fji^ec or Faster Con- 
version Time? 

Many manufacturers make devices that meet these 
specifications including Analog Devices, Burr-Brown, 
Datel-lntersil, Data Device Corp., Harris, Hybrid Systems, 
Micro Networks, and Teledyne Philbrick. 

The Master Selection Guide for Interface makes it 
possible for an engineer to find every device that meets 
the above specifications, regardless of who makes it, in 
seconds. 

The Interface section is organized by product classi- 
fication; an engineer can turn immediately to the cate- 
gory of interest such as analog switches with drivers, 
multiplexers, a/d converters with binary output a/d con- 
verters with decimal output, d/a converters, display driv- 
ers, error checking circuits, keyboard encoder-decoders, 
line drivers, line transceivers, memory and peripheral 
drivers, sense amplifiers, etc. 

To find every 12-bit analog-to-digital converter with 
guaranteed ± V2 LSB linearity and 13-fjLsec or faster con- 
version time, all an engineer has to do is turn directly to 
the analog-to-digital converter section of the Interface 
Master Selection Guide. 

In this section, devices are organized by key param- 
eters. Under resolution, the engineer finds 12-bit; next he 
looks under linearity error for ± V2 LSB and then he looks 
under conversion time for devices with 13-fxsec or faster 
specifications. 




2404 



© IC MASTER 1983 



Ways to Use IC Master 



What application notes are available on 
emulating logic functions with PROMs? 

IC MASTER provides the most complete listing of 
application notes available in print. It is easy to find the 
right application notes by looking in IC MASTER be- 
cause the application note directory is organized by 
function. 

There are two ways to look up an application note. An 
engineer can turn to the index page and find the appro- 
priate function or category such as instrumentation am- 
plifiers, multiplexers, or PROMs. 

If he knows the device number, he can look it up in 
the part number index at the front of IC MASTER and see 
all of the application notes concerning that device. For 
example, under 8275, a . programmable CRT controller 
listed in the part number index, the reader is referredi to 
the listing for an Intel application note entitled "CRT 
Terminal Design Using the 8275 and 8279." 

To find an application note concerning the use of 
PROMs to emulate logic functions, the engineer can 
turn to the application note section on PROMs and see 
what notes can be of help. 

Each listing in the application note directory provides 
a detailed descriptive passage for the note, gives its 
length and identifies the manufacturer who publishes it. 



\X^o makes a 64K dynamic RAM with an 
access time of 120 ns or faster? 

The Memory Section in IC MASTER has a Master 
Selection Guide which provides initial selection infor- 
mation and data on PROMs, RAMs, ROMs and other 
types of memories. Each device is characterized by orga- 
nization (words and bit/word) and access time. 

For example, if an engineer was looking for a 64K 
dynamic RAM, his first step would be to determine 
organization (words and bit/word). Next, he would lo- 
cate the desired access time. 

When devices are available made by various proc- 
esses such as NMOS, CMOS, ECL TTL, etc., the engineer 
can choose the device that best suits his needs. For 
further definition, output type, supply voltage and num- 
ber of pins are listed along with the manufacturer's part 
number and name. 

The engineer's next step in his memory selection 
process would be to study the applicable data for 64K 
dynamic RAMs provided by IC manufacturers and pick 
the most appropriate device. Literally hundreds of pages 
of engineering data on memories appear in IC MASTER. 




PBOUt 

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»m!7S21. »»"f'? l"?,!!; »m275J9. »".fS30. 

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IV PROMS 



1,3417. 93427. 93436 ""'-1" , M.cnMS tKO»."'™'9 
p'lwchHd AN 333 



, „^ na CDf 1»U« IMO" 

BCA lC»N-«925 (•KOl 

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t>»«cnt*S t«v»»' 
PBOM» 



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SC/MP LCDs to prtV*'" 



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Sum**"""" 




® IC MASTER 1983 



2405 



Ways to Use IC Master 



I need to choose between a full custom or 
a semi-custom/gate array solution to my de- 
sign problem. 

To help designers weigh custom solutions against 
semi-custom/gate array approaches, IC MASTER pro- 
vides a Master Selection Guide on Custom/Semi- 
Custom and a special section entitled "Options for 
Going Custom." In this section, the advantages and 
disadvantages of various custom/semi-custom tech- 
niques are covered. 

The capabilities of IC manufacturers are tabulated for 
easy comparison; additional information such as avail- 
able design aids and testing services is also provided. 

My application requires microcomputer 
boards. How do I start? 

Single and multiple board microcomputers are ar- 
ranged by manufacturer. Under each manufacturer, 
boards are grouped in sequence according to data word 
size and, within that grouping, according to the micro- 
processor on which they are based. Hardware and soft- 
ware support are listed for each board. 

A supplementary selection guide is included for mi- 
crocomputer support boards. The boards are grouped 
according to supported computer systems. 



\X^th so many mircoprocessors available, 
where do I begin? 

Simply turn to the Master Selection Guide for Micro- 
processors. There you will find a listing of all micro- 
processors currently available and key parameters al- 
lowing you to narrow down your selection to a range of 
products that will meet your major requirements. 

Once the microprocessor that best fits the application 
has been chosen, the next step is to go to the "system 
components" section. Here all of the available pe- 
ripheral devices that work with each microprocessor are 
arranged by function. Thus, if the microprocessor that 
has been selected is the 8048, system components spe- 
cifically developed for use with the 8048 are listed, 
organized by function. 

A "general purpose" section follows the "system 
components" section and describes devices that can be 
used with more than one microprocessor family 

Finally, hundreds of pages of the latest micro- 
processor data sheets, provided by IC manufacturers, are 
presented, arranged in alphabetical order by manufac- 
turer. Each data sheet is easily found thanks to bold- 
faced page-number references in the Master Selection 
Guide. 




2406 



© IC MASTER 1983 



Ways to Use IC Master 




If an engineer knows that the basic part 
number is 6508, where does he foolc first? 

The place to look is the part number index. Here, all of 
the prefixes and suffixes have been stripped ^way to 
leave only the basic number. This makes it possible to 
see the manufacturer of every part with the same base 
number at a glance. Parts with the same base number, it 
should be kept in mind, are not necessarily identical; in 
fact, one could be a memory while another might be a 
\\ne3t'[ device. (To find replacements, one should look in 
the alternate source directory, not in the part number 
index.) 

Under 6508, the engineer would see a number of 
devices listed and the page and line numbers where 
data is given for each of the devices. If an application 
note concerning any of the devices is available, the 
location of its listing is also shown. 



I design to military specs. 
Where can I find the latest QPL devices? 

The IC MASTER includes a comprehensive military 
parts directory. Within this directory, tables and charts 
are provided to answer virtually every information need 
of the engineer involved in military or high-reliability 
equipment design. 

All integrated circuits with JAN qualification are listed 
in IC MASTER. A cross reference table, relating device 
numbers to mil spec numbers, is arranged according to 
device number. A second table, arranged by M-385I0 
number, makes it possible to look up the part number 
when the mil spec number is known. 

In addition, ICs are also organized by product section 
and function, which allows the user to find the proper IC 
without having to know either the commercial or the 
military part number. 

This section of IC MASTER also includes a table show- 
ing the capability of manufacturers to perform MIL- 
STD-883 screening and high-reliability testing. 



© IC MASTER 1983 



2407 



ADVERTISERS 

INDEX 



2408 



Advanced Micro Devices 

Digital 601-617 
Microprocessor 1201-1246 
Microprocessor Development Systems 



170I-I705 



Microcomputer Boards 1901-1910 

Interface 2601-2608 

Linear 3101-3137 

Memory 3601-3607 

American Automation 

Microprocessor Development Systems 1 706 

American IVIicrosystems, Inc. 

Digital 618 

Microprocessor 1247-1252 

interface 2609-2611 

Linear 3138-3150 

Memory 3608-3614 

Custom/Semicustom 4301-4308 

Analog Devices 

Linear 3151-3186 

Arrow Electronics 

357.1720,2300 

Burr-Brown 

1984 

California Devices 

Custom/Semicustom 4309 
Computer Aided Engineering 
Custom/Semicustom 4310 
Creative Micro Systems 

Microcomputer Boards 1911-1912 
Cromemco 

Microcomputer Boards 1913-1932 
Custom MOS Arrays, Inc. 
Custom/Semicustom 4311 
Datel-lntersii 

Microcomputer Boards 1933 
Interface 2613-2623 
Digeiec 

PROM Programmers 4101 
Diplomat Electronics Corp. 

Manufacturers and Distributors Directory 
Emulogic 

Microprocessor Development Systems 1 708- 1 709 

Exar Integrated Systems, Inc. 

Linear 3187-3209 

Custom/Semicustom 4312-4315 

Fairchild 

Digital 619-668 

Microprocessor 1253-1304 

Microprocessor Development Systems 1711-1718 

Memory 3615-3666 

Custom/Semicustom 4316-4317 

Fujitsu America 

Memory 3668-3671 

Fujitsu Microelectronics 

Microprocessor 1305-1308 

Memory 3672-3681 

Custom/Semicustom 4318-4320 

General Instrument 

Microprocessor 1309-1332 

Memory 3683-3692 

Harris Semiconductor 

Digital 669-695 

Microprocessor 1333-1344 

Interface 2624-2742 

Linear 3210-3291 

Memory 3693-3788 

Custom/Semicustom 4321-4430 

Hiievel Technology 

Microprocessor Development Systems 1719 



© IC MASTER 1983 



Hitachi America 

Microprocessor 1345 
Memory 3789 
Hoit, Inc. 

Custom/Semicustom 443 1 
Hybrid Systems Corp. 
interface 2743-2748 
Inmos Corp. 
Memory 3790-3792 
Integrated Device Technology 
Memory 3793-3807 
Intel 

Microprocessor 1347-1350 

Microprocessor Development Systems 1 72 1 - 1 728 

Memory 3808-3825 

Interdesign, Inc. 

Custom/Semicustom 4433 

International Microelectronic Products 

Custom/Semicustom 4435 

Kontron Electronics 

PROM Programmers 4103 

LSI Computer Systems, Inc. 

Digital 696 

Custom/Semicustom 4436 
Micro Circuit Engineering 
Custom/Semicustom 4437-4440 
Micro Power Systems 
Military 401 
Interface 2749 
Linear 3292 
Mitel Semiconductor 
Digital 697-714 
Monolithic Memories, Inc. 
Digital 715-728 
, Memory 3826-3838 
Custom/Semicustom 4442-4478 
Motorola Semiconductor 
Digital 729-733 
Microprocessor 1 35 1 -1360 
Microprocessor Development Systems 1 729- 1 738 
Microcomputer Boards 1935-1945 
Interface 2750-2761 
Linear 3293-3298 
Memory 3839-3849 
Custom/Semicustom 4479-4480 
National Semiconductor 
Military 402-405 
Digital 729-733 
Microprocessor 1361-1456 
Microcomputer Boards 1 946- 1 955 
Interface 2762-2771 
Linear 3299-3345 
Memory 3850-3871 
Custom/Semicustom 4481-4499 
OKI Semiconductor 
Memory 3872-3873 
Oliver Advanced Engineering 
PROM Programmer 4104 
Optical Electronics 
Linear 3346-3347 
Plessey Semiconductors 
Custom/Semicustom 4501-4516 
RCA 

Military 406-409 
Digital 739-760 
Microprocessor 1457-1491 
Microcomputer Boards 1956-1961 
Linear 3348-3371 

® IC MASTER 1983 



Memory 3874-3881 

Custom/Semicustom 45 1 7-452 1 

Schweber Electronics 

349, 2064,\/olume II opp. page 2401, 

Seeq Technology, Inc. 

Microprocessor 1492-1500 

Memory 3882-3896 

Semi Processes Inc. 

Digital 761-771 

Signetics 

Military 410-423 

Digital 773-810 

Microprocessor 1501-1525 

Microprocessor Development Systems 1 739- 1 746 

Microcomputer Boards 1 962- 1 979 

Interface 2772-2778 

Linear 3372-3421 

Memory 3897-3939 

Custom/Semicustom 4522-4526 

Silicon Systems 

Custom/Semicustom 4528-4529 
Siiiconix 

Interface 2779-2842 
Sprague Electric 
Interface 2843 
Stag Microsystems 

PROM Programmers 4105 
Structured Design 
PROM Programmers 4106 
Sunrise Electronics 

PROM Programmers 4107 

Synertek 

Military 424-432 

Microprocessor 1526-1550 

Microprocessor Development Systems 1 747 

Microcomputer Boards 1980-1983 

Memory 3940-3957 

Custom/Semicustom 4531-4537 

TRW LSI Products 

Digital 812-819 

Linear 3438-3442 

Teledyne Semiconductor 

Interface 2845-2854 

Texas Instruments 

Military 433-443 

Digital 821-1034 

Microprocessor 1552-1564 

Microprocessor Development Systems 1 748- 1 749 

interface 2855-2868 

Linear 3422-3437 

Memory 3958-3980 

Custom/Semicustom 4539-4560 

Unltrode Corporation 

Linear 3444-3446 

VTI 

Memory 3981-3993 
Custom/Semicustom 4561-4562 
Weltei< 

Digital 1036-1041 
Western Digital 

Microprocessor 1566-1579 
Interface 2869-2880 
Memory 3994-3997 
Custom/Semicustom 4563-4564 
Xicor 

Memory 3998-3999 
Zliog 

Microprocessor 1581-1604 

2409 



INTRODUCTION 
TO INTERFACE 



The Master Selection Guide provides sufficient informa- 
tion for making initial product selections. All devices that 
appear in this section, both in the initial selection guide 
and the data pages, are included in all indexes. These 
index listings lead to the page and line on that page 
where each device appears. 

In the Interface Section the selection parameters differ 
drastically for each category; therefore each has its own 
format. The analog to digital converter category has two 
formats: one for binary output devices and another for 
decimal units. Some of the products in this section, primar- 
ily analog to digital and digital to analog converters, may 
be hybrids; the hybrids listed are only those packaged to 
be compatible with ICs. 

This section is not complicated by reference to package 
styles; the package style suffixes are usually deleted. For 
more information on each companies' suffixes, see the 
Part Number Guide. Throughout the Master Selection 
Guide, each full military temperature range (-55°C to 
125°C) device is indicated by a (f) before the manufac- 
turer's name. Manufacturers' names are normally spelled 
out; however, a few are abbreviated and the abbrevia- 
tions are explained on page 2612. 



CATEGORY 




Analog Switches 




Switches with Drivers 


2415 


Switches without Drivers 


2421 


Drivers 


2422 


Multiplexers 


2423 


Analog to Digital Converters 




Binary Output 


2426 


Decimal Output 


2438 


Digital to Analog Converters 


2439 


pisplay Drivers 


2463 


Error Checking Circuits 


2467 


Keyboard Encoders 


2468 


Line Circuits 




Drivers 


2469 


Receivers 


2473 


Transceivers 


2476 


Memory and Peripheral Drivers 


2481 


Sense Amplifiers 


2486 


Serial Transmitters-Receivers 


2487 



Detailed Product Information 
provided by: 

Advanced Micro Devices 2601 
American Microsystems, Inc. 2609 
Datel-lntersil 2613 
Harris Semiconductor 2624 
Hybrid Systems, Inc. 2743 
Micro Power Systems 2749 
Motorola Semiconductor 2750 
National Semiconductor 2762 
Signetics 2772 
Siliconix 2779 
Sprague Electric 2843 
Teledyne Semiconductor 2845 
Texas Instruments 2855 
Western Digital 2869 
The manufacturers listed above have provided de- 
tailed information on their latest and most significant 
products. 



2410 



© IC MASTER 1983 



EINFilHRUNG 
INTERFACE - 
SCHALTUNGEN 

Der Master Selection Guide fiir Interfaceschaltungen 
enhalt alle Informationen, die Sie fiir die Erstauswahl 
Ihres Produkts benotigen. Die Bauteile, die in diesem 
Abschnitt erscheinen, sowohl im Selection Guide als 
auch auf den Datenblattern, sind in alien Master In- 
dexes enthalten. Diese Register verweisen auf die 
Seite und Zeile, auf der das entsprechende Bauele- 
ment vorkommt. 

Im Interface-Teil unterscheiden sich die Auswahl- 
Parameter drastisch fiir jede Kategorie; daher hat 
jede ihre eigene Tabelle. Fiir Analog-Digital-Wandler 
gibt es zwei Tabellen: eine fiir Bauteile mit Binar- 
Ausgang und eine weitere fiir Dezimal-Bauteile. 
Einige Produkte in diesem Teil, hauptsachlich Ana- 
log-Digital und Digital-Analog Wandler, konnen hy- 
bride Bauelemente sein. Es werden nur solche 
hybriden Bauteile aufgefiihrt, deren Gehause kom- 
patibel zu ICs sind. 

Dieser Abschnitt wird nicht durch Hinweise auf 
Gehauseformen kompliziert. Die entsprechenden 
Suffixe sind meistens weggelassen. Weitere Informa- 
tion iiber die Suffixe jedes Herstellers erhalten Sie iiber 
das Numerische Typenverzeichnis. Im ganzen Master 
Selection Guide sind alle Bauteile mit militarischem 
Temperaturbereich ( — 55 °C bis 125°C) durch ein 
Kreuz (t) vor dem Namen des Herstellers gekenn- 
zeichnet. Die Namen der Hersteller sind normaler- 
weise ausgeschreiben; einge jedoch sind abgekiirzt. 
Die Abkiirzungen werden auf S. 2612 erklart. 



© IC MASTER 1983 



INTRODUCTION AUX 
INTERFACES 



Le Guide General de Selection fournit suffisamment de 
renseignements pour permettre des selections initiales 
de produits. Tous les appareils cites dans cette Section, 
a la fois dans la Premier Guide de Selection et dans les 
feuilles de donnees, sont inclus dans tous les index. 
Ces index indiquent a quelle page et a quelle ligne sur 
cette page il a ete fait mention de tel appareil. 

Dans la Section "Interfaces", les parametres de selec- 
tion changent pour chaque categorie, ce qui implique 
un format special pour chacun. Les convertisseurs 
analogues et digitaux ont deux formats : un pour les 
appareils a sortie binaire et un autre pour les unites 
decimales. Certains produits de cette Section, notam- 
ment les convertisseurs d'analogue a digital et de 
digital a analogue, peuvent etre des hybrides. Les 
hybrides enuineres sont ceux qui possedent un boitier 
compatible aux circuits integres. 

Cette Section ne fait pas reference aux types de boitier; 
les suffixes indiquant le type de boitier sont generale- 
ment omis. Pour plus d'information sur les suffixes 
employes par chaque societe, reportez-vous au Guide 
des Numeros de Pieces. Dans tout le Guide General de 
Selection chaque appareil avec selection complete de 
temperatures imposees par I'Armee ( — 55°C a 125°C) 
est indique par le signe (t), juste avant le nom du 
fabricant, Les noms des fabricants sont generalement 
ecrits en entier, certains cependant sont abreges. 
Reportez-vous a la page 2612 pour connaitre la signi- 
fication de ces abreviations. 



2412 © IC MASTER 1983 



INTRODUCCION A 
ZONA INTERRfEiaAL 

La Gui'a Maestra de Seleccion provee suficiente infor- 
macion para hacer selecciones iniciales de producto. 
Todas las componentes que aparecen en esta seccion, 
ya sea en la gui'a de seleccion inicial o en las paginas 
de datos, estan inclui'das entodos los ostros indices. 
Estas listas de indices los conduce a la pagina y linea 
de aquella pagina donde se encuentra cada 
compon^nte. 

En la seccion de Zona Interfacial la seleccion de para- 
metros difiere drasticamente para cada categoria; de 
tal manera que cada una tiene su propio formato. La 
categona de convertidores analogicos a digitales tiene 
dos f ormatos : uno para componentes de salida binaria 
y otro para unidades decimales. Algunos de los pro- 
ductos en esta seccion, principalmente convertidores 
analogico a digital y digital a analogico, pueden ser 
hibridos; los hibridos en la lista son solo aquellos de 
estilo constructivo compatible con CI*. 

Esta seccion no es complicada por referencias al estilo 
constructivo; los sufijos que denotan estilo construc- 
tivo han sido generalmente omitidos. Para informa- 
cion adicional sobre sufijos de las compani'as, refierase 
a la Guia de Numero de Pieza. A lo largo de la Gui'a 
de Seleccion Maestra, cada intervalo completo de 
temperatura para uso militar (55°C a 125°C) de la 
componente aparece indicada por el signo (t) que 
precede al nombre del fabricante. Los nombres de los 
fabricantes no son generalmente deletreados; sin em- 
bargo, algunos aparecen abreviados y las abrieviaturas 
son explicadas en la pagina 2612 . 



® IC MASTER 1983 



B 

00 
(0 



-i y^ -7 s.^ >^(r>-^i' 'y 3 y-c^^u ^ y ^ y^<y z-^ — 
oM.t i o -C^^-^ -to f^J^f^ A D 3 y^<-^-ki 2 M.(Cj^ o 

4>^i^-Ci^^-fo ^l±0^-^'»y <>■-v^tl^L^^^f^^^^-:V:^>^^- 
2612 'l/'k^m. L-CT -5 l/^o 



2414 



© IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog Switches 



ON Analog 
Switch Resistance Signal 
Function Type 25°C.n Range V 



Supply 
Voltage, 

V Device 



ON Analog 
Switch Resistance Signal 
Function Type 25°C,n Range V 



Supply 
Voltage, 

V Device 



Source 



Switches with Drivers 




QDQT pun<i f^n 

oro 1 l/IVlUo 3U 


+ 11 






4" Intorcii 

1 IlllCldll 




± 15 5 


± 15 5 


DfiSDAOA 

UUwUtUA 


-f Slllconlv 

1 ulllwUHIA 










(2779.2813) 








DG5040C 


Siliconix 










(2779.2813) 


75 


±10 


±15,5 


IH5140C 


Intersil 




±11 


±15,5 


HI5040-2 


IHirrls 










(2643.3288) 










Hirris 










(2643.3288) 








IH5040M 


t Intersil 


80 


±10 


±15,5 


IH5040C 


Intersil 


JFET 6 


-5 to 10 


±15 


CAG6 


t Teledyne C 




-5 to 4 


±15.5 


CAG10A 


t Teledyne C 


10 


-5 to 10 


±15 


CAG6-10 


tTeledyneC 




-5 to 4 


±15.5 


C AG IOC 


t Teledyne C 


15 


-10to5 


±15.5 


CAG100 


t Teledyne C 


30 


±5 


±5,5 


CAG10 


t Teledyne C 




±8 


-18,12 


IH5001 


Intersil 


50 


-10to4 


±15.5 


CAG10B 


t Teledyne C 




-10to5 


-15.5 


CAG14 


t Teledyne C 




±8 


- 18,12 


IH5002 


Intersil 




±10 


±15 


2110BE 


t Teledyne C 


60 


±10 


±18.5 


CAG30 


t Teledyne C 


100 


±5 


±15 


2107BE 


t Teledyne C 


PMOS 80-300 


± 10 


—20,10 


TLBIOi 


XI 








TL610M 


tTI 


100-400 


±10 


-20.10 


TL610C 


Tl 


2xSPST CMOS 35 


±10 


±15,5 


IH5048M 


t Intersil 


45 


±10 


±15.5 


IM5048C 


Intersil 


50 


±7.5 


±15.5 


DGM181B 


Intersil 




±10 


±15.5 


DGM182A 


t Intersil 




±11 


±15.5 


IH5141M 


t Intersil 




±15 


± 15 


HI300 


Hirrls 


















UlOfU 

niJU4 


UarrU 

nims 










(9Ma 3987) 








HI381 


Harris 










(2635.3288) 








HI400 










DG300A 


t Siliconix (2779) 








D6300AA 


t Siliconix (2779) 








DG300AB 


Siliconix (2779) 








DG300AC 


Siliconix (2779) 








DG300B 


Siliconix (2779) 








D6300C 


Siliconix (2779) 








DG3Q4A 


tSlllconIx (2779) 








DG304AA 


tSlllconIx (2779) 








DG304AB 


Siliconix (2779) 








DG304AC 


Siliconix (2779) 








DG304B 


Siliconix (2779) 








DG304C 


Siliconix (2779) 








DG381A 


tSlllconIx (2779) 








DG381AA 


tSlllconIx (2779) 








D6381AB 


Siliconix (2779) 








0G381AC 


Sllleottix (2779) 








DG381B 


t Siliconix (2779) 








DG381C 


tSlllconIx (2779) 






±15.5 


HI5048-2 


t Harris (2643) 








HI5Q48-5 


Harris (2643) 








0G5041A 


tSlllcnnIx 










(2779.2813) 








DG5041C 


Siliconix 










(2779.2813) 


70 


±14 


±15 


DG200M 


t Intersil 








IH5200 


t Intersil 










(Continued) 



2xSPST CMOS 70 



20 



30 



40 



50 



±15 



±15 



±10 
±11 



±15,5 



±15.5 



±15 



±15,5 



±10 
±14 
±15 



±15.5 



±15 



±15 



90 ±15 ±15 


AD7592DIB AD (3176) 
AD75g2DIK AD (3176) 


6 -etOlO -18.15 
10 -6 to 10 -18,15 
-7.5 to 15 ±15.5 


CAG27 t Teledyne C 
CAG27-10 tTeledyneC 
DG180A t Intersil 
DG180B Intersil 
DG180A tSlllconIx (2779) 
DG180B Siliconix (2779) 


±10 -18,12 


0Q141A t Intersil 
IH5005 t Intersil 
AH0141 tNatlenal (3344) 
AH0141C National (3344) 

DG141A t Siliconix 


-20,10.5 


DG180A t Intersil 
DG180B Intersil 
DG180A t Siliconix 
DG180B Siliconix 


15 ±7.5 ±15 


DG151A t Intersil 

AH0151 tNaUonal (3344) 

AH0151C Natloaal (3344) 

DG151A t Siliconix 


±8 -18,12 


DG141B Intersil 
DG441A Intersil 
DG141B Siliconix 


20 ±5.5 ±15 


DG151B Intersil 
DG451A Intersil 
DG151B Siliconix 


30 -BtolO -18,15 
-7.5 to 15 ±15.5 


CAG24 t Teledyne C 
DG181A t Intersil 
IH181M t Intersil 
AM181 t National 
DG181A tSlllconIx (2779) 



-12.5 to 10 



-20,10,5 



ADG200A 
HI200-2 



MP200DIA 
DG200A 



DG200AA 



(Cont'd) 
tAD (3176) 
t Harris 

(2624,3287) 
Micro Pwr (401) 
tSlllconIx 

(2779,2784) 
tSlllconIx 

(2779.2784) 



DGM182B 
IH5141C 



Intersil 
Intersil 



DG200 Intersil 
IH200M t Intersil 
IH5041M t Intersil 



HI5041-2 
HI5041-5 



t Harris 
Harris 



(2643) 
(2643) 



IH200C 
IH5041C 



Intersil 
Intersil 



DG200C 
IH5200C 



Intersil 
Intersil 



ADG200B 
ADG200C 
HI200-5 

MP2000IB 
IIIIP200DIC 
DG200AB 

0G200AC 

DG200B 

DG200C 



AD (3176) 
AD (3176) 
Harris 

(2624.3287) 
Micro Pwr (401) 
Micro Pwr (401) 
Siliconix 

(2779.2784) 
Siliconix 

(2779.2784) 
Siliconix 

(2779.2784) 
Siliconix 

(2779.2784) 



DG181A t Intersil 



(Continued) 



60 



70 



80 



90 



100 



110 



DT' means four terminals with a pair of normally open and normally closed contacts. 



®IC MASTER 1983 



2415 



IC MASTER 



INTERFACE-Analog Switches (Cont'd) 



ON Analog Supply 

Switch Resistance Signal Voltage, 
Function Type 25°C,R Range V V 



ON Analog Supply 

Switch Resistance Signal Voltage, 
Function Type 25°C,n Range V V 



Source 



Switches with Drivers 


(Cont'd) 


2xSPST JFET 30 - 12.5 to 10 

-20,10,5 


(Cont'd) 

IH181M t Intersil 
AM181 t National 
DG181A fSiliconix 


±10 -18,12 


DG133A t Intersil 
IH5003 t Intersil 
IH5006 t Intersil 
AH0133 tNlllOMi (3344) 
AH0133C Natlonil (3344) 
Uu133A T>3""'0niX 


-20 


CDA2-3 t Teledyne C 


35 ±8 -18,12 


DG433A t Intersil 


50 -7.5 to 15 ±15,5 


DG181B Intersil 
IH181C Intersil 
D6181B SllieonIx (2779) 


-lOtolS ±15,5 


AM281 National 


-12.5 to 10 

-20,10,5 


DG181B Intersil 
IH181C Intersil 
DG181B SllieonIx 


-15 to 10 -20,10,5 


AM281 National 


±7.5 ±15 


DG152A t Intersil 

AH015Z tNitlonal (3344) 

AH01SZC Nitlontl (3344) 

DG152A t Siliconix 


±8 -18,12 


DG133B Intersil 
DG133B Siliconix 


±10 -18,12 

— 10, ID 


IH5004 Intersil 
i/Muio 7 leieoyneu 
CAG42 t Teledyne C 
CAG45A tTeledyneC 


75 -7.5 to 15 ± 15,5 
-10 to 15 ±15,5 


AM182 t National 
DG182A t Intersil 
IH182M t Intersil 
DG18ZA t Siliconix (2779) 


- 12.5 to 10 

-20,10,5 


AM 182 t National 


— ic» tn in —90 1fl R 
** 13 lU lU ~tu, IU,3 


nf^1fi9A + Intorcil 
UU lOcn \ illlcioll 

IH182M t Intersil 
AM281 National 
DG182A t Siliconix 


-4- in -4-1*; 


Tl 1R9M + Ti 


±15 ±10 


SW-05B t PMI 
SW-05F PMI 


80 ±8 -18,12 
±10 -18,12 


DG434A Intersil 
DG134A t Intersil 
IH5007 Intersil 

AUm^A 4 Hillniial 
finu 1 04 J niiiDnii 

AH0134C Nitloiil (3344) 

DG134A tSiliconix 


100 -10to15 ±15,5 


DG182B Intersil 
IH182C Intersil 
AM282 National 
DG182B SlllcoDlx (2779) 


-15 to 10 -20.10,5 


DG182B Intersil 
IH182C Intersil 
AM282 National 
DG182B Siliconix 


±5.5 ±15 


DG452A Intersil 
DG152B Siliconix / 


±8 -18,12 


DG134B Intersil 
DG134B Siliconix 


±10 ±15,5 


TL182C Tl 
TL182I Tl 

(Continued) 



2XSPST JFET 



300 



-7.5 to 15 ±15,5 



PMOS 50 

75-200 



±15 ±15 
-5 to 10 ±15,5 
±10 -20,10,5 



75-250 



-5 to 10 ±15,5 
±10 -20,10,5 



100-450 ± 10 



-20,10,5 



4xSPST Common Output 

PMOS 100-450 ±10 



-20,10 
-20,10,5 



150-450 ± 10 



-20,10,5 



150-500 ±10 



-20,10,5 



200-600 ±10 



-20,10,5 



4xSPST Var. Comb, of Normally On/Off, with Disable 
FET 85 ±10 ±15 . 



20 



4xSPST Various Combinations of Normally On/Off 
FET 80* ±10 ±15 



85 



±10 



±15 



100 



±10 



±15 



JFET 100 
200 



±10 
±10 



-18,15 
±15,0 



30 



250 



±10 



±15,0 



PMOS 200-600 



-20,10,5 



4xSPST CMOS 50 



±15 



±15 



40 



75 



±11 



±15.5 



80 



±10 



±15 



50 



±15,5 



±14 
±15 



±15 



±15 



90 



±15 



±15 



60 



DG281A 
DG281B 



(Cont'd) 
tSllltgnlx (2779) 
SIIICOBlx (2779) 



HI401 Harris 
DGM111A tSiliconix 
DGM111A tSiliconbc 



DGM111B 
DGM111B 



Siliconix 
Siliconix 



DG111 
DG112 



t Intersil 
t Intersil 



DG116 
DG118 



t Intersil 
t Intersil 



DG172A tSiliconU 



DG172B 



Siliconix 



DG172C 



Siliconix 



SW03B 
SW03F 
SW04B 
SW04F 
SW06 



tPMI 
PMI 

tPMI 
PMI 
PMI 



SW-201B 
SW-202B 



PMI 
PMI 



SW01B 
SW01F 
SW02B 
SW02F 



tPMI 
PMI 

tPMI 
PMI 



SW-201F 
SW-202F 



PMI 
PMI 



CAG48A 
LF11Z01 
LF11202 
LF11331 
LF11332 
LF11333 



t Teledyne C 

tNiUanal 

tNaUoaal 

tNatltnal 

tNatlaial 

tWaUeaal 



(3318) 
(3318) 
(3318) 
(3318) 
(3318) 



LF13201 
LF13202 
LF13331 
LF13332 
LF13333 



Natlanal 
NaUaial 
Natisnal 
NaUenal 
Nitiual 



(3318) 
(3318) 
(3318) 
(3318) 
(3318) 



AH001S 
AH0015C 



tNaUaul 
Natloial 



(3344) 
(3344) 



HI201H8-2 tHarrIa 



HI201HS-5 Harris 



(2626,3287) 

I 

(2626.3287) 



IH201M 
IH202M 
IH5052M 
1H5053M 



t Intersil 
t Intersil 
t Intersil 
t Intersil 



MP201DIA 
MP201DIB 



fMltroPwr (401) 
Micro Pwr (401) 



IH201C 
IH202C 
IH5052C 
IH5053C 



Intersil 
Intersil 
Intersil 
Intersil 



DG201M 
IH5201M 



t Intersil 
t Intersil 



ADGZ01A 
HI201-2 



fAD 
tHirrIa 



(3176) 
(2626.3287) 



AD7590DIB 
AD759QDIK 
AD7S91DIB 
AD7591DIK 



AD 
AD 
AD 
AD 



(3176) 
(3176) 
(3176) 
(3176) 

(Continued) 



70 



90 



100 



110 



120 



t Military Temperature Range (-55° to 125°C) 

2416 



* Typical Value 

Bald faca indlcatu aidlUaaal data Is provldad n tba page lolad. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog Switches (Cont'd) 



ON Analog 
Switch Resistance Signal 



Supply 
Voltage, 



Function Type 25°C,n Range V 


V 


Device 


Source 


Switches with Drivers 


(Cont'd) 


4xSPST CMOS 90 ±15 


±15 




(Cont'd) 






DG221A 


tSlllconix (2794) 






DG221C 


Slllconix (2794) 


100 ± 14 


±15 


DG201C 


Intersil 






IH5201C 


Intersil 


±15 


±15 


AD7510DIJ 


AD (3176) 






AD7510DIK 


AD (3176) 






A07510DIS 


tAD (3176) 






AD7511DIJ 


AD (3176) 






AD7511DIK 


AD (3176) 






nu 19 1 1 liio 


1 nu \o 1 luj 






AD7511DIT 


fAD (3176) 






inR7niR 

nuu^u 1 D 


AD ni7fit 














HI201-5 


Hirrls 








\LOLO,QLOIf 






MP7510DIJ 


Micro Pwr (401) 






MP7510DIK 


Micro Pwr (401) 






MP7510DIS 


t Micro Pwr (401) 






RflP7511DIJ 


Micro Pwr (401) 






MP7511DIK 


Micro Pwr (401) 






MP7511DIS 


t Micro Pwr (401) 






HP7R1 1 niT 


J hllCl rwr ytU 1 1 






UUOUOA 


J OIllGDOlA 








(977(1 97Qfl\ 






ncqnRP 


C|||ennl( 

OIIIUUIIIA 














UUOUSIA 


+ Cillpnnly 

1 OlllwUlllA 








(2779,2800) 






DG30gC 


Slllconix 








(2779.2800) 


17*; -t. m 


-t- 1R 


nR9ni& 


1 OUIGuniA 








/977Q 97RR\ 






nR9ni At 

UU£U lAA 


-I'QIIIpnnlv 








/977Q 9770 97flft) 






UuCvcn 


4>CIIIf>nnlv 
lOlMCOniA 








/9770 97flQ\ 






nR9n9R 
uucliCo 


OMIGOIIIa 








(2779.2788) 






DG211C 


Slllconix 








(2779.2790) 






DGZ12C 


Slllconix 








(2779.2792) 


200 ± 15 


±15 


0G201AB 


tSlllconix 








(2779,2786) 






DG201AC 


tSlllconix 








(2779.2786) 






DG201B 


Slllconix 








(2779,2786) 






DG2G1C 


Slllconix 








(2779.2786) 






DG20ZC 


Slllconix 








(2779.2788) 


280 ±7.5 


±7.5 


F4066BC 


Fairchild 






F4066BM 


t Fairchild 






HD14066B 


Hitachi 






MC14066BA f Motorola 






MC14066BC 


Motorola 






CD4066BC 


Natlonii (3318) 






C04066BM 


tNatlonai (3318) 






CD4066A 


tRCA (748) 






CD4066AE 


RCA (748) 






CD4066B 


tRCA (748) 






CD4066BE 


RCA (748) 






HCC4066B 


fSGS 






HCF4066B 


SGS 






N4066A 


Signetics 






883/4066B 


fSSS 






SCL4066B 


SSS 






TC4066B 


Toshiba 








(Continued) 



ON Analog 
Switch Resistance Signal 
Function Type 25°C,n Range V 



Supply 
Voltage, 

V Device 



4xSPST CMOS 



20 



30 



40 



50 



400 



±7.5 



±7.5 



800 



:7.5 



±7.5 



850 



inverted Control ±7.5 
±7.5 



±7.5 ±7.5 



DMOS 70 



±7.5 



±15 



±10 
±15 



±15 



±15 



FET 100 



±10 



±15 



JFET 10 
30 



±10 , 
±7.5 



-18.2.8 
±15.5 



50 



-10 to 5 -15,5 
±10 ±18.-7 



±10 



•18,5 



±10 



±15,5 



5xSPST Common Output 

PMOS 100-450 



±10 



-20,10 



-20,10,5 



125-500 ±10 



■20,10 



-20.10,5 



SPOT for D/A 

NPN-PNP 



OtO-10 -15 
10 10 



-15,5 
±15 



(Cont'd) 



HD14016B Hitachi 

MC14016BA t Motorola 
MC14016BC Motorola 

883/4016B t SSS 
SCL4016B SSS 

CM4016A t Solitron 
CM4016AE Solitron 
TC4016B Toshiba 



F4016C 
F4016M 



Fairchild 
t Fairchild 



883/4416B t SSS 
SCL4416B SSS 



CD4016BC 

CD4016BM 

CD4016A 

CD4016AE 

CD4016B 

CD4016BE 

HCC4016B 

HCF4016B 

CM4016A 

CM4016AE 

CM4116A 

CM4116AE 



Nitlonii 
tNtUonii 
tRCA 

RCA 
tRCA 

RCA 
fSGS 

SGS 
t Solitron 

Solitron 
t Solitron 

Solitron 



(3318) 
(3318) 
(748) 
(748) 
(748) 
(748) 



SD5001 
SD5002 



Siiiconix (2824) 
Slllconix (2824) 



SD5000 



Slllconix (2824) 



SDS200 



Slllconix (2824) 



SW201B 
SW201F 
SW202B 
SW202F 



tPMI 
PMI 

tPMI 
PMI 



CAM604A 
AM 193 



t Teledyne 
National 



CAG49 
CAG50 



t Teledyne C 
t Teledyne C 



CAG49 t Teledyne C 



SW7510A 
SW7510B 
SW7510E 
SW7510F 
SW7511A 
SW7511B 
SW7511E 
SW7511F 



tPMl 
tPMI 
PMI 
PMI 
tPMl 
tPMI 
PMI 
PMI 



AM 194 



National 



DG123 
D6123A 



t Intersil 
t Slllconix 



DG125 
DG125A 



t Intersil 
t Siiiconix 



DG123B 
DG123B 



Intersil 
Siiiconix 



DG125B 
DG125B 



Intersil 
Siiiconix 



CDA1-3 
CDA4A 



t Teledyne C 
t Teledyne 



CDA23 
CDA6 



t Teledyne C 
t Teledyne C 



60 



70 



(D 
(0 



80 



90 



100 



110 



DT' means four terminals with a pair of normally open and normally closed contacts. 



® IC MASTER 1983 



2417 



IC MASTER 



CD 
■♦— » 

w 
CO 



INTERFACE-Analog Switches 


(Cont'd) 




ON Analog 


Supply 








Switch Resistance Signal 


Voltage, 








Function Type 25°C,n Range V 


V 


Device 


Source 




Switches with Drivers 


(Cont'd) 


drUI UMUo OO X 1U 


± 15,5 


InOUOUM 


t Intersil 




-t- in 

nO ± lU 


.4. It; 

± 10,0 




Intersil 




50 ±11 


±15.5 


iH5142M 


t Intersil 




±15 


±15 


HI301 


Harris 










(2630.3287) 






HI305 


Hirrls 










(2630.3287) 






HI387 


Harris 










(2635.3288) 






UG301A 


tSlllconIx 


(2779) 






DG301AA 


tSIIICOBlX 


(2779) 






DG301AB 


SIIICODiX 


(2779) 






UuoUIAL 


Sillconix 


(2779) 






DG301B 


Slliconix 


(2779) 






DG301C 


Sllleonix 


(2779) 






0G305A 


t Slliconix 


(2779) 






D6305AA 


t Sllleonix 


(2779) 






uuwiiunD 


Slliconix 


(2779) 






DG305AC 


Slliconix 


(2779) 






DG305B 


Sllleonix 


(2779) 






DG305C 


Sllleonix 


(2779) 






DG387A 


t Sllleonix 


(2779) 






DG387AA 


t Sllleonix 


(2779) 






DG387AB 


Slliconix 


(2779) 






DG3o7AC 


Slliconix 


(2779) 






DG387B 


Sllleonix 


(2779) 






DG387C 


Sllleonix 


(2779) 




±15,5 


HI5050-2 


t Harris 


(2643) 






HI505Q-S 


Harris 


(2643) 






npcnioa 

Dua04ZA 


t Sllleonix 










(2779.2813) 






DG504ZC 


Siileooix 










(2779.2813) 


75 ± 10 


±15,5 


lno142C 


Intersil 




± 11 


± 15,5 


lno042M 


t Intersil 




±15 


±15,5 


HI5042-2 


t Harris 


(2643) 






uicnjo c 

nl304Z-a 


Harris 


(2643) 


80 ±10 


±15,5 


IH5042C 


Intersil 




JFET 6 -5 to 10 


±15 


CAG7 


t Teledyne C 




10 -5 to 10 


±15 


CAG7-10 


t Teledyne C 




-7.5 to 15 


±15,5 


0G186A 


t Intersil 








DG186B 


Intersil 








DG186A 


t Slliconix 


(2779) 






DG186B 


Slliconix 


(2779) 


-12.5 to 10 












-20.10,5 


DG186A 


t Intersil 








DG186B 


Intersil 








UU lOOn 


t Slliconix 








Uu lOOD 


Slliconix 




-1- in 

± lU 


± 10.1c 


Uu 14qA 


t Intersil 








AUniJR 
<UIU14D 


fNaUonal 


(3344) 








NaUonal 


(3344) 






Uu 14DA 


Slliconix 




15 ±7.5 


± 15 


DG161A 


t Intersil 








AH0161 


tMatlonal 


(3344) 






AH0161C 


National 


(3344) 






DG161A 


Slliconix 




±8 


±18.12 


DG146B 


Intersil 








DG446A 


Intersil 








0G146B 


Sillconix 




20 ±5.5 


±15 


DG461A 


Intersil 








DG161B 


Slliconix 




30 -7.5 to 15 


±15.5 


DG187A 


t Intersil 








IH187M 


t Intersil 








AM187 


t National 








DG187A 


t Sllleonix 


(2779) 








(Continued) 



Line 


Switch 
Function Type 


ON 

Resistance 
25"'C,0 


Analog 
Signal 
Range V 


Supply 
Voltage, 
V 


Device 


Source 




Line 




orUI Jrci 


30 


- 12.5 to 10 


-20.10.5 


DG187A 
IH187M 
AM187 
DG187A 


t Intersil 
t Intersil 
t National 
t Sillconix 


[iiOni 0) 










±10 


±18.12 


DG144A 
AH0144 
AH0144C 

DG144A 


t Intersil 
t National 
National 

t Slliconix 


(3344) 
(3344) 








35 


±8 


±8,12 


DG444A 


Intersil 






10 




50 


-7.5 to 15 


±15,5 


DG187B 
IH187C 
DG187B 


Intersil 
Intersil 
Sillconix 


(2779) 


70 








-10 to 15 


±15,5 


AM287 


National 












- 12.5 to 10 


-20,10,5 


DG187B 
IH187C 
DG187B 


Intersil 
Intersil 
Slliconix 












-15 to 10 


-20.10,5 


AM287 


National 






20 






±7.5 


±15 


DG162A 
AHG162 
AH0162C 

DG162A 


t Intersil 
t National 
National 

t Slliconix 


(3344) 
(3344) 


80 








±8 


±15 
±18,12 


2126BG 
DG144B 
DG144B 


t Teledyne C 
Intersil 
Slliconix 










75 


-7.5 to 15 
-10 to 15 


±15,5 
±15,5 


AM 188 
DG188A 
IH188M 
DG188A 


t National 
t Intersil 
t Intersil 
t Slliconix 


(2779) 










- 12.5 to 10 


-20,10,5 


AM 188 


t National 






30 






- 15 to 10 


-20,10.5 


DG188A 
IH188M 
DG188A 


t Intersil 
t Intersil 
t Sillconix 




90 








± 10 


±15,5 


Tl 1RRM 

1 1_ loom 


+ Tl 
1 ' 1 










80 


±8 
±10 


±18,12 
-18,12 


DG443A 

DG143 

AH0143 

nnu itwu 

DG143A 


Intersil 
t Intersil 
t National 

t Slliconix 


(3344) 




40 




100 


-10 to 15 


±15,5 


DG188B 
IH188C 
AM288 
0G188B 


Intersil 
Intersil 
National 
Sllleonix 


(2779) 


100 






-15 to 10 


-20,10,5 


DG188B 
IH188C 
AM288 
DG188B 


Intersil 
Intersil 
National 
Sillconix 












±5.5 


±15 


DG162B 


Sillconix 












±8 


±15 


DG462A 


Intersil 












±10 


-18,12 
±15 


DG143B 
AH2114 


Sillconix 
t National 


(3344) 


110 


50 








±15,5 


TL188C 
TL188I 


Tl 
Tl 








125 


±10 


±15 


AH2114C 


National 


(3344) 








300 


-7.5 to 15 


±15,5 


DG287A 
DG287B 


t Sillconix 
Sillconix 


(2779) 
(2779) 






NPN-PNP 

10 


±10 


- 15,5 


CDA23 


t Teledyne C 








PMOS 


100-400 


±10 


-20,10 


TL604I 
TL604M 


Tl 
tTl 










200-600 


±10 


-20,10 


TL604C 


Tl 






60 


SPOT JFET 
PMOS 


50 

100-400 


-10to5 
±10 


-15,5 
-20.10 


CDA18 
SI3002A 


t Teledyne G 
t Slliconix 

(Continued) 


120 



t Military Temperature Range (-55° to 125°C) 

2418 



Bold 



* Typical Value 
laco indlcatss additional data Is provided on tbs page notad. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog Switches (Cont'd) 



ON 


Analog 


Supply 






Switch Resistance 


Signal 


Voltage, 






Function Type 25°C. 


Range V 


V 


Device 


Source 


Switches with Drivers 


(Cont'd) 


<ipnT PMn<? inn-inn 


± 10 


— 20 10 












OiOUU£D 


Siliconix 








1 LDUll 


Tl 

1 1 








TL601M 


tTI 








TL607I 


Tl 








TL607M 


tTI 


200* 


±10 


-20.10 


SH3002C 


Fairchlld 








SH3002M 


t Fairchiid 


200-600 


± 10 


-20,10 


TL601C 


71 








TL607C 




2xSPDT ' 










CMOS 35 


±10 


± 15,5 


IM5051M 


t Intersil 


45 


± 10 


± 15,5 


IHoUslU 


Intersil 


50 


±11 


±15,5 


IH5143M 


t Intersil 




±15 


±15 


HI3Q3 


Harris 










(2630.3288) 








HI307 


Hirrls 










(2630.3288) 








HI390 


Harris 










iOCOK OODDV 
(£DOU.O£00) 








0G303A 


tSlllconIx (2780) 








DG303AA 


tSlllconlx (2780) 








DG303AB 


Siliconix (2780) 








UboUJAb 


ci!ii>nMiv tomtn 
olllCORIX [cIqv) 








DG303B 


Siliconix (2780) 








DG303C 


Siliconix (2780) 








UtlwUf A 


'fSllleiinlY l97Hn\ 








UUJUIAA 


4'^llleniil« (91R[\\ 








UbOU/no 


ouiconix (£/oU) 








DG907Ab 


siliconix (Z/oD) 








DG307B 


Siliconix (2780) 








DG307C 


Siliconix (2780) 








DG390A 


tSlllconIx (2780) 








DGSgOAA 


tSlliconix (2780) 








DGSgOAB 


Siliconix (2780) 








DG390AC 


Siliconix (2780) 








DG390B 


Siliconix (2780) 








UbdilUb 


oiiiconix (c/DU) 






±15,5 


HI5051-2 


t Harris 










(Zd43,3ZoB) 








HI5051-5 


Harris. 










(ZD4J.0£OO) 








DG243A 


tSlliconix 










(2780.2796) 








DG243C 


Siliconix 










(2780.2796) 








DG5043A 


tSlliconix 










(2780.2813) 








DGS043C 


SHieonIx 










(2780.2813) 


75 


±10 


±15,5 


1H5143C 


Intersil 




±11 


±15,5 


IH5043M 


t Intersil 




±15 


±15,5 


HI5043-2 


t Harris 










(2643.3288) 








HIS043-S 


Harris 










(2643.3288) 


80 


±10 


±15,5 


IH5043C 


Intersil 


100 


±15 


±15 


A07512DIJ 


AD (3176) 








AB7512DIK 


AO (3176) 








AD7S12DIS 


tAD (3176) 








AD7512DIT 


tAD (3176) 








MP7512DIJ 


IWIcro Pwr (401) 








MP7S12DIK 


Micro Pwr (401) 








MP7512BIS 


t Micro Pwr (401) 








MP7512DIT 


t Micro Pwr (401) 


JFET 10 


-7.5 to 15 


±15,5 


D6189A 


t Intersil 










(Continued) 








DT< means four terminals with a pair 


«IC MASTER 


1983 









ON Analog Supply 

Switch Resistance Signal Voltage, 
Function Type 25''C, fl Range V V 



2xSPDT ' 



JFET 10 



-7.5 to 15 ±15,5 



-12.5 to 15 



-20,15,5 



30 



-7.5 to 15 ±15,5 



-12 to 15 -20,15,5 



50 



-7.5 to 15 ±15,5 
-10 to 15 ±15,5 



-12.5 to 15 



-20,10,5 



-15 to 10 -20,10,5 



20 



75 



-7.5 to 15 ± 15,5 
-10 to 15 ±15,5 



-12.5 to 15 



-20,10,5 



-15 to 10 -20,10,5 



30 



100 



-10 to 15 ±15,5 



-15 to 10 -20,10,5 



125 



±10 



:15,5 



150 



±10 



±15,5 



300 



-7.5 to 15 ±15,5 



PNP 10 



±10 



±15 



3xSPDT CiWOS 280 



±7.5 



±7.5 



40 



50 



4xSPDT for D/A (current switch) 

NPN - -10 to -3 ±15 



DG189B 
DG189A 
DG189B 



(Cont'd) 

Intersil 
tSlliconix (2780) 
Siliconix (2780) 



DG189A 
D6189B 
DG189A 
DG189B 



t Intersil 
Intersil 

t Siliconix 
Siliconix 



DG190A 
DG190B 
iHISOM 
AM 190 
DG190A 



t Intersil 
Intersil 
t Intersil 
t National 

tSiilconlx (2780) 



DG190A 
DG190B 
iH190M 
AM 190 
DG190A 



t Intersil 
Intersil 
t Intersil 
t National 
t Siliconix 



DGigOB 

AM290 



Siliconix (2780) 

National 



DG190B 



Siliconix 



AM290 



National 



AM191 t National 

DG191A t Intersil 

iH191M t Intersil 

DG191A tSlliconix (2780) 



AM 191 t National 



DG191A t Intersil 
IH191M t Intersil 
DG191A t Siliconix 



D6191B Intersil 

IH191C Intersil 

AM291 National 

DG191B Siliconix (2780) 



0G191B Intersil 

iH191C Intersil 

AM291 National 

DG191B Siliconix 



TL191M 



tTI 



TL191C 
TL191I 



DG290A 
002908 



tSiilconlx 
Siliconix 



(2780) 
(2780) 



CDA29A t TeledyneC 



F4053BC 

F4053BM 

HD14053B 

MC14053BA 

MC14053BC 

C04053BC 

CD4053BM 

CD4053B 

CD4053BE 

HCC4053B 

HCF4053B 

883/4053B 

SCL4053B 

CM4053A 

CM4053AE 

TC4053B 



Fairchlld 
t Fairchiid 

Hitachi 
t Motorola 

Motorola 

Nailonat 
t National 
tRCA 

RCA 
tSGS 

S6S 

tsss 

SSS 
t Solitron 
Soiitron 
Toshiba 



(3318) 
(3318) 
(748) 
(748) 



ULN-2140A Sprague 
ULS-2140H t Sprague 



60 



70 



Q) 

O 
C 

o 
o 

Q) 

CO 
i_ 

(D 
-t— • 
C/3 
CO 



80 



90 



100 



110 



of normally open and normally closed contacts. 



2419 



IC MASTER 



INTERFACE-Analog Switches (Cont'd) 



ON Aoatog Supply 

Switch Resistance Signal Voltage, 
Function Type 25°C,n Range V V 



Source 



ON Analog 
Switch Resistance Signal 
Function Type 25°C,n Range V 



Supply 
Voltage, 

V Device 



CD 

'd 
O 

c 
o 

o 
CO 

i— 



.(/) 
CO 



Switches with Drivers 


(Cont'd) 


4xSPDT for D/A 












CMOS 100 


0.1 


8 


AD7519J 


AD 




4xSPDT CMOS — 




8 


MC14551BA t Motorola 










MC14551BC 


Motorola 




JFET 35 


±10 


-15,5 


HCS310 


HyComp 




NMOS - 


- 


8 


DG515A 


t Siliconix 










DG515B 


Siliconix 












Siliconix 




PNP 7 


Oto-10 


-15 


CDA11-S12 


Teledyne C 




10 


to -10 


-15 


l/UMI 1 


Teledyne C 




lOxSPDT (or D/A 












NMOS — 




e 


UU J iDn 


t Siliconix 










UUU lOD 


Siliconix 










DG516C 


Siliconix 




DPST CMOS 50 


±15 


±15 


ini0o4M 


t Siliconix 


(2780) 








lftl004AD 


Siliconix 


(2780) 








Dfi384AC 


Siliconix 


(2780) 


75 


±11 


±15,5 




t Intersil 










IH5144C 


Intersil 










IH5144M 


t Intersil 










DS5044A 


t Siliconix 












(2780.2813) 








D65044C 


Siliconix 












(2780,2813) 




±15 


±15,5 


HI5044-2 


tHirrls 


(2643) 








HIS044-5 


Harris 


(2843) 


80 


±10 


±15,5 


IH5044C 


Intersil 










IH5044M 


t Intersil 




PMOS 200 


±10 


±12 


SHj003C 


Fairchlld 










SHoOOjM 


t Falrchild 




2xOPST Cotrimon Output 












PMOS 100-450 


±10 


-20,10,5 


DGM122A 


t Siliconix 




125-500 


±10 


-20,10,5 


DGM122B 


Siliconix 






+ 10 


—20 10 5 


AH0019 


tNitlonil 


(3344) 








AHOOigC 


NlliOMi 


(3344) 


2xDPST Three Control Input 












CMOS 200 


±15 


±15,5 


HI1800A-5 


Harris 




2xDPST CMOS 35 


±10 


±15,5 




t Intersil 




45 


±10 


±15,5 




Intersil 




50 


±11 


±15,5 


IH5145M 


t Intersil 






±15 


±15 


H1302 


Harris 












(2630,3288) 








HI300 


Harris 












(2630.3288) 








HI384 


Harris 












(2635.3288) 








DG302A 


t Siliconix 


(2780) 








DG302AA 


t Siliconix 


(2780) 








D6302AB 


Siliconix 


(2780) 








DG302AC 


Siliconix 


(2780) 








DG302B 


SllleoDix 


(2780) 








DG302C 


Siliconix 


(2780) 








DG306A 


t Siliconix 


(2780) 








DG3Q6AA 


t Siliconix 


(2780) 








06306AB 


Siliconix 


(2780) 








DG306AC 


Siliconix 


(2780) 








DG306B 


Siliconix 


(2780) 








D0306C 


Siliconix 


(2780) 








DG384A 


t Siliconix 


(2780) 








D6384B 


Siliconix 


(2780) 








DG384C 


Siliconix 


(2780) 






±15,5 


HIS04g-2 


t Harris 


(2S43) 








HI5049-5 


Harris 


(2843) 








D65045A 


t Siliconix 












(2780.2813) 








DGS04'5C 


Siliconix 












(2780.2813) 










(Continued) 



2xDPST CMOS 



75 



80 



JFET 10 



20 



30 



40 



50 



±10 ±15,5 
±11 ±15,5 



±15 ± 15,5 



±10 ± 15,5 



-7.5 to 15 ±15,5 



-12.5 to 10 







-20,10,5 


DG183A 
DG183B 
DG183A 
06183B 


t Intersil 
Intersil 

t Siliconix 
Siliconix 






±10 


-18,12 


DG140A 
AH0140 
AH0140C 

DG140A 


t Intersil 
t National 
National 

t Siliconix 


(3344) 
(3344) 


15 


±7.5 


±15 


DG153A 
AH0153 
AH0153C 

DG153A 


t Intersil 
t National 
National 

t Siliconix 


(3344) 
(3344) 




±8 


-18,12 


DG440A 
DG140B 


Intersil 
Siliconix 




20 


±5.5 


±15 


DG153B 
DG453A 
DG153B 


Intersil 
Intersil 
Siliconix 




30 


-7.5 to 15 


±15,5 


DG184A 
IH184M 
AM184 
DG184A 


t Intersil 
t Intersil 
t National 
t Siliconix 


(2780) 



-12.5 to 10 



-20,10,5 


DG184A t Intersil 
IH184M t Intersil 
AM 184 . t National 
DG184A t Siliconix 


±10 -18,12 


DG129A t Intersil 

AH0129 tNttlonal (3343) 

AH0129C National (3343) 

DG129A t Siliconix 


35 ±8 -18,12 


DG429A Intersil 


50 -7.5 to 15 ±15,5 


DG184B Intersil 
IH184C Intersil 
DG184B Siliconix (2780) 


-10 to 15 ±15,5 


AM284 National 


-12.5 to 15 

-20,10,5 


DG184B Intersil 
IH184C Intersil 
DG184B Siliconix 


-15 to 10 -20.10,5 


AM2&4 National 


±7.5 ±15 


DG154A t Intersil 
AH0154 t National 
AH0154C National 
DG154A t Siliconix 


±8 -18,12 


DG129B Siliconix 


60 ±10 -18,15 


CS4R101A t Teledyne C 


75 -7.5 to 15 ±15,5 
-10 to 15 ±15,5 


AM 185 t National 
DG185A t Intersil 
IH185M t Intersil 
DG185A t Siliconix (2780) 


-12.5 to 10 

-20,10.5 


AM 185 t National 


-15 to 10 -20.10,5 


DG185A t Intersil 

(Continued) 



(Cont'd) 



iH5145C Intersil 
IH5045M t Intersil 



HIS045-2 t Harris 



HI504S-S Harris 



(2643.3288) 

t 

(2643.3288) 



IH5045C 



Intersil 



DG183A t Intersil 

DG183B Intersil 

DG183A t Siliconix (2780) 

DG183B Siliconix (2780) 



t Military Temperature Range (-55° to 125°C) 

2420 



* Typical Value 

Mi taw Indteatas additional data la provided on tko pago nolod. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog Switches (Cont'd) 



ON 

Switch Resistance 
Function Type 25°C, tl 


Analog 
Signal 
Range V 


Supply 
Voltage. 
V 


Device 


Source 




Line 


ON 

Switch Resistance 
Function Type 2S'C, a 


Analog 
Signal 
Range V 


Supply 
Voltage, 
V 


Device 


Source 




Line 


Switches with Drivers 






(Cont'd) 




DPDT ' JFET 100 


±5.5 


±15 






(Cont'd) 
























DG464A 
DG164B 


Intersil 
Siliconix 






2xDPST JFET 75 


-15 to 10 


-20.10,5 


IH18SM 
DG185A 


t Intersil 
t Siliconix 


(Cont'd) 


























±10 


-18.12 


DG142B 


Siliconix 
















DPDT PMOS 200-600 


±10 


-20,10.5 


AHOOM 
AH0014C 


t National 
Naiionai 


(3344) 
(3344) 




80 


±8 
±10 


-18,12 
- 18.12 


DG426A 
DG126A 
AH0126 
AH0126C 


Intersil 
t Intersil 
t Natlonil 

Il9llnn«l 

nllioiill 










(3344) 




2xDPDT with Followers 


TDA1028 


Signetics 












DG126A 


■j" Siliconix 




2xDPDT PMOS 150-1000 


OtO-18 


-(5-21) 


TDA1195 


Siemens 






100 


-10 to 15 


±15,5 


DG185B 
IH185C 


Intersil 
Intersil 






DP4T with Followers 






TDA1029 


Signetics 




70 








AM285 
DG18SB 


National 
Siliconix 


(2780) 


10 


4PDTfor D/A 

PNP 10 


±10 


±15.5 


CDA28A 


t Teledyne C 








- 15 to 10 


-20,10,5 


DG185B 
IH185C 
AM285 
DG185B 


Intersil 
Intersil 
National 
Siliconix 
















4PST CMOS 50 


±15 


±15,5 


HiS047A-2 
HI5047A-5 


t Harris 
Harris 


(2643) 
(2643) 














75 


±11 


±15,5 


IH5047M 


t Intersil 








±5.5 


±15 


DG154B 
DG454A 
DG154B 


Intersil 
. Intersil 
Siliconix 








±15 


±15,5 


HI5047.? 

1113114 f-u 


t Harris 
Harris 


(2643) 














80 


±10 


±15,5 


IH5047C 


Intersil 








±8 


-18,12 


DG126B 


Siliconix 






Switches without Drivers 










125 


±10 


±15,5 


TL185M 


tTI 




20 










150 


±10 


±15,5 


TL185C 
TL185I 


71 
Tl 






SPST JFET 30 


±10 

± 13 




AM 1000 
AM1001 


t National 
t National 






300 


-7.5 to 15 


±15,5 


DG284A 
DG284B 


t Siliconix 
Siliconix 


(2780) 
(27B0) 




100 


Oto(Drive-4) 




IH5037C 


Intersil 




80 


3xDPST Common Output 

PMOS 100-450 




















IH5037M 


t Intersil 






±10 


-20,10 
-20.10.5 


DG120 
DG121 


t Intersil 
t Intersil 








±0.2 




IH5021C 
IH5021M 


t Intersil 
t Intersil 






DPDT with followers 






TDA1527 


Signetics 












IH5023C 
IH5023M 


Intersil 
t Intersil 






UrUI LMUo OU 


± 10 


±15.5 


HI5046A-2 


f Hirris 


(2643) 






±10 




AM1002 


t National 












HI5046A-5 


Harris 


(Z643) 




150 


0ta(Drive-4) 












/O 


± 1 1 

±15 


±15,5 
±15,5 


IH5046M 
HI5046-2 


f Intersil 
f Hirrls 


(2643) 


30 






IH5038C 
IH5038M 


Intersil 
t Intersil 












HI5046-5 


Harris 


(2643) 






±0.2 




IH5022C 


Intersil 






on 

(Hi 


± lU 


±15,5 


IH5046C 


Intersil . 












IH5022M 


t Intersil 




90 


JFET 10 


±10 


-18,12 


DG145A 
AH0145 


t Intersil 
t National 

Hallnnat 

naiionai 


(3344) 










IH5024C 
IH5024M 


Intersil 
t Intersil 












AH014SC 




2xSPST Cominon Output 




















DG145A 


f Siliconix 






JFET 100 


Oto(Drive-4) 












10 


-4-7 1? 

± 1.0 


±15 


DG163A 
AH0163 


f Intersil 
t National 
National 


(3344) 
(3344) 










IH5035C 
IH5035M 


Intersil 
t Intersil 












AH0163C 


40 




±0.2 




IH5019C 


Intersil 












DG163A 


t Siliconix 












IH5019M 


t Intersil 








±0 


-18.12 


DG445A 
DG145B 


Intersil 
Siliconix 






150 


Oto(Drive-4) 




IH5034C 


Intersil 






20 


±5.5 


±15 


DG163B 


Intersil 












IH5034M 


t Intersil 






DG463A 
DG163B 


Intersil . 
Siliconix 








±0.2 




IH5018C 
IH5018M 


Intersil 
t Intersil 




100 




± lu 


-18,12 


DG139A 
AH0139 
AH0139C 


X IntDrcIl 

J iniersii 
jHaiionai 
National 


(3344) 




2xSPST JFET 100 


to (Drive-4) 




IH5033C 
IH5033M 


Intersil 
t Intersil 












DG139A 


t Siliconix 




50 




±0.2 




IH5017C 


Intersil 






35 


±8 


-18,12 


DG43gA 


Intersil 


t 








IH5017M 


t Intersil 






50 


±7.5 


±15 


DG164A 
AH0164 
AH0164C 


t Intersil 
tNaUonal 
Nalloial 


(3344) 
(3344) 




150 


to (Drive-4) 




IH5036C 
IH5036M 


Intersil 
t Intersil 












DG164A 


t Siliconix 








±0.2 




IH5020C 


Intersil 








±8 


- 18,12 


DG139B 


Siliconix 










IH5020M 


t Intersil 






80 


±8 


- 18,12 


DG442A 


Intersil 






3xSPST Comnwn Output 
















±10 


- 18.12 


DQ142A 
AH0142 
AH0142C 


t Intersil 
t National 
National 


(3344) 
(3344) 


60 


JFET 100 


Oto(Drlve-4) 




IH5029C 
IH5029M 


Intersil 
t Intersil 




110 








DG142A 


t Siliconix 








±0.2 




IH5013C 


Intersil 






100 


±5.5 


±15 


DG164B 


Intersil 










IH5013M 


t Intersil 














(Continued) 












(Continued) 





DP means four terminals with a pair of normally open and normally closed contacts. 



® IC MASTER 1983 



2421 



IC MASTER 



INTERFACE-Analog Switches (Cont'd) 



ON Analog Supply 








Switch Resistance Signal Voltage, 








Function Type 25°C,Q Range V V 


Device 


Source 




Une 


4xSPST JFET 150 






(Cont'd) 




±0.2 


IM5012C 


Intersil 








IH5012M 


t Intersil 








AH501ZC 


Ntlionil 


(3318) 








Matlnn^l 

naiionai 








AM97ClZC 


National 






PMOS 200-600 


MM452 


t Intersil 








MM552 


Intersil 






SxSPST Common Output plus Output Switch 










PMOS - 


G117A 


t Intersil 








6117B 


Intersil 








G117A 


t Siliconix 






SxSPST Common Output 










PMOS - 


G116A 


t Intersil 








G116B 


Intersil 








G116A 


t Siliconix 








G116B 


Siliconix 






GxSPST Common Output 










PMOS - 


G115A 


t Intersil 




70 




G115B 


Intersil 








G118A 


t Intersil 








G118B 


Intersil 








AM2009 


t National 








AM2009C 


National 








G115A 


t Siliconix 








G11SB 


Siliconix 








G118A 


t Siliconix 






2xDPST Common Output 










PMOS - 


MM450 


t Intersil 








MM550 


Intersil 




80 




G122A 


t Siliconix 






3xDPST Common Output 










PMOS - 


G119A 


t Intersil 








G119B 


Intersil 








G119A 


t Siliconix 








G119B 


Siliconix 






Drivers 






HlQh Current Switch (to drive power transistor 










switches) 












SG1629 


t Silicon G 








SG3629 


Silicon G 






2 Chsnnel 












D112C 


Intersil 








D112M 


t Intersil 








D113C 


Intersil 




90 




D113M 


t Intersil 








D120C 


Intersil 








D120M 


t Intersil 








D121C 


Intersil 








D121M 


t Intersil 








D139A 


t Siliconix 








D139B 


Siliconix 








D139C 


Siliconix 






4 Channel 












D129 


Intersil 








0129A 


t Siliconix 




100 




D129B 


Siliconix 






6 Channel 












D123C 


Intersil 








D123M 


t Intersil 








D125C 


Intersil 








D125M 


t Intersil 








D123A 


t Siliconix 








D123B 


Siliconix 








D125A 


t Siliconix 








D12SB 


Sniconix 








CDR125A 


t Teledyne C 




110 



ON Analog Supply 

Switch Resistance Signal Voltage, 
Function Type 25''C, Q Range V V 



Switches without Drivers 



3xSPST Common Output 
JFET 

150 to (Drive-4) 



±0.2 



Q) 
■D 

O 
C 

o 

« 

o 

Q) 
CD 
CO 
' i_ 

CO 



3xSPST JFET 100 



to (Drive-4) 



±0.2 



150 0to(Drive-4) 



±0.2 



PMOS 200-600 



4xSPST Common Output 
JFET - 



100 to (Drive-4) 



±0.2 



150 to (Drive-4) 



±0.2 



PMOS 



4xSPST Two Outputs 
JFET - 
PMOS - 



4xSPST JFET 



100 to (Drive-4) 



;0.2 



150 to (Drive-4) 



(Cont'd) 



iH5030C 
IH5030M 



Intersil 
t Intersil 



IH5014C Intersil 
IH5014M t Intersil 



IH5031C 
IM5031M 



Intersil 
t Intersil 



IH5015C 
IH5015M 



Intersil 
t Intersil 



IH5032C Intersil 
IH5032M t Intersil 



IH5016C 
IH5016M 



Intersil 
t Intersil 



MM455 
MM555 



t Intersil 
Intersil 



G129 

G130 

G131 

G132 

G1350 

G1360 



Intersil 
t Intersil 
t Intersil 
t Intersil 
Intersil 
Intersil 



IM5025C Intersil 
IH5025M t Intersil 



iH5009C 

IH5009M. 

AH5009C 

AM9709C 

AM97C09 



Intersil 
t Intersil 
Nationil 

National 
National 



IH5026C 
IH5026M 



Intersil 
t Intersil 



IH5010C 

IH5010M 

AH5010C 

AM9710C 

AM97C10C 



Intersil 
t Intersil 
Nitlonil 

National 
National 



G124 Intersil 
MM451 t Intersil 
MM551 Intersil 



G123 Intersil 
G123A t Siliconix 
G123B Siliconix 



G125 

G126 

G127 

G128 

G1330 

G1340 



t Intersil 
t Intersil 
t Intersil 
t Intersil 
Intersil 
Intersil 



IH5027C 
IH5027M 



Intersil 
t Intersil 



IH5011C Intersil 

IH5011M t Intersil 

AH5011C NatlOHl 

AM9711C National 

AM97C11C National 



IH5028C 
IH5028M 



Intersil 
t Intersil 



(Cont'd) 



(3318) 



(3318) 



(3318) 



(Continued) 



30 



40 



50 



t Military Temperature Range (-55° to 125°C) 

2422 



* Typical Value 

Btld face ladlcatts aidiiint! data la prorldad m Iha pagt attad. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog Switches (Cont'd) 



ON Analog 
Switch Resistance Signal 
Function Type 25°C,11 Range V 



Supply 
Voltage, 

V Device 



ON Analog 
Switch Resistance Signal 
Function Type 25°C,n Range V 



Supply 
Voltage, 

V Device 



Multiplexers 



4 Channel. See Switches 4xSPST 



Crosspoint Switches 



4 Channel Differential 
6.5 
900 



±15 
±10 



CMOS 230 ± 15 



250 ± 15 



270 ±7.5 



280 



:7.5 



300 ± 15 



320 



±15 



350 
400 



±15 



±15 



450 



±15 



±15 



:7.5 



±7.5 



±15 



±15 



±15 



±15 



±15 



MC142100 
MC145100 

MC3416 

RC4444 

RM4444 

CD22100 

CD22101 

CD22102 

D169 



Motorola (3298) 
Motorola (3298) 
Motorola 
Raytheon 
t Raytheon 
RCA (749,753) 
RCA (749.754) 
RCA (749.754) 
Siliconix 



Hi529 
HI539-2 



HI539-5 



Harris 
t Harris 

( 

Harris 



(2674,3288) 

t 

(2674,3288) 



MP75020IS 



MP7509DIS 



t Micro Pwr 

(401.2749) 
t Micro Pwr (401) 



MVD-409 
MV0-409M 



Data! 
tOatal 



(2622) 
(2622) 



MC14529BA 
MC14529BC 
CD4529BC 
CD4529BM 



t Motorola 
Motorola 
National 

t National 



F4052BC 

F4052BM 

HD14052B 

MG14052BA 

MC14052BC 

CD4052BC 

CD4052BM 

CD4052B 

CD4052BE 

HCC4052B 

HCF4052B 

883/4052B 

SCL4052B 

CM4052B 

CM4052BE 

TC4052B 



Fairchild 
t Fairchild 

Hitachi 
t Motorola 

Motorola 

National 
t National 
tRCA 

RCA 
tSGS 

SGS 

tsss 

SSS 
t Solitron 
Solitron 
Toshiba 



(3318) 
(3318) 
(748) 
(748) 



AD7502J 
AD7502K 
AD7502S 
HI509-2 

HI509-5 

iH6208M 



AD (3176) 
AD (3176) 

tAD (3176) 

t Harris 

(2654,3288) 

Harris 

(2654.3288) 

t Intersil 



MP7502DIJ 
MP75020IK 



MP7509DIJ 
MP7509DIK 



Micro Pwr 

(401.2749) 
Micro Pwr 

(401.2749) 
Micro Pwr (401) 
Micro Pwr (401) 



iH6208C 



Intersil 



Hi1828A-2 

Hi1828A-5 

DG506AA 

DG509A 

DGS09AA 



t Harris 
Harris 
t Sllleonlx (2802) 
t Sllleonlx (2804) 
t Sllleonlx (2804) 



DG506AB 
DG506AC 
DG509AB 



Sllleonlx (2802) 
Sllleonlx (2802) 
Sllleonlx (2804) 

(Continued) 



4 Channel Differential 
CMOS 450 



±15 



20 



30 



750 ±15 ±15 


MPC801 Burr-Brown 


1000 ±13 ±15 


iH5208M t Intersil 


i?nn +n +1"; 


IkCiPORO lntpr<:il 


1300 ±15 ±15 


MPC4D Burr-Brown 


1500 ±15 ±15 


MXD-409 Oatal (2622) 
MX0-409M t Dalai (2622) 
HI509A-2 t Harris 

(2654.3288) 


1800 ±15 ±15 


HI509A-5 Harris 

(2654.3288) 


JFET 260 -15 to 11.5 

±15 


MUX-24A t PMI 
MUX-24E PMI 


350* -15 to 12 ±15 


LF11509 t National (3318) 

LF13509 National 


370 -15 to 12 ±15 


MUX-24B t PMI 
MUX-24F PMI 


4 Channel Sequential Commutator 

PMOS 200-600 ±10 -24,12 


MM554 National 


4 Channel Video 

CMOS 450 ±15 ±15 


HI524-2 t Harris 

(2669.3288) 

HI524-5 Harris 

(2669.3288) 


4 Channel Video Multiplexer 

CMOS 270 ±7.5 ±7.5 


MC14529BA f Motorola 
MC14529BC Motorola 
CD4529BC National 
CD4529BM f National 


4 Channel with Input Latch 

CMOS 400 ±15 ±15 
450 ±15 ±15 


DG529A t Sllleonlx (2806) 
DG52gC Sllleonlx (2806) 


6 Channel 

CMOS 150 ±8 ±8 
JFET 60 ±10 -18,2.8 


MS504 RTC 
CAM601A fTeledyneC 



i Channel 



CMOS 230 



±15 



±15 



40 



250 



±15 



±15 



280 



±7.5 ±7.5 



300 ±15 ±15 



DGS09AC 

DG509B 

DG509C 



(Cont'd) 
Sllleonlx (2804) 
Sllleonlx (2804) 
Sllleonlx (2804) 



MP7501DIS 
MP7S03DIS 
MP7508DIS 



t Micro Pwr 

(401.2749) 
t Micro Pwr 

(401.2749) 
t Micro Pwr (401) 



MV-808 
MV-808M 



DattI 
tPatal 



(2622) 
(2622) 



F4051BC 

F4051BM 

HD14051B 

MC14051BA 

MC14051BC 

CD4501BC 

CD4501BM 

CD4051B 

C04051BE 

HCC4051B 

HCF4051B 

883/4051B 

SCL4051B 

CM4051A 

CM4051AE 

TC4051B 



Fairchild 
t Fairchild 

Hitachi 
t Motorola 

Motorola 

National 
t National 
tRCA 

RCA 
tSGS 

SGS 

tsss 

SSS 
t Solitron 
Solitron 
Toshiba 



(3318) 
(3318) 
(748) 
(748) 



AD7S01J 
AD7501K 
AD7501S 
A07503J 



AD 
AD 
tAD 
AD 



(3176) 
(3176) 
(3176) 
(3176) 

(Continued) 



60 



70 





C/) 
03 



80 



100 



DT' means four terminals with a pair of normally open and normally closed contacts. 



® IC MASTER 1983 



2423 



IC MASTER 



INTERFACE-Analog Switches (Cont'd) 



ON Analog Supply 

Switch Resistance Sisnal Voltage, 
Function Type 25°C,Q Range V V 



ON Analog Supply 

Switch Resistance Signal Voltage, 
Function Type 25°C,!I Range V , V 



Multiplexers 



8 Channel 



CMOS 300 




■D 

*D 

o 

c 
o 

o 

Q) 
CD 
CO 


-♦-> 
(0 

ca 



320 



350 



400 



450 



750 



±15 



±15 



±15 



±15 



±15 



±15 



±15 



±15 



±15,5 



±15 



±15 



±15 



±15 



1000 ±13 ±15 


IH5108M t Intersil 


1200 ±13 ±15 


IH5108C Intersil 


1300 ±15 ±15 


MPC8S Burr-Brown 


1500 ±15 ±15 


MN4708 Analogic 
MX-808 Ditll (2622) 
MX-808M tOitel (2622) 
HI508A-Z t Harris 

(2654.3288) 

HS508ARH t Harris 


1800 ±15 ±15 


HI508A-5 Harris 

(2654,3288) 


JFET 260 -15 to 11.5 

±15 


MUX-08E PMI 
MUX-88E PMI 


300 -15 to 12 ±15 


MUX-08A t PMI 


350* -15to12 ±15 


LF11508 tNatlODil (3318) 

LF13508 National 


370 -15 to 12 ±25 


MUX-08F PMI 
MUX-88F PMI 


400 -15to12 ±15 


DMX-88E PMI 
MUX-08B t PMI 


520 -15to12 ±15 


DMX-88F PMI 


PMOS 150-250 ±5 -20,5 


DG501A t Siliconix 
DG501B Siliconix 
DG501C Siliconix 


150-400 ±5 -20.5 


SI3705 Siliconix 


150-800 ±10 -20,10 


DG503A t Siliconix 
OG503B Siliconix 


200-600 ±5 -15,5 


DG501A t Siliconix 


200-800 ±5 -15,5 


DG501B Siliconix 
0G501C Siliconix 


250-400 ±5 -15.5 


AM3705 Natlmal (3318) 
AM3705C national (3318) 


450 -15 - 20 


3708 Fairchild 



(Cont'd) 



AD7503K 
AD7503S 
HI508-2 

HI508-5 

IH6108M 



(Cont'd) 
AD (3176) 
tAD (3176) 
t Harris 

(2654.3288) 

Harris 

(2654.3288) 

t Intersil 



MP7501DIJ 

MP7501DIK 

MP75a3DIJ 

MP7503DIK 

MP7S08DIJ 
MP7508DIK 



Micro Pwr 

(401.2749) 
Micro Pwr 

(401.2749) 
Micro Pwr 

(401.2749) 
Micro Pwr 

(401.2749) 
Micro Pwr (401) 
Micro Pwr (401) 



IH6108C 



Intersil 



D6S08A 
DG508AA 



t Siliconix 
t Siliconix 



(2804) 
(2804) 



HI1818A-2 
HI1818A-5 



t Harris 
Harris 



(3288) 
(3288) 



DG508AB 
D6508AC 
DG508B 
DG508C 



Siliconix 
Siliconix 
Siliconix 
Siliconix 



(2804) 
(2804) 
(2804) 
(2804) 



MX-818 
MX-818M 



Datel 
t Datel 



8 Channel Differential 
CMOS 230 



250 
270 



±15 
±7.5 



±15 
±7.5 



:15 



:15 



280 



;7.5 



±7.5 



320 



400 



±15 



450 



±15 



±15 



20 



600 



±10 



±15 



750 



±15 



±15 



1300 



±15 



±15 



1500 



±15 



±15 



30 



1800 



±15 



±15 



JFET 300 



-15 to 11 ±15 



450 



-15 to 11.5 



±15 



8 Channel Differential with Storage, Counter 

PMOS 750 ±5 -12,5 



40 



8 Channel, BCD Input, Latch 

PMOS - 60 



0-70 



16 Channel 

CMOS - 
170 



±15 
±15 



±15 
±15 



230 



±15 



250 



±15 



270 



±15 



±15 



50 



280 



±7.5 



:7.5 



MP7507DIS t Micro Pwr 

(401.2749) 

MC14097BA f Motorola 
MC14097BC Motorola 



MVD-807 Dalai 
MVD-807M t Dalai 



(2622) 
(2622) 



CD4097B tRCA 

CD4097BE RCA 

HCC4097B t SGS 

HCF4097B SGS 



(748) 
(748) 



MP7S07DIJ 
MP7507DiK 



Micro Pwr 

(401.2749) 
Micro Pwr 

(401.2749) 



AD7507S 
AD750n 
HiS07-2 

HiS07-5 

DG507A 

DG507AA 

DG528A 



tAD (3176) 
tAD (3176) 
t Harris 

(2650.3288) 

Harris 

(2650.3288) 
t Siliconix (2802) 
tSlilconix (2802) 
t Siliconix (2806) 



AD7507J 

AD7507K 

DG507AB 

DGS07AC 

DG507B 

DGS07C 

DG5Z8C 



AD 
AD 



(3176) 
(3176) 



Siliconix (2802) 

Siliconix (2802) 

Siliconix (2802) 

Siliconix (2802) 

Siliconix (2806) 



Hi518-2 
HI518-5 



IH6216C 
IH6216M 



t Harris 



Harris 



(2666.3288) 

I 

(2666.3288) 



Intersil 
t Intersil 



MPC800 



Burr-Brown 



MPC8D 



Burr-Brown 



MXD-807 Dalai (2622) 
MXD-807M t Dalai (2622) 
Hi507A-2 t Harris 

• (2650.3288) 



MN4708D 
Hi507A-S 



Analogic 
Harris 

(2650.3288) 



MUX-28A t PMI 
MUX-28E PMI 



MUX-28B t PMI 
MUX-28F PMI 



AY5-1016 Gl 
AY6-4016 t Gl 



LS7110 



LSI Comp (696) 



TC5023 
MV-1606M 



Toshiba 
t Dalai 



(2622) 



MP7506DiS 



t Micro Pwr 

(401.2749) 



MC14067BA 
MC14067BC 



t Motorola 
Motorola 



MV-1606 



Dalai 



(2622) 



F4067BC 
F4067BM 
CD4067B 
C04067BE 



Fairchild 
Fairchild 
tRCA (748) 
RCA (748) 

(Continued) 



60 



70 



80 



100 



t Military Temperature Range (-55° to 125''C) 

2424 



* Typical Value 

Bold fact Indlcatts additional data Is provided on liio paga noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Anaiog Switches (Cont'd) 



ON Analog Supply 

Switch Resistance Signal Voltage, 
Function Type 25°C, n Range V V 



Multiplexers 



16 Channel 

CMOS 280 



:7.5 



:7.5 



320 



:15,5 



:15,5 



400 ±15 ±15 


AD7506S tAD (3176) 
AD7506T tAD (3176) 

UmnR 9 4 Uarrl* 

ni9UD*£ jnirns 

(2650.3288) 

HI506-5 Harris 

(2650.3288) 
DG506A tSiliconix (2802) 


450 ±15 ±15 


AD7506J AD (3176) 
AD7S06K AD (3176) 
DGSG6B Siiiconix (2802) 
DGS06C Siiiconix (2802) 


600 ±10 ±15 


HI516-2 t Harris 

(2663.3288) 

HI516-5 Harris 

(2663.3288) 

IH6116C Intersil 
IH6116M t Intersil 


750 ±15 ±15 


MX-1616 Datel 
MX-1616M t Datel 


1000 -5 to 15 ±15,5 


Hi 1840-5 Harris 


1200 ±15 ±15 


MX-1606M IDatal (2622) 


1300 ±15 ±15 


MPC16S Burr-Brown 


1500 ±15 ±15 


MX-1606 Datal (2622) 
HI506A-2 t Harris 



1800 



±15 



±15 



5000 -5 to 15 ±15,5 
±5 to 15 ±15,5 



JFET 300 



-15to11 ±15 



450 



•1510 11.5 



±15 



(Cont'd) 



(Cont'd) 



HCC4067B 
HCF4067B 



tSGS 
SGS 



MP7506DIJ 
MP7506DiK 



Micro Pwr 

(401.2749) 
Micro Pwr 

(401.2749) 



(2650.3288) 



MN4716 
HI506A-5 



Analogic 
Harris 

(2650.3288) 



H1 1840-2 
HS1840RH 



t Harris 
t Harris 



MUX-16A 
MUX-16E 



tPMI 
PMI 



MUX-16B t PMI 
MUX-16F PMI 



CD 

CO 
CO 



20 



30 



® IC MASTER 1983 



or means four terminals witti a pair of normally open and normally closed contacts. 



2425 



IC MASTER 



INTERFACE-Analog to Digital Converters 



Linear- 
ity 

Bits Error 
Res. ±LSB 


Conver- 
sion Time 
±'ALSB 


Power 
DIs. 
mW 
(max.) 


Bin. 
Output 


Off. 
Bin. 
Output 


Compi. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 
in. 


S&H 


Int- 
egra- 
ting 


int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Line 


Binary Output 






3 1/8 


0.02 


_ 


X 
























ADCHU3B 


Datel 






4 1/4 


0.033* 


250 


X 




X 




X 






X 






X 




TDC1021 


tTRW 


(3438) 










X 




X 




X 






X 






X 




TDC1021 


TRW 






6 


1 


_ 




















X 






MAH-08Q1 


AD 


(3175) 




1/8 


_ 




























AD5010K 


AD 


(3175) 


































AD60Z0K 


AD 


(3175) 




1/4 


0.02 


450 


X 


X 












X 






X 




SDA5010 


Siemens 












X 


X 












X 






X 




SDA6020 


Siemens 






1/2 


0.02 


1000 


X 
























ZN440CJ 


Ferranti 








0.033 * 


1000 


X 




X 




X 






X 






X 




TDC1014 


tTHW 


(3438) 


in 








X 




X 




X 






X 






X 




TOC1014 , 


TRW 








0.066 


315 




















X 


X 




CA3300 


RCA 


(3357) 






90 


120 


X 






















X 


NE5036 


Signetics 








100 


100 


X 




















X 




NE5037 


Signetics 








100MHz 


_ 


X 


X 




X 














X 




TDCIOZg 


TRW 


(3438) 






1000 


20* 


X 






















X 


TL507C 


Tl 






7 1/4 


_ 


1200 


X 




















X 




MCI 031 5L 


Motorola 


(Z760) 










X 




















X 




MC10317L 


Motoroli 


(Z760) 




1/2 


20MHz 


_ 


X 


X 




X 














X 




TDC1027 


TRW 


(3438) 




1 


_ 


100* 






















X 


X 


TM1070 


Telmos 




20 


8 


1 


_ 




















X 






MAH-1001 


AD 


(3175) 




1/4 


9 


_ 




X 


X 














X 


X 




ZN447E-8 


DDC 














X 


X 














X 


X 




ZN447J-8 


tDDC 








100* 


875 


X 




















X 




ADC0801 


t Intersil 












X 




















X 




ADC0801C 


Intersil 








110 


875 


X 




















X 




ADC0801C 


National 












X 




















X 




ADC0801M 


t National 






1/2 


0.033 * 


2500 


X 




X 




X 






X 






X 




TDC10Q7 


tTHW 


(3438) 










X 




X 




X 






X 






X 




TDC1007 


TRW 








0.066 


315 




















X 


X 




CA3308 


RCA 


(3359) 


oU 




0.4 


400 


X 




















X 




TDC1001 


TRW 


(3438) 






0.6 


1250 


X 


X 






X 












X 


X 


ADC-815MC 


Datil 


(2619) 










X 


X 






X 












X 


X 


ADC-815MM tDatil 


(Z618) 






0.9 


1400 






X 


X 












X 


X 


X 


DDC-5101 


tDDC 










1550 


X 


X 


















X 


X 


ADC-S101 


Dalol 


(Z621) 










X 


X 


















X 


X 


ADC-5101E 


Datil 


(Z6Z1) 










X 




X 
















X 


X 


ADC-S101H 


t Dalol (Z618,Z621) 










X 




X 


X 












X 


X 


X 


MN5101 


Micro Net 












X 




X 


X 












X 


X 


X 


MN5101H 


t Micro Net 








1 


400 


X 




















X 




TDCIOOZ 


TRW 


(3438) 


An 






500* 


X 


X 
















X 


X 


X 


ZN433BJ-8 


Ferranti 












X 


X 
















X 


X 


X 


ZN433CJ-8 


Ferranti 












X 


X 
















X 


X 


X 


ZN433J-8 


t Ferranti 










1250 


X 


X 






X 












X 


X 


ADC-82SMC 


Datol 


(Z619) 










X 


X 






X 












X 


X 


ADC-8Z5MM fDittl 


(Z618) 






1* 




X 








X 










X 






AM6108 


AMD 


(3103) 






1.2 


1800 






X 


X 












X 






HAS-0802 


AD 


(3175) 






1.5 


1550 


X 




X 


X 












X 


X 


X 


MN5100 


Micro Net 












X 




X 


X 












X 


X 


X 


MN5100H 


t Micro Net 








2.5 


35* 


X 














X 






X 




ADC08Z0 


National 


(33Z1) 


50 






650 


X 


X 






X 










X 


X 




ADC541B-8 


t Hybrid Sys 












X 


X 






X 










X 


X 




ADC541C-8 


Hybrid Sys 
















X 


X 


X 










X 


X 


X 


ADC542B-8 


t Hybrid Sys 
















X 


X 


X 










X 


X 


X 


ADC542C-8 


Hybrid Sys 










915 






X 














X 


X 


X 


MN5140 


Micro Net 

(Continued) 





t Military Temperature Range (-55° to 125°C) 

2426 



* Typical Value 

Bold (aeo Indlcalos additional data Is provldtd on tho pago nolod. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- Povrer 
ity sfonTlmt Dis. 
Bits Error iKLSB mW 
Res. ±LSB nS (max.) 


Bin. 
Output 


0«. 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compl. 

on. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 
In. 


S&H 


Int- 
egra- 
ting 


Int. 
Ret. 


Par. 
Out 


Ser. 
Out 


Device 


Source 


Line 


Binary Output 


(Cont'd) 




8 1/2 2.5 915 






X 














X 


X 


X 


MN5140H 


(Cont'd) 

t Micro Net 






























MN5141 


Uirrn Mat 








X 






















MN5141H 


t Micro Net 








X 
















X 


X 


X 


MN5142 


Micro Net 








X 
















X 


X 


X 


MN5142H 


t Micro Net 






X 


















X 


X 


X 


MN5143 


Micro Net 






)( 
























MN5143H 


t Micro Net 




1000 






X 














X 




X 


MN5130 


Micro Net 










X 














X 


X 


X 


MN5130H 


t Micro Net 








X 
















X 


X 


X 


MN5131 


Micro Net 


10 






X 
















X 


X 


X 


MN5131H 


t Micro Net 








X 
















X 


X 


X 


MN5132 


Micro Net 








X 
















X 


X 


X 


MN5132H 


t Micro Net 






X 


















X 


X 


X 


MN5133 


Micro Net 






X 


















X 


X 


X 


MN5133H 


t Micro Net 






X 


X 


X 














X 


X 


X 


MN5150 


Micro Net 




2.8 650 






X 


X 


X 










X 


X 


X 


HSADC82 


Hybrid Sys 




900 






X 


X 


X 
















ADC82A 


Burr-Brown 




6 1000 






X 














X 


X 


X 


MN5120 


Micro Net 










X 














X 


X 


X 


MN5120H 


t Micro Net 


20 






X 
















X 


X 


X 


MN5121 


Micro Net 








X 
















X 


X 


X 


MN5121H 


t Micro Net 








X 
















X 


X 


X 


MN5122 


Micro Net 








X 
















X 


X 


X 


MN5122H 


t Micro Net 






X 


















X 


X 


X 


MN5123 


Micro Net 






X 


















X 


X 


X 


MN5123H 


-j- Micro Net 




7 1165 




X 










X 


X 




X 


X 


X 


MN7100 


Micro Net 








X 










X 


)( 




X 


X 


X 


MN7100H 


t Micro Net 








X 










X 


)( 




X 


X 


X 


MN7120 


Micro Net 








X 










X 


X 




X 


X 


X 


MN7120H 


t Micro Net 


30 


8 — 


X 


















X 






ZN437E-8 


Ferrsinti 






X 


X 
















X 






ZN437J-8 


*f FerrHnti 




9 _ 




X 


X 














X 


X 




ZN448E-8 


Ferrstnti 








X 


X 














X 






ZN448J-8 


"j* Ferrsntl 




12 720 








X 












X 


X 


X 


MN509 


Micro Net 












X 












X 


X 


X 


MN509H 


t Micro Net 




900 


X 


















X 


X 


X 


MN502 


Micro Net 






X 


















X 


X 


X 


MN502H 


t Micro Net 












X 












X 


X 


X 


MN503 


Micro Net 












X 












X 


X 


X 


MN503H 


t Micro Net 


40 








X 














X 


X 


X 


MN504 


Micro Net 










X 














X 


X 


X 


MN504H 


t Micro Net 












X 












X 


X 


X 


MN507 


Micro Net 












X 












X 


X 


X 


MN507H 


t Micro Net 




15 30 


X 


X 




X 












X 






AD7574B 


AD (3174) 






X 


X 




X 












X 






AD7574K 


AD (3174) 






X 


X 




X 












X 






AD7574T 


tAD (3174) 






X 


X 




X 












X 






MP7S74B 


Micro Pwr 

(401.2749) 






X 


X 




X 












X 






MP7574K 


Micro Pwr 

(401.2749) 








X 




X 












X 






MP7574T 


Micro Pwr 

(401.2748) 


50 


125* 


X 


X 
















X 


X 




ZN427E-8 


Ferranti 






X 


X 
















X 


X 




ZN427J-8 


t Ferranti 

(Continued) 





Q) 



C 

o 
o 

0) 


CO 

1- 



CO 

CO 



Bin.— Binary Compl.— Complementary CTC— Compl. 2's Compl. Mux. In— Multiplexed Inputs Par. Out— Parallel Output 

Off.— Offset Magn.- Magnitude Int. Ref.— internal Reference S&H— Sample and Hold Ser. Out— Serial Output 



®IC MASTER 1983 



2427 



IC MASTER 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
Ity slon Time 
Bits Error ±ViLSB 
Res. ±LSB lis 


Power 
Dis. 
mW 
(max.) 


Bin. 
Output 


Ofl. 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 
2's 
Compl. 
Output 


sign. 
Magn. 
Output 


Mux. 
In. 


S&H 


Int- 
egra- 
ting 


Int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Line 


Binary Output 


(Cont'd) 




8 1/2 

17 


300 


X 




















X 




NE5034 


Slgiittlct 


Cont'd) 
(3396) 




20 


350* 


X 


X 
















X 


X 


X 


ZN432-8 


t Ferranti 












X 
















X 


X 


X 


ZN432B-8 


Ferranti 












X 
















X 


X 


X 


ZN432C-8 


Ferranti 










X 


X 
















X 


X 


X 


ZN432E-8 


Ferranti 






30 




X 


















X 






AD673J 


AD 


(3174) 








X 


















X 






AD673S 


tAD 


(3174) 




40 


5* 


X 


X 


















X 


X 


AD7570J 


AD 










X 


X 


















X 


X 


MP7S70J 


Micro Pwr 

(401.2749) 








X 


X 


















X 


X 


MP7570P 


t Micro Pwr 

(401.2749) 


10 




10* 


X 












X 








X 




ADC0844 


Natloflil 


(3324) 






175* 


X 


X 
















X 


X 




■nK7n 1 
AUO/UJ 


AD 


(3174) 








X 


X 
















X 


X 




AD570S 


tAD 


(3174) 








X 


X 
















X 


X 




MCE570J 


Micro Eng 


(4440) 








X 


X 
















X 


X 




MCE570S 


t Micro Eog 


(4440) 




60MHz - 


X 


X 




X 














X 




TDC1025 


TRW 


(3438) 




66.6 




X 
























AD8581L 


AD 






80 


10 


X 






















X 


ADC0831B 


NitlORll 

(3319.3322) 








X 






















X 


ADbUBil£D 


NlllOMl 

(3319.3322) 








X 






















X 


ADC0833B 


NillontI 

(3319.3323) 


20 






X 






















X 


ADC0834B 


NlllODll 

(3319.3322) 








X 






















X 


ADC0838B 


NitlORll 

(3319.3322) 




100 


30 


X 












X 








X 




ADC0808 


Nitlonil 


(3319) 








X 












X 








X 




ADC0816 


tNltlOMi 


(3319) 








X 












X 








X 




ADC0808 


Tl 








70 






X 














X 


X 


X 


ADC-830 


Datel 
















X 












X 


X 


X 


MN5065 


Micro Net 
















X 












X 


X 


X 


MN5065H 


t Micro Net 














X 














X 


X 


X 


MN5066 


Micro Net 














X 














X 


X 


X 


MN5066H 


, t Micro Net 




30 


100* 


875 


X 




















X 




ADC0802 


t Intersil 










X 




















X 




ADC0802C 


Intersil 










X 




















X 




ADC0803 


t Intersil 










X 




















X 




ADC0803C 


Intersil 










X 




















X 




ADC0802 


tNttlooil 


(3319) 








X 




















X 




ADC0802C 


NitlORll 


(3319) 








X 




















X 




ADC0803 


t NitlORll 


(3319) 








X 




















X 




ADC0803C 


NitlORll 


(3319) 




108* 


6.8 


X 












X 








X 




MK50808 


Mostek 










X 












X 








X 




MK50816 


Mostek 




40 


300 


15* 


X 












X 












TL530 


Tl 


(2865) 








X 
























TLS32 


Tl 


(2868) 




1250* 


20* 


X 


X 


















X 




4140 


Teledyne P 










X 


X 


















X 




4143 


Teledyne P 










X 


X 


















X 




4143-01 


t Teledyne P 






1800 


20 


X 


X 














X 




X 




ADC-EK8B 


DIM 


(2619) 






25 


X 
















X 




X 




TSC8700 


Teledyne S 










X 
















X 




X 




TSC8703 


Teledyne S 








43 


X 




















X 




ADC-ET8BM 


tDiM 


(2619) 






50 


X 




















X 




ADC-ET8BC 


Ditrt (2619) 

(Continued) 


50 



t Military Temperature Range (-55° to 125°C) 

2428 



* Typical Value 

Bold (an iRdieitos tddltloRil dati Is prov idod or thi pigi Rotod. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- Power 
Ity sion Time Dis. 
Bits Error t'ALSB mW 
Res. +LSB ^ (max.) 


Bin. 
Output 


Off. 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 
In. 


S4H 


Int- 
egra- 
ting 


Int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Line 


Binary Output 


(Cont'd) 




8 

3/4 15 30 


X 


X 




X 












X 






AD7574A 


AD 


Cont'd) 
(3174) 






X 


X 




X 












X 






AD7574J 


AD 


(3174) 






X 


X 




X 












X 






AD7574S 


tAD 


(3174) 






X 


X 




X 












X 






MP7574A 


t Micro Pwr 

(401,2749) 






X 


X 




X 












X 






MP7574J 


Micro Pwr 

(401.2749) 






X 


X 




X 












X 






MP7574S 


t Micro Pwr 

(401.2749) 




66.6 


X 
























AD7581K 


AD 


(3174) 




70 2.5* 


X 












X 








X 




TL520 


Tl 






1 2.5 1010 




X 




















X 


HS5131B 


t Hybrid Sys 










X 




















X 


HS5131C 


Hybrid Sys 




10 


9 — 




X 


X 














X 


X 




ZN449E-8 


DDC 










X 


X 














X 


X 




ZN449J-8 


tDDC 






80 10 


X 






















X 


ADC0831C 


Nitlonal 

(3319.3322) 






X 
























ADC0832C 


Nitlonal 

(3319.3322) 






X 






















X 


ADC0833C 


Nitionii 

(3319.3323) 






























AnC083dC 

AUUUOUHb 


Nitlonii 

(3319.3322) 






X 






















X 


ADC0838C 


National 

(3319.3322) 




100 2.5* 


X 












X 








X 




TL521 


Tl 






30 


X 












X 








X 




ADC0817 


t National 


(3319) 






X_ 












X 








X 




ADC809 


National 




on 




, X 












X 








X 




ADC809 . 


Ti 






100 * 875 


X 




















X 




ADC0804 


t Intersil 








X 




















X 




ADC0804C 


Intersil 








X 




















X 




ADC0804C 


National 


(3319) 




103 .875 


X 




















X 




ADC0804 


Tl 






110 875 






















X 




ADC0805C 


National 


(3319) 






























ADC0805M 


t National 


(3319) 




112* 15 


X 












X 










X 


mPD7001 


NEC-Micro 






300 15 * 


X 












X 












TL531 


Tl 


(2866) 






X 
























TL533 


Tl 


(2867) 


30 


2000 6.5 * 


X 


















X 




X 


TC5091 


Toshiba 






300 


X 


















X 




X 


TC5090 


Toshiba 






2 50 255 


X 




















X 




ADC0800PC 


National 


(3319) 




80 255 


X 




















X 




ADC0800P 


t National 


(3319) 




8 (analog input for microprocessors) 
1/2 2.5 1350 


X 












X 












MP20 


Burr-Brown 








X 












X 












MP21 


Burr-Brown 






32 50* 


X 
























MC 14444 


Motorola 






,400 1000 


X 












X 




X 








AD7583K 


AD 






8 (analog to pulse width converter for 
microprocessor systems) 

1/2 - 15 * 














X 












H^C 14443 


Motorola 






32 50 * 














X 












MC 14447 


Motorola 




40 


75* 














X 












MA9708C 


Fairchild 




















X 












MA9708M 


t Fairchiid 






8(D/A. A/D, with counter) 

1/2 500 150 


X 


X 
















X 


X 




ADC-MC8BC 


Datel 


(2619) 






X 


X 
















X 


X 




ADC-iVICSBM t Datel 





Bin.— Binary Compl.— Complementary CTC— Compl. 2's Compl. Mux. in- Multiplexed Inputs Par. Out— Parallel Output 

Off.— Offset Magn.— Magnitude int. Ref.— Internal Reference S&H— Sample and Hold Ser. Out— Serial Output 



® IC MASTER 1983 



2429 



IC MASTER 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
Ity slon Time 
Bits Error ±</iLSB 
Res. ±LS8 mS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Output 


Oft. 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


sign. 
Magn. 
Output 


Mux. 
In. 


S&H 


Int- 
egra- 
ting 


Int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Une 


Binary Output 


(Cont'd) 




9 1/2 1 


500* 


X 


X 
















X 


X 


X 


ZN433BJ-9 


tDDC 










X 


X 
















X 


X 


X 


ZN433CJ-9 


tDDC 










X 


X 
















X 


X 


X 


ZN433J-9 


tDDC 






20 


350 


X 


X 
















X 


X 


X 


ZN432E-9 


FerrantI 








350* 


X 


V 
X 
















X 


X 




ZN432BJ-9 


Ferranti 










X 


X 
















X 


X 




ZN432CJ-9 


Ferranti 










X 


X 
















X 


X 




ZN432J-9 


t Ferranti 






9 (video A/D converter) 
1/2 0.02 


2500 


X 








X 
















TDC1019J 


TRW 


(3438) 




10-3 


— 




















X 








AD 


(3175) 




1/4 18 


_ 






X 


X 


X 










X 


X 


X 


ADC1280 


NatlOBil 


(3344) 


in 


1/2 0.8 


3600 


X 


X 






X 










X 


X 


X 


ADC-816MC 


Dim 


(2619) 








X 


X 






X 










X 


X 


X 


ADC-816MM tDalil 


(2618) 




1 


500* 


X 


X 
















X 


X 


X 


ADC-856C 


Diltl 


(2621) 








X 


X 
















X 


X 


X 


ADC-856M 


t Datel 










X 


X 
















X 


X 


X 


ZN433BJ-10 


Ferranti 










, X 


X 
















X 


X 


X 


ZN433CJ-10 


Ferranti 










X 


X 
















X 


X 


X 


ZN433J-10 


t Ferranti 










X 


X 
















X 


X 


X 


ZN433CK-10 


DDC 










X 


X 
















X 


X 


X 


ZN433K-10 


DDC 






1.4 


1800 * 






X 


X 












X 






HAS-1002 


AD 


(3175) 


20 




3600 


X 


X 






X 










X 


X 


X 


ADC-826MC 


Diltl 


(2619) 








X 


X 






X 










X 


X 


X 


ADC-826MM tDltll 


(2618) 




1.8 


755* 


X 


X 
















X 


X 


X 


AD579B 


AD 


(3175) 








X 


X 
















X 


X 


X 


AD579K 


AD 


(3175) 






























X 


AD579T 


tAD 


(3175) 




2.2 


755 * 


























A057gj 


AD 


(3175) 




5 


1400 * 


























MN5240-10 


Micro Net 








1600 * 


























DDC-5240-10tDDC 




g 


1100 


























ADC-84-10 


DtttI 


(2618) 
































ADC-85C-10 


Dital 


(2619) 


30 




1200 






















)( 


)( 


DDCADC87- 
10 


DDC 








1200* 






X 


X 


X 










X 


X 


X 


DDCADC85- 
10 


DDC 






8 


1400* 






X 


X 


X 










X 


X 


X 


MNAOC84-10 


Micro Net 














X 


X 


X 










X 


X 


X 


MNADC85-1Q 


t Micro Net 






10 


1100 






X 


X 


X 










X 


X 


X 


ADC-87-10 


Dttll 


(2618) 






1500 






X 


X 


X 










X 


X 


X 


ADA0C84-10 


AD 


(3175) 












X 


X 


X 










X 


X 


X 


ADC84-10 


Burr-Brown 








1800 






X 


X 


X 










X 


X 


X 


ADADC85-10 


AD 


(3175) 










X 


X 


X 


X 










X 


X 


X 


ADC85-10 


Burr-Brown 






15 




X 


















x^ 






AD573K 


AD 


(3174) 


40 






X 


















X 






AD573S 


tAD 


(3174) 


























X 


X 




ZN442E 


Ferranti 




























X 


X 




ZN442J 


t Ferranti 






18 








X 


X 


X 










X 


X 


X 


ADC1080 


NltltMl 

(3319,3344) 




20 


350* 


X 


X 
















X 


X 


X 


ZN432-10 


t Ferranti 










X 


X 
















X 


X 


X 


ZN432B-10 


Ferranti 










X 


X 
















X 


X 


X 


ZN432C-10 


Ferranti 










X 


X 
















X 


X 


X 


ZN432E-10 


Ferranti 










X 


X 
















X 


X 


X 


ZN432CK-10 


DDC 










X 


X 
















X 


X 


X 


ZN432K-10 


DDC 

(Continued) 


50 



t Military Temperature Range (-55° to 125°C) 

2430 



* Typical Value 

Bold fice IndleilM iddllloiiil dali It provided en tbi pigi noted. 



« IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
ity sion Time 
Bits Error +y!LSB 
Res. ±LSB liS 


Power 
Dis. 
mW 
(max.) 


Bin. 
Output 


Off. 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Slijn. 
Magn. 
Output 


Mux. 
In. 


S4H 


Int- 
.egra- 
tlng 


Int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device Source 


Line 


Binary Output 


(Cont'd) 




10 1/2 

21 


800 






x 




)( 










X 






(Cont'd) 

ADA0C80-15 AO (3174) 












X 




X 










X 


X 




ADAOCBOZ- 

in 4> in ^'i^^M\ 
lU J (v 1 '4| 




30 


300 


X 


X 
















X 


X 




nUQilh All (ol/4J 








X 


X 
















X 


X 




IVlrO/lN Micro rWi 




120 


5* 


X 


X 


















X 


X 


An7C7ni An 








X 


X 


















X 


X 


Mr/ u/UL Micro rWr 

(401.2749) 








X 


X 


















X 


X 


MP7570S t Micro Pwr 

(401,2749) 




200 




X 




















X 




ADC1001B National (3319) 








X 




















X 




ADC1021B National (3319) 




5000 


20 * 


X 


X 


















X 




4144 Teledyne P 


10 


6000 


20 


X 


X 














X 




X 




A0C-EK10B Datil (2619) 






25 


X 
















X 




X 




TSC8701 Teledyne S 








X 
















X 




X 




TSC8704 Teledyne S 






43 


X 




















X 




AOC-ETIOBMtDatal (2619) 






50 


X 




















X 




A0C-ET10BC DattI (2619) 




1 15 


- 


X 


















X 






AD573J AD (3174) 




30 


300 


X 


X 
















X 


X 




AD571J AD (3174) 








X 


X 
















X 


X 




A0571S tAO (3174) 








X 


X 
















X 


X 




MP571J Micro Pwr 








X 


X 
















X 


X 




MP571S t Micro Pwr 


20 






X 


X 
















X 


X 




MCE571J Micro Eog (4440) 








X 


X 
















X 


X 




MCFSTK 'fMiernFnn (AAAB\ 




200 





X 




















X 




ADCinmC Hitlanil f^^lQk 
nuwiuuiw nsiiuiisi (wuisi/ 








X 




















X 








10 Plus Sign 

1/2 80 


- 


X 


X 




X 














X 


X 


AD7571K AD (3171.3174) 








X 


X 




X 














X 


X 


AD7S71T tAO (3171.3174) 




1 80 


- 


X 


X 




X 














X 


X 


A07571J AO (3171,3174) 








X 


X 




X 














X 


X 


A07571S tAD (3171,3174) 




11 1 15 


500 


X 


X 
















X 


X 




HS574J Hybrid Sys (2743) 








X 


X 
















X 


X 




HS574S t Hybrid Sys (2743) 


30 


12 1/2 1 


1500 






X 


X 


X 










X 


X 


X 


MN5245 Micro Net 




2 


1800* 


X 


X 






X 










X 


X 


X 


ADC-8516-12 DDC 






1900 


X 


X 






X 










X 


X 


X 


A0C-817MC Oatol (2619) 








X 


X 






X 










X 


X 


X 


A0C-817MM tOatat (2618) 






2500 






X 


X 


X 










X 


X 


X 


ADC0O401 DDC 




2.2 


1800* 






X 


X 












X 






HAS-1202 AD (3175) 




3 


775 * 


X 


X 
















X 


X 




AD578L AO (3172,3175) 






1900 


X 


X 






X 










X 


X 


X 


A0C-827MC Oatol (2621) 








X 


X 






X 










X 


X 


X 


ADC-827MM f Dotal (2618) 




3.5 


1.8 


X 


X 






X 










X 


X 


X 


ADC60-12 Burr-Brown 


40 


4.5 


755* 


X 


X 
















X 


X 


X 


ADS78K AD (3172,3175) 






775* 


X 


X 
















X 


X 


X 


AD578T tAO (3172.3175) 




5 




























AD5240K AO (3175) 
































A05240S AD (3175) 






1400* 






X 


X 


X 










X 


X 


X 


MN5240-12 Micro Net 












X 


X 


X 










X 


X 


X 


4189 Teledyne P 






1600* 






X 


X 


X 










X 


X 


X 


DDC-5240-12tDDC 






2175 






X 


X 


X 










X 


X 


X 


ADH-8586-12tDDC 




6 


775* 


X 


X 
















X 


X 


X 


AD578J AO (3172.3175) 








X 


X 
















X 


X 


X 


AD578S tAO (3172.3175) 


50 


7 


1200* 






X 


X 


X 










X 


X 


X 


TDADC85 Teledyne P 












X 


X 


X 










X 


X 


X 


TDADC87 t Teledyne P 

(Continued) 





Bin.— Binary 
Off.-OHset 



Compl.— Complementary 
Magn.— Magnitude 



CTC-Compl. 2's Compl. 
Int. Ref.— Internal Reference 



Mux. in— Multiplexed Inputs 
S&H-Sampie and Hold 



® IC MASTER 1983 



Par. Out-Parallel Output 
Ser. Out— Serial Output 

2431 



IC MASTER 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
Ity slon Time 
Bits Error ±VilSB 
Res. ±LSB fiS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Output 


Off. 
Bin. 
Output 


Compi. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 

-. In. 


S&H 


Int- 
egra- 
ting 


Int. 
Ref. . 


Par. 
Out 


Ser. 
Out 


Device Source 


Line 


Binary Output 


(Cont'd) 




12 1/2 

8 


1400* 






X 


X 


X 










X 


X 


X 


(Cont'd) 

MNADC84-12 Micro Net 












X 


X 


X 










X 


X 


X 


MNADC85-12 Micro Net 












X 


X 


X 










X 


X 


X 


MNADC87 Micro Net 






1500 






X 


X 


X 










X 


X 


X 


ADC87/MIL t Burr-Brown 












X 


X 


X 










X 


X 


X 


ADC87U Burr-Brown 






2000 






X 


X 


X 










X 


X 


X 


ADC- 

HZ12BGC Ditll (2619) 












X 


X 


X 










X 


X 


X 


ADC- 

HZ12BMM t (2618) 




g 


2150 






X 


X 








X 




X 


X 


X 


ADC- 

HS12BMC Date! 












X 


X 








X 




X 


X 


X 


ADC- 

HS128MM tDital (2618) 




9 * 


2845 


X 


X 










X 


X 




X 


X 




HDAS-16MC Datal (2623) 


10 






X 


X 










X 


X 




X 


X 




HDAS-16MM t Datal (2620) 








X 


X 










X 


X 




X 


X 




HDAS-8MC Datal (2623) 








X 


X 










X 


X 




X 


X 




HDAS-8MM t Datal (2620) 




10 


1100 






X 


X 


X 










X 


X 


X 


ADC-84-12 Datel 












X 


X 


X 










X 


X 


X 


ADC-85-12 Datel 












X 


X 


X 










X 


X 


X 


ADC-85C-12 Datel 










X 


X 


X 


X 










X 


X 


X 


ADC-87-12 Datel 






1200 






X 


X 


X 










X 


X 


X 


HSADC85B f Hybrid Sys (2744) 












X 


X 


X 










X 


X 


X 


HSADC85C Hybrid Sys (2744) 






1200* 






X 


X 


X 










X 


X 


X 


DDCADC85- 

12 DDC 


20 










X 


X 


X 










X 


X 


X 


DDCADC87- 

12 DDC 






1550 






X 


X 


X 










X 


X 


X 


ADADC84-12 AD (3175) 












X 


X 


X 










X 


X 


X 


ADC84-12 Burr-Brown 






1575 






X 


X 


X 










X 


X 


X 


ADH-8585-12 

t DDC 






1800 






X 


X 


X 










X 


X 


X 


ADADC85-12 AD (3175) 












X 


X 


X 










X 


X 


X 


ADC85-12 Burr-Brown 






2000 


X 








X 










X 


X 


X 


HI5712-2 t Harris 

(2704.3288.3201) 








X 








X 










X 


X 


X 


HI5712-5 Harris 

(2704.3288.3291) 








X 








X 










X 


X 


X 


HI5712-7 Harris 

(2704.3288,3291) 








X 








X 










X 


X 


X 


HI5712-B t Harris 

(2704.3288.3291) 


30 






X 








X 










X 


X 


X 


HI5712A-2 t Harris • 

(2704.3288.3291) 








X 








X 










X 


X 


X 


HI5712A-7 Harris 

(2704.3288.3291) 








X 








X 










X 


X 


X 


HIS712A-8 t Harris 

(2704.3288,3291) 




13 


744 






X 


X 














X 


X 


ADC-5213 Datal (2621) 












X 


X 














X 


X 


ADC-5213E Datal (2621) 












X 


X 














X 


X 


ADC-5213H t Datal (2618.2621) 












X 


X 














X 


X 


ADC-5214 Dalai (2621) 












X 


X 














X 


X 


ADC-5214E Datal (2621) 












X 


X 














X 


X 


ADC-5214H t Datal (2618.2621) 












X 


X 














X 


X 


ADC-5215 Datal (2621) 


40 










X 


X 














X 


X 


ADC-5215E Datal (2621) 












X 


X 














X 


X 


A0C-5215H t Dalai (2618.2621) 






745 


X 




















X 


X 


MN5213 Micro Net 








X 




















X 


X 


MN5213H t Micro Net 














X 














X 


X 


MN5214 Micro Net 

(Continued) 





Q) 
(0 



t Military Temperature Range (-55° to 125°C) 

2432 



* Typical Value 

BoM facs Indlcatas additional data Is provldsd on ths paga noted. 



^ IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
ity sion Time 
Bits Error ±Vi!LSB 
Res. ±LSB ^ ijS 


Power 
Ois. 
mW 
(max.) 


Bin. 
Output 


0«. 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 
In. 


S&H 


Int- 
egra- 
ting 


Int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Line 


Binary Output 


(Cont'd) 




12 1/2 13 


745 








X 














X 


X 


MN5214H 


t Micro Net 


(Cont'd) 














X 














X 


X 


MN5215 


Micro Net 
















X 














X 


X 


MN5215H 


t Micro Net 








915 






X 


X 












X 


X 


X 


ADC-S210 


Oatil 


(2621) 












X 


X 












X 


X 


X 


ADC-S210E 


Ditil 


(2621) 












X 


X 












X 


X 


X 


ADC-S210H 


tDitil (2618.2621) 












X 


X 












X 


X 


X 


ADC-5211 


Dital 


(2621) 












X 


X 












X 


X 


X 


ADC-5211E 


Datil 


(2621) 












X 


X 












X 


X 


X 


ADC-5211 H 


tDatil (2618.2621) 












X 


X 












X 


X 


X 


ADC-5212 


Diltl 


(2621) 


10 










X 


X 












X 


X 


X 


ADC-5212E 


DiUI 


(2621) 












X 


X 












X 


X 


X 


ADC-5212H 


tDatsI (2618.2621) 












X 


X 












X 


X 


X 


ADC-5216 


Datal 


(2621) 












X 


X 












X 


X 


X 


ADC-5216E 


Dalai 


(2621) 












X 


X 














X 


X 


ADC-5216H 


t Datal (2618.2621) 












X 














X 


X 


X 


ADC582B-12 t Hybrid Sys 












X 














X 


X 


X 


ADC582C-12 


Hybrid Sys 














X 


X 












X 


X 


X 


DDC-5210-1 


tDDC 














X 


X 












X 


X 


X 


ODC-5211-1 


tDDC 














X 


X 












X 


X 


X 


DDC-5212-1 tDDC 


20 










X 


X 












X 


X 


X 


DDC-5216-1 tDDC 












X 


X 












X 


X 


X 


DDC5210-3 


DDC 














X 


X 












X 


X 


X 


DDC5211-3 


DDC 














X 


X 












X 


X 


X 


DDC5212-3 


DDC 














X 


X 












X 


X 


X 


DDC5216-3 


DDC 














X 


X 












X 


X 


X 


MN5210 


Micro Net 














X 


X 












X 


X 


X 


MN5210H 


t Micro Net 














X 


X 












X 


X 


X 


MN5211 


Micro Net 














X 


X 












X 


X 


X 


MN5211H 


t Micro Net 














X 


X 












X 


X 


X 


MN5212 


Micro Net 




30 










X 


X 












X 


X 


X 


MN5212H 


t Micro Net 














X 


X 












X 


X 


X 


MN5216 


Micro Net 














X 


X 












X 


X 


X 


MN5216H 


t Micro Net 














X 


X 












X 


X 


X 


TP5210 


t Teledyne P 








1000 


X 


















X 


X 


X 


A05210 


AD 


(3174) 














X 












X 


X 


X 


AD5211 


AD 


(3174) 














X 












X 


X 


X 


AD5212 


AD 










X 




















X 


X 


AD5213 


AD 
















X 














X 


X 


AD5214 


AD 


(3174) 














X 














X 


X 


AD5215 


AO 




40 










X 














X 


X 


X 


AD5216 


AD 






15 . 


500 


X 


X 
















X 


X 




HS574K 


Hybrid Sya 


(2743) 








X 


X 
















X 


X 




HS574L 


Hybrid Syt (2743) 




20 


725 






X 


X 


X 










X 


X 


X 


ADC581B-12 t Hybrid Sys 












X 


X 


X 










X 


X 


X 


ADC581C-12 


Hybrid Sys 








2000 






X 


X 


X 










X 


X 


X 


ADC- 
HX12BGC 


Datal 


(2619) 












X 


X 


X 










X 


X 


X 


ADC- 

HX12BMM 


t Datal 


(2618) 




25 


360* 


X 


X 
















X 




X 


HI574A 


Harria 


(2712) 






725 


X 


X 
















X 




X 


AD574AK 


AD 


(3174) 






800 






X 


X 


X 










X 


X 


X 


ADADC80-12 


AD 


(3174) 


50 










X 


X 


X 










X 


X 


X 


ADADC80Z- 
12 


t*D 


(3174) 






925 


X 


X 






X 










X 


X 


X 


AD572A 


AD (3174) 

(Continued) 





Bin.— Binary 
Otf.-Offset 



Compl.— Complementary 
Magn.— Magnitude 



CTC-Compl. 2's Compl. 
int. Ref.— Internal Reference 



Mux. in— Multiplexed Inputs 
S&H-Sampie and Hold 



® IC MASTER 1983 



Par. Out— Parallel Output 
Ser. Out— Serial Output 

2433 



IC MASTER 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
Ity slonTlnw 
Bits Error ±</^LSB 
Res. ± LSB fiS 


Power 

Dis. 

mW 

Jmax;) 


Bin. 
Output 


Off.' 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compi. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 
In. 


S&H 


Int- 
egra- 
ting 


Int. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Line 


Binary Output 




















(Cont'd) 




12 1/2 25 


925 


X 


X 






X 










X 


X 


X 


AD572B 


AD 


Cont'd) 
(3174) 








X 


X 






X 










X 


X 


X 


AD572S 


tAD 


(3174) 






950* 






X 


X 


X 










X 


X 


X 


A0C80-12 


Burr-Brown 














X 


X 


X 










X 


X 


X 


AOC80A-12 


Burr-Brown 






30 


- 


X 


X 






X 






X 










HI5812 


Harris 








780 


X 


X 
















X 




X 


AD574K 


AD 


(3174) 








X 


















X 




X 


AD574L 


AD 


(3174) 








X 


X 
















X 




X 


AD574S 


tAD 


(3174) 








X 


X 
















X 




X 


A0574T 


tAD 


(3174) 








X 


















X 




X 


A0S74U 


tAD 


(3174) 


10 






X 


X 
















X 




X 


MCD574K 


Micro Eng 










X 


















X 




X 


MCE574L 


Micro Eng 


(4440) 








X 


X 
















X 




X 


MCE5748 


t Micro Eng 


(4440) 








X 


X 
















X 




X 


MCE574T 


t Micro Eng 


(4440) 








X 


















X 




X 


MCE574U 


t Micro Eng 


(4440) 




35 


620 


X 


X 
















X 




X 


AD574ZL 


AD 


(3174) 








X 


X 
















X 




X 


AD574ZS 


tAD 


(3174) 








X 


X 
















X 




X 


AD574n 


tAD 


(3174) 








X 


X 
















X 




X 


AD574ZU 


tAD 


(3174) 








X 


X 
















X 




X 


MCE574ZL 


Micro Eng 


(4440) 


20 






X 


X 
















X 




X 


MCE574ZS 


t Micro Eng 


(4440) 








X 


X 
















X 




X 


MCE574n 


t Micro Eog 


(4440) 








X - 


X 
















X 




X 


MCE574ZU 


Micro Eng 


(4440) 




50 


725 


X 




















X 


X 


AD504B 


AD 


(3153) 








X 


















X 


X 


X 


AD5201B 


AD 










X 


















X 


X 


X 


AD5201T 


tAD 










X 


















X 


X 


X 


AD5202B 


AD 










X 


















X 


X 


X 


AD5202T 


tAD 










X 




















X 


X 


AD5204T 


tAD 










X 




















X 


X 


AD5205B 


AD 




30 






X 




















X 


X 


AD5205T 


tAD 








745 


X 




















X 


X 


MN5203 


Micro Net 










X 




















X 


X 


MN5203H 


t Micro Net 
















X 














X 


X 


MN5204 


Micro Net 
















X 














X 


X 


MN5204H 


t Micro Net 
















X 














X 


X 


MN5205 


Micro Net 
















X 














X 


X 


MN5205H 


t Micro Net 








770 


X 


X 






X 










X 


X 


X 


ADC10HT 


t Burr-Brown 








915 






X 


X 












X 


X 


X 


DDC-5200-1 tDDC 












X 


X 












X 


X 


X 


DDC-5201-1 


tDDC 




40 










X 


X 












X 


X 


X 


DDC-5202-1 tDDC 












X 


X 












X 


X 


X 


DOC-5206-1 tDDC 












X 


X 












X 


X 


X 


DDC5200-3 


DDC 














X 


X 












X 


X 


X 


DDC5201-3 


DDG 














X 


X 












X 


X 


X 


DDC5202-3 


DDC 














X 


X 












X 


X 


X 


DDC5206-3 


DDC 










X 


















X 


X 


X 


MN5200 


Micro Net 










X 


















X 


X 


X 


MN5200H 


t Micro Net 
















X 












X 


X 


X 


MN5201 


Micro Net 
















X 












X" 


X 


X 


MN5201H 


t Micro Net 




50 












X 












X 


X 


X 


MN5202 


Micro Net 
















X 












X 


X 


X 


MN5202H 


t Micro Net 














X 














X 


X 


X 


MN5206 


Micro Net 














X 














X 


X 


X 


MN5206H 


t Micro Net 








1000 








X 












X 


X 


X 


AD5201 


AD 

(Continued) 





Q) 
CO 



t Military Temperature Range (-55° to 125°C) 

2434 



* Typical Value 

Bold fico Ittdlcitts iddltlottil data Is provided on Iho pago notod. 



®IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
ity sion Time 
Bits Error ±'ALSB 
Res. ±LSB tiS 


Power 
Dis. 
mW 
(max.) 


Bin. 
Output 


Off. 
Bin. 
Output 


Compi. 
Bin. 
Output 


Compl. 

Off. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 
In. 


S&H 


Int- 
egra- 
ting 


Int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Line 


Binary Output 


(Cont'd) 




12 1/2 50 


1000 








X 












X 


X 


X 


AD5202 


AD 


(Cont'd) 








X 




















X 


X 


AD5203 


AD 
















X 














X 


X 


AD5204 


AD 
















X 














X 


X 


AD5205 


AD 




































AD 






175 


80 


X 


















X 


X 


X 


MN5250 


Micro Net 










X 


















X 


X 


X 


MN5250H 


t Micro Net 
















X 












X 


X 


X 


MN5251 


Micro Net 
















X 












X 


X 


X 


MN5251H 


t Micro Net 
















X 












X 


X 


X 


MN5252 


Micro Net 




10 












X 












X 


X 


X 


MN5252H 


t Micro Net 














X 














X 


X 


X 


MN5253 


Micro Net 














X 














X 


X 


X 


MN5253H 


t Micro Net 






200 


210 


X 




















X 


X 


ADC1210 


National 


(3344) 








X 




















X 


X 


ADC1210C 


National 


(3344) 




250 


311 


























MN5700 


Micro Net 






300 


112 


X 


X 






X 










X 


X 


X 


ADC- 
HC12BMC 


OatsI 


(2619) 








X 


X 






X 










X 


X 


X 


ADC- 

HC12BMM 


t Datel 


(2618) 




2400 


43 


X 




















X 




ADC-ET12BM 


t Datel 


(2619) 




5000 


15 


X 




















X 




*4PD7002 


NEC-Micro 




20 


20000 


20 


X 


X 


















X 




4145 


Teiedyne P 






24000 


20 


X 


X 














X 




X 




ADC-EK12B 


Datel 


(2619) 






25 


X 
















X 




X 




TSC8702 


Teiedyne S 










X 
















X 




X 




TSC8705 


Teiedyne S 






100000 


20 


X 










X 






X 


X 


X 




ICL7109 


Intersil 










X 










X 






X 


X 


X 


X 


TSC7109C 


Teiedyne S 


(2847) 








X 










X 






X 


X 


X 


X 


TSC710gM 


t Teiedyne S 


(2847) 




1 2 


2700 


X 


X 






X 










X 


X 


X 


ADH-8516-11 


DDC 






c 








X 


X 


X 










X 


X 


X 


UUXj'DCHxJ'lC 


tDDC 






15 


500 


X 


X 
















X 


■ X 




HS574T 


t Hybrid Sys 


(2743) 


30 






X 


X 
















X 


X 




HS574U 


t Hybrid Sys 


(2743) 




25 


390 


X 


















X 






MCE574AS 


t Micro Eng 


(4440) 






725 


X 


X 
















X 






ADS74AJ 


AD 


<3174) 

\u 1 ft; 








X 


X 
















X 






AD574AS 


t AD 


^31741 

(a 1 ft; 




30 


780 


X 
























AD574J 


AD 


































MRFSTi 1 


mlbl u Cliy 


(4440) 




35 


620 


X 


X 
















X 




X 


AD574ZJ 


AD 


(3174) 








X 


X 
















X 




X 


AD574ZK 


AD 


(3174) 








X 


X 
















X 




X 


MCE574ZJ 


Micro Eng 


(4440) 








X 


X 
















X 




X 


MCE574ZK 


Micro Eng 


(4440) 


40 


50 


725 


X 


















X 


X 


X 


AD5201A 


AD 










X 


















X 


X 


X 


AD5201S 


t AD 










X 


















X 


X 


X 


AD5202A 


AD 










X 


















X 


X 


X 


AD5202S 


t AD 










X 




















X 


X 


AD52&4A 


AD 










X 




















X 


X 


AD5204S 


t AD 










X 




















X 


X 


AD5205A 


AD 










X 




















X 


X 


AD5205S 


t AD 






1 1/2 2400 


50 


X 




















X 




ADC-ET12BC 


Datel 


(2619) 




2 3 


2175 






X 


X 


X 










X 


X 


X 


ADH-8586-10 


tDDC 

(Continued) 


50 



Bin.— Binary 
Off.-Offset 



Compl.— Complementary 
Magn.— Magnitude 



CTC-Compl. 2's Compi. 
Int. Ref.— Internal Reference 



Mux. In-Muitipiexed Inputs 
S&H— Sample and Hold 



® iC MASTER 1983 



Par. Out-Paraiiel Output 
Ser. Out-Serial Output 

2435 



ADVERTISERS 

INDEX 



Advanced Micro Devices 

Digital 601-617 

Microprocessor 1 201 -1 246 

Microprocessor Development Systems 1 701 -1 705 

Microcomputer Boards 1901-1910 

Interface 2601-2608 

Linear 3101-3137 

Memory 3601-3607 

American Automation 

Microprocessor Development Systems 1 706 

American IVflcrosystems, Inc. 

Digital 618 

Microprocessor 1 247- 1 252 

Interface 2609-261 1 

Linear 3138-3150 

Memory 3608-3614 

Custom/Semicustom 4301-4308 

Anaiog Devices 

Linear 3151-3186 

Arrow Electronics 

357, 1720,2300 

Burr-Brown 

1984 

California Devices 

Custom/Semicustom 4309 
Computer Aided Engineering 
Custom/Semicustom 4310 
Creative i\^icro Systems 
Microcomputer Boards 1911-1912 
Cromemco 

Microcomputer Boards 1913-1932 
Custom IVIOS Arrays, Inc. 
Custom/Semicustom 43 1 1 
Datei-intersii 

Microcomputer Boards 1 933 
Interface 2613-2623 
Digelec 

PROM Programmers 4101 
Diplomat Electronics Corp. 

Manufacturers and Distributors Directory 
Emuiogic 

Microprocessor Development Systems 1 708- i 709 

Exar Integrated Systems, Inc. 

Linear 3187-3209 

Custom/Semicustom 4312-4315 

Falrchiid 

Digital 619-668 

Microprocessor 1253-1304 

Microprocessor Development Systems 171 1-1718 

Memory 3615-3666 

Custom/Sem icustom 43 1 6 -43 1 7 

Fujitsu America 

Memory 3668-3671 

Fujitsu Microelectronics 

Microprocessor 1305-1308 

Memory 3672-3681 

Custom/Semicustom 4318-4320 

General Instrument 

Microprocessor 1309-1332 

Memory 3683-3692 

Harris Semiconductor 

Digital 669-695 

Microprocessor 1333-1344 

Interface 2624-2742 

Linear 3210-3291 

Memory 3693-3788 

Custom/Semicustom 4321-4430 

Hilevel Technology 

Microprocessor Development Systems 1719 



® IC MASTER 1983 



Hitachi America 

Microprocessor 1345 
Memory 3789 
Hoit, Inc. 

Custom/Semicustom 443 1 
Hybrid Systems Corp. 
Interface 2743-2748 
inmos Corp. 
Memory 3790-3792 
Integrated Device Technology 
Memory 3793-3807 
Intel 

M icroprocessor 1347-1350 

Microprocessor Development Systems 1 72 1 - 1 728 

Memory 3808-3825 

Interdesign, Inc. 

Custom/Semicustom 4433 

International Microelectronic Products 

Custom/Semicustom 4435 

Kontron Electronics 

PROM Programmers 4103 ^ 

LSI Computer Systems, Inc. 

Digital 696 

Custom/Semicustom 4436 

Micro Circuit Engineering 

Custom/Semicustom 4437-4440 

Micro Power Systems 

Military 401 

Interface 2749 

Linear 3292 

Mitel Semiconductor 

Digital 697-714 

Monolithic Memories, Inc. 

Digital 715-728 

Memory 3826-3838 

Custom/Semicustom 4442-4478 

Motorola Semiconductor 

Digital 729-733 

Microprocessor 1351-1360 

Microprocessor Development Systems 1 729- 1 738 

Microcomputer Boards 1 935- 1 945 

Interface 2750-2761 

Unear 3293-3298 

Memory 3839-3849 

Custom/Semicustom 4479-4480 

National Semiconductor 

Military 402-405 

Digital 729-733 

Microprocessor 1361-1456 

Microcomputer Boards 1 946- 1 955 

Interface 2762-2771 

Unear 3299-3345 

Memory 3850-3871 

Custom/Semicustom 448 1 -4499 

OKI Semiconductor 

Memory 3872-3873 

Oliver Advanced Engineering 

PROM Programmer 4104 

Optical Electronics 

Linear 3346-3347 

Plessey Semiconductors 

Custom/Semicustom 4501-4516 

RCA 

Military 406-409 

Digital 739-760 

M icroprocessor 1 45 7- 1 49 1 

Microcomputer Boards 1 956- 1 96 1 

Linear 3348-3371 



Memory 3874-3881 

Custom/Semicustom 4517-4521 

Schweber Electronics 

349, 2064, Volume II opp. page 2401, 

Seeq Technology, inc. 

Microprocessor 1492-1500 

Memory 3882-3896 

Semi Processes Inc. 

Digital 761-771 

SIgnetics 

Military 410-423 

Digital 773-810 

Microprocessor 1501-1525 

Microprocessor Development Systems 1 739- 1 746 

Microcomputer Boards 1962-1979 

Interface 2772-2778 

Linear 3372-3421 

Memory 3897-3939 

Custom/Semicustom 4522-4526 

Silicon Systems 

Custom/Semicustom 4528-4529 
Siliconix 

Interface 2779-2842 
Sprague Electric 
Interface 2843 
Stag Microsystems 

PROM Programmers 4105 
Structured Design 

PROM Programmers 4106 
Sunrise Electronics 

PROM Programmers 4107 

Synerteic 

Military 424-432 

Microprocessor 1526-1550 

Microprocessor Development Systems 1 747 

Microcomputer Boards 1 980- 1 983 

Memory 3940-3957 

Custom/Semicustom 4531-4537 

TRW LSI Products 

Digital 812-819 

Linear 3438-3442 

Teledyne Semiconductor 

Interface 2845-2854 

Texas Instruments 

Militaty 433-443 

Digital 821-1034 

Microprocessor 1552-1564 

Microprocessor Development Systems 1 748- 1 749 

Interface 2855-2868 

Linear 3422-3437 

Memory 3958-3980 

Custom/Semicustom 4539-4560 

Unitrode Corporation 

Linear 3444-3446 

VTI 

Memory 3981-3993 
Custom/Semicustom 4561-4562 
Weitei< 

Digital 1036- 1 04 1 
Western Digital 

Microprocessor 1566-1579 
Interface 2869-2880 
Memory 3994-3997 
Custom/Semicustom 4563-4564 
Xlcor 

Memory 3998-3999 
Ziiog 

Microprocessor 1581-1604 



® IC MASTER 1983 



IC MASTER 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- 
Ify SionTime 
Bits Error ±V!LSB 
Res. ± LSB liS 


Power 
Dis. 
mV^ 
(max.) 


Bin. 
Output 


0«. 
Bin. 
Output 


Compl. 
Bin. 
Output 


Compl. 

0«. 

Bin. 
Output 


CTCor 

2's 
Compl. 
Output 


Sign. 
Magn. 
Output 


Mux. 
In. 


S&H 


Int- 
egra- 
ting 


Int. 
Ref. 


Par. 
Out 


Ser. 
Out 


Device 


Source 




Line 


Binary Output 


(Cont'd) 




12 2 

6 


1575 






X 


X 


X 










X 


X 


X 


(Cont'd) 

ADH-8585-10tODC 




200 


210 


X 




















X 


X 


■nni oil 

ADClZll 


t Nitlonil 


(3344) 








X 




















X 


X 


ADG1Z1 IC 


Nitlonil 


(3344) 




12 Plus Sign 

— 160 ms 




























AD7552 


AD 


(3174) 




12 Plus Sign (2 device set) 
1/2 36000 


_ 


X 










X 










X 


X 


ADB1200C 


National 






12 (2 device set) 

1/2 15 


785 


X 


















X 


X 


X 


HS5210B 


t Hybrid Sys 


(2744) 








X 


















X 


X 


X 


HS5Z10C 


Hybrid Sys 


(2744) 








X 


















X 


X 


X 


HS5211B 


t Hybrid Sys 


(2744) 








X 


















X 


X 


X 


HS5211C 


Hybrid Sys 


(2744) 








X 


















X 


X 


X 


HS5212B 


t Hybrid Sys 


(2744) 


10 






X 


















X 


X 


X 


HS5212C 


Hybrid Sys 


(2744t 








X 




















X 


X 


HS5213B 


t Hybrid Sys 


(2744) 
































HS5213C 


Hybrid Sys 


(2744) 
































HS5214B 


t Hybrid Sys 


(2744) 








X 




















X 


X 


HS5214C 


Hybrid Sys 


(2744) 








X 




















X 


X 


HS521SB 


t Hybrid Sys 


(2744) 








X 




















X 


X 


HS5215C 


Hybrid Sys 


(2744) 








X 


















X 


X 


X 


HS5216B 


t Hybrid Sys 


(2744) 








X 


















X 


X 


X 


HS5216C 


Hybrid Sys 


(2744) 




250000 


40 


X 










X 






X 


X 


X 




ICL7104-12 


Intersil 




20 




360 • 


X 










X 






X 


X 


X 




ICL8052A 


Intersil 






12 (3-Dlglt BCD) 

1/4 1200 


20 


















X 




X 




ADC-EK12DC 


Datel 


























X 




X 




ADC- 
EK12DM 


t Datel 






1 6000 * 


50 


















X 


X 




X 


AD2020 


AD 






13 1/2 40000 * 


64 










X 












X 




MP7S50B 


Micro Pwr 

(401.2749) 






72 










X 








X 




X 


X 


AD7550B 


AD 


(3174) 




14 1/2 250 


300 








X 












X 


X 


X 


MN5260 


Micro Net 






14 (2 device set) 

1/2 250000 


40 


























ini 71tU-14 


Intersil 








360 


























ICL8052A 


Intersil 






1/2 10000 


20 






















X 




4146 


Teledyne P 




OU 


15 2 400000 


20 


X 










X 












X 


TSC800AC 


Taisdyni S 


(2853) 








X 










X 












X 


TSC800AM 


tTeiadyatS 


(2853) 




4 400000 


20 


X 










X 












X 


TSCBOOBC 


Tsitdyai S 


(2853) 








X 










X 












X 


TSCaOOBM 


tTiiidyaiS 


(2853) 




16 1/2 100 


1200 


X 


X 






X 












X 




HS9516-4 


Hybrid Sys 






170 


2500 


X 


X 






X 










X 


X 


X 


ADC731K 


Burr-Brown 










X 


X 






X 










X 


X 


X 


ADC73K 


Burr-Brown 






1 15 




























ADC76 


Burr-Brown 






50 




X 




X 


X 


X 












X 


X 


ADADC71K 


AD 


(3173) 








X 




X 


X 


X 












X 


X 


ADADC72K 


AD 


(3173) 


A(\ 


100 


1200 


X 


X 






X 












X 




HS9516-5 


Hybrid Sys 






170 


2500 


X 


X 






X 










X 


X 


X 


ADC731J 


Burr-Brown 










X 


X 






X 










X 


X 


X 


ADC73J 


Burr-Brown 






1* 17 


1550 






X 


X 


X 










X 


X 


X 


PCM75K 


Burr-Brown 






2 50 




X 




X 


X 


X 












X 


X 


ADABC71J 


AD 


(3173) 








X 




X 


X 


X 












X 


X 


ADADC72J 


AD 


(3173) 






1800* 






X 


X 


X 










X 


X 


X 


ADC71K 


Burr-Brown 














X 


X 


X 










X 


X 


X 


ADC72 


Burr-Brown 






100 


1200 


X 


X 






X 












X 




HS9516-6 


Hybrid Sys 

(Continued) 





t Military Temperature Range (-55° to 125°C) 

2436 



* Typical Value 

Bold faca Indicalas additionai data is provided on the paga notad. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Analog to Digital Converters (Cont'd) 



Linear- Conver- Power 

ity slonTlme Ols. 

Bits Error ±'/tlSB mW 

Res. ±LSB liS (max.) 



Off. Compl. 
Bin. Bin. Bin. 
Output Output Output 



Compl. 

Off. 

Bin. 
Output 



CTCor 

2's Sign. 

Compl. Magn. 

Output Output 



Mux. 
In. 



Int- 
egra- 
ting 



Int. 
Ret. 



Par. 
Out 



S«r. 
Out 



Binary Output 



(Cont'd) 



2* 



1550 



50 



1440 



100 



1440 



50 



1800' 



(Cont'd) 



PCM75J 



Burr-Brown 



MN5282 



Micro Net 



MN5280 



Micro Net 



ADC71J 



Burr-Brown 



16 (2 device set) 

1/2 250000 40 



ICL7104-16 Intersil 



360 



ICL8052A Intersil 



CD 
CO 



Bin.— Binary 
Off.-Offset 



Compl.— Complementary 
Magn.— Magnitude 



CTC— Compl. 2's Compl. 
Int. Ret.— Internal Reference 



Mux. In-Multiplexed Inputs 
S&H-Sampie and Hold 



^ IC MASTER 1983 



Par. Out— Parallel Output 
Ser. Out-Serial Output 

2437 



IC MASTER 



INTERFACE-Analog to Digital Converters (Cont'd) 



Digits 



Decimal Output 



3 1/2 Digits, Integrating 



3 Digits, Dual Slope, Building Block, for Microprocessor 



Systems, e.g. TMS1000 


TL505C Tl 


3 Digits, Dual Slope, 2 Device Sets 


CA3161 RCA (3361) 


CA3162 RCA (3356) 


3 i/2 Digits, Drives LCD DVM Display 


ZN450 Ferranti 


ZN451 Ferranti 


3 1/2 Digits, Integrating, 2 Device Sets 


ICL7101 Intersil 


ICL7103 Intersil 


ICL8052 Intersil 


ICL8053 Intersil 


ICL8068 Intersil 


LD110 Siiiconix 


LD111A Siiiconix 


3 1/2 Digits, Dual Slope 


TSC8751 TeledyneS 


3 1/2—4 1/2 Digits, Ramp type, 2 Device Sets 


MC1405 Motorola 


MC 14435 Motorola 


MC14435E t Motorola 


MC1505 t Motorola 


31/2 


TSC8750 Teiedyne S 


33/4 Digits, Integrating 


ZNA216E Ferranti 


ZNA216J t Ferranti 


ADC3711 National 


ADD3701 National 


4 1/2 Digits, Dual Slope 


ICL7135 Intersil 


TSC7135 TtlidyniS (2850) 


4 1/2 Digits, Dual Slope, 2 Device Sets 


ICL7103A Intersil 


ICL8053A Intersil 


ICL8068A Intersil 


ADB4500 National 


LF13300 National 


LD120 Siiiconix 


LD121A Siiiconix (2817) 


LD122 Siiiconix (2817) 



ICL7106 



Intersil 



ICL7107 


Intersil 


ICL7116 


Intersil 


ICL7117 


Intersil 


iCL7126 


Intersil 


MP7138 


Micro Pwr 




(401,2749) 


MP7138A 


Micro Pwr 




(401.2749) 


MC 14433 


Motorola 


ADC3511 


National 


ADD3501 


National 


14433 


Teiedyne S 


14433A 


Teiedyne S 


TSC7106 


Teiedyne S 


TSC7107 


Teiedyne S 


TSC7116 


Teiedyne S 


TSG7117 


Teiedyne S 



TSC7126 TelodynoS (2848) 



20 



30 



40 



t Military Temperature Range (-55° to 125°C) 

2438 



* Typical Value 

Bold (leo IndlGitos iddltlonil diti Is provided on tbo pigo nolod. 



®IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters 



Linear- Settling Power 
ity Time DIs. 
Bits Error ±'4LSB mW 
Res. ±LSB ijS (max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 

Off. 

Bin. 
Input 


CTCor 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


TTL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


MulL 


Latches 


Device 


Source 


Line 


D/A Converters 






Dual 8-Bit, Data Latches, 
Addressable 

1 — 1350 


X 












X 






X 




X 


MP 10 


Burr-Brown 






X 












X 






X 




X 


IWP11 


Burr-Brown 




4 1/4 0.3 85 




X 










X 


X 




X 






ZN434E 


Ferranti 




4 (video digital converter) 

1/2 0.004 1040 


X 
















X 








HDG-0405 


AD (3169) 




6 1/3 3 250 






X 


X 






X 






X 






MP550Z 


t Micro Pwr 










X 


X 






X 






X 






DAC-01A 


tPMI 




1/4 3 250 






X 


X 






X 






X 






DAC-01 


Micro Pwr 










X 


X 






X 






X 






DAC-01B 


t Micro Pwr 










X 


X 






X 






X 






DAC-01C 


Micro Pwr 










X 


X 






X 






X 






0AC-01D 


Micro Pwr 


10 








X 


X 






X 






X 






D AC-OIF 


t Micro Pwr 










X 


X 






X 






X 






n A nil! 

DAC-Om 


Micro Pwr 










X 


X 


X 




X 






X 






MroSZOA 


t Micro Pwr 

(401.2749) 










X 


X 


X 




X 






X 






MP5520B 


t Micro Pwr 

(401.2749) 










X 


X 


X 




X 






X 






MP5520C 


Micro Pwr 

(401.2749) 










X 


X 


X 




X 






X 






MP5520F 


t Micro Pwr 

(401.2749) 










X 


X 


X 




X 






X 






MP5520H 


Micro Pwr 

/mi 97401 










X 


X 




















NcC-clectron 










X 


X 






X 






X 






DAC-01 


tPMI 










X 


X 






X 






X 






DAC-01B 


tPMI 


20 








X 


X 






X 






X 






DAC-01C 


PMI 










X 


X 






X 






X 






DAC-01F 


tPMI 










X 


X 






X 






X 






DAC-01H 


PMI 










X 


X 






X 






X 






DAC-206A 


t PMI 










X 


X 






X 






X 






DAC-206B 


tPMI 










X 


X 






X 






X 






nAO once 

DAC-206C 


PMI 










X 


X 






X 






X 






DAC-20or 


PMI 




1/2 0.3 240 






X 


X 














X 




MCI 406 


Motoroli (2759) 










X 


X 














X 




MCI 506 


t Motorola (2759) 




1* 45* 


X 












X 


X 




X 






ZN426E-6 


Ferranti 


30 


3 200 






X 


X 


X 




X 






X 






MP5520D 


Micro Pwr 

(401.Z749) 




250 






X 


X 






X 






X 






n A n Ann 

DAC-01D 


PMI 




6 (A/D,D/A,with counter) 

1/2 2.0 175 


X 












X 


X 




X 






ZN425E-6 


Ferranti 




6 (video digital converter) 

1/2 0.006 1350 


X 
















X 








HDG-0605 


AD (3169) 




6/12-Binary Serial 

1/2-5 














X 


X 






X 


X 


MA9706C 


Faircliild 




7 1/2 1* 45* 


X 












X 


X 




X 






ZN426E-7 


Ferranti 






X 












X 


X 




X 






ZN429E-7 


Ferranti 




7 (A/D,D/A,with counter) 

1/2 2.0 175 


X 












X 


X 




X 






ZN425E-7 


Ferranti 




8 - 0.005 - 


X 
















X 


X 


X 




AD97B8 


tAD (3162.3169) 




1/16 * 0.04 * 450 


X 












X 








X 




HI5609-2 


t Harris 


40 




X 












X 








X 




HI5609-5 


Harris 






X 












X 








X 




HI560g-8 


t Harris 




1/8 0.04 * 450 


X 












X 








X 




Hi5607-2 


t Harris 






X 












X 








X 




HI5607-5 


Harris 






X 












X 








X 




HI5607-8 


t Harris 






X 












X 








X 




HI5608-2 


t Harris 

(Continued) 





Bin.— Binary 
Off.-Offset 

® IC MASTER 1983 



Magn.— Magnitude 



Compl.- Complementary 



int Ref.— Internal Reference 



CTC-Compl. 2's Compl. 
Muit.-Multiplying 

2439 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error ±%LSB 
Res. ±LSB nS 


Power 
Dis. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
Input 


CTC or 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


TTL 
Logic 


CMOS 
Logic 


ECL 
Logic 


InL 
Ret. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




8 1/8 0.04 * 


450 


X 












X 








X 




HI5608-5 


Harris 


(Cont'd) 








X 












X 








X 




HI5608-8 


t Harris 






0.15 


1.5* 


X 


X 


X 


X 








X 






X 




AD75Z3L 


AD 


(3164) 








X 


X 


X 


X 








X 






X 




AD7523L 


Intersil 










X 


X 


X 


X 








X 






X 




AD7523U 


t Intersil 










X 


X 


X 


X 








X 






X 




MP7S23L 


Micro Pwr 

(401,274g) 




0.15* 


20* 


X 


X 










X 


X 






X 


X 


AD75Z4C 


AD 


(3164) 








X 


X 


X 


X 








X 






X 


X 


AD7524L 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 


X 


AD7524U 


tAD 


(3164) 








X 


X 


X 


X 








X 






X 


X 


MP75Z4L 


Micro Pwr 

(401.2749) 


10 






X 


X 


X 


X 








X 






X 


X 


MP75Z4U 


t Micro Pwr 

(401.2749) 






670 


X 


X 


X 


X 








X 






X 




AD7523J 


Intersil 










X 


X 


X 


X 








X 






X 




AD7523S 


t Intersil 






1 30 


X 












X 


X 






X 




DAC0830 


Natlonil 


(3320) 




1* 


_ 


X 












X 


X 




X 






ZN438 


Ferranti 






1/4 0.01 


850 


X 
















X 








HDS-0810E 


AD 


(3169) 








X 
















X 








HDS-0810EMtAD 


(3169) 








X 
















X 








MC10318-g 


Motorola 


(2759) 




0.045 


700 


X 














X 


X 








HI5618A-2 


t Harris 

(2686.3288) 








X 














X 


X 








HI5618A-S 


Harris 

(2686.3288) 


20 


0.085 


33 


X 


X 


X 


X 






X 


X 


X 




X 




DAC-080QF 


AMD 






0.135 


174 


X 


X 


X 


X 






X 


X 


X 




X 




DAC-08A 


t AMD 










X 


X 


X 


X 






X 


X 


X 




X 




ADDAC-08A fAD 










X 


X 


X 






X 


X 


X 




X 




ADDAC-08H 


AD 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08A 


t Motorola 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08H 


Motorola 










X 


X 


X 


X 






X 


X 


X 




X 




DAC0800A 


t National 


(3320) 








X 


X 


X 


X 






X 








X 




DAC0802 


t National 


(3320) 








X 


X 


X 


X 






X 








X 




DAC0802C 


National 


(3320) 








X 


X 


X 


X 






X 


X 


X 




X 




DAC-08A 


tPMI 




30 






X 


X 


X 


X 






X 


X 


X 




X 




DAC-08H 


PMI 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08A 


t Raytheon 










■ X 


X 


X 


X 






X 


X 


X 




X 




DAC-08H 


Raytheon 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08A 


t Signetics 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08H 


Signetics 






0.15 


1.5* 


X 


X 


X 


X 








X 






X 




AD7523K 


AD 


(3164) 








X 


X 


X 


X 








X 






X 




AD7523K 


Intersil 










X 


X 


X 


X 








X 






X 




AD7523T 


t Intersil 










X 


X 


X 


X 








X 






X 




MP75Z3K 


Micro Pwr 

(401.2749) 




0.15* 


20* 


X 


X 










X 


X 






X 


X 


AD7524B 


AD 


(3164) 


40 






X 


X 


X 


X 






X 


X 






X 


X 


AD7524K 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 


X 


AD7524T 


tAD 


(3164) 








X 


X 


X 


X 








X 






X 


X 


MP7524K 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 








X 






X 


X 


HP7524T 


t Micro Pwr 

(401.2749) 




0.16 * 


123(5V) 


X 


X 


X 


X 


X 




X 


X 






X 


X 


AM6080AC 


AMD 










X 


X 


X 


X 


X 




X 


X 






X 


X 


AM6080AM 


tAMD 










X 


X 


X 


X 


X 


X 


X 


X 






X 


X 


AM6081AC 


AMD 










X 


X 


X 


X 


X 


X 


X 


X 






X 


X 


AM6081AM 


tAMD 

(Continued) 





t Military Temperature Range (-55° to 125°C) 

2440 



* Typical Value 

Bold fnca indleatas addltionai data Is provided on ths pago notod. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error ±'ALSB 
Res. ±LSB iS 


Power 
DIs. 
mW 
(max.) 


Bin. 
input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compi. 
Off. 
Bin. 
input 


CTCor 

2's 
Compl. 
Input 


sign. 
Magn. 
input 


nt 

Logic 


CMOS 
Logic 


ECL 
Logic 


int. 
Ref. 


Mult 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




8 1/4 

0.2* 


255* 


X 












X 


X 


X 


X 


X 


X 


NE5119 


Signetics 


Cont'd) 








X 












X 


X 


X 


X 


X 


X 


SE5119 


t Signetics 








1300* 






X 


X 








X 


X 




X 




HDH-080Z 


AD 


(3169) 












X 


X 








X 


X 




X 




HDH-0802M 


tAD 


(3169) 




0.25 


170 


X 


X 










X 








X 


X 


DAC888A 


tPMI 










X 


X 










X 








X 


X 


DAC888E 


PMI 






0.25 * 


265 


X 


X 










X 


X 






X 




AD1408-g 


AD 


(3164) 








X 


X 










X 


X 






X 




AD1 508-9 


tAD 


(3164) 




0.5 


120* 


X 


















X 


X 




DAC-808 


PMf 






1 30 


X 












X 


X 






X 




DAC0831 


Niilonal 


(3320) 


10 


1.5 


375 


X 












X 


X 




X 




X 


AD558K 


AD 


(3164) 




2* 


255 


























NE5019 


Signetics 










X 












X 


X 


X 


X 


X 


X 


SE5019 


t Signetics 






20* 


735* 


X 


X 












X 


X 








HDS-OSZO 


AD 


(3169) 








X 


X 












X 


X 








HDS-0820M 


tAD 


(3169) 




3/8 1.5 


375 


X 












X 


X 




X 




X 


AD558T 


tAD 


(3164) 




1/2 0.005 


- 


















X 




X 




SP9768 


Plessey 






0.01 


450 


X 




X 








X 










X 


TDC1016-8 


TRW 


(3438) 




0.01* 


675 


X 
















X 








MC10318 


Motorola 


(2759) 




0.025 


630 


X 


X 










X 






X 








t OittI 


(2620) 


20 






X 


X 










X 






X 






DAC-HFBMC 


Datel 






0.045 


700 


X 












X 


X 










HI5618B-2 


t Harris 

(2688,3288) 








X 












X 


X 










HI5618B-5 


Harris 

(2686.3288) 




0.12 


240 






X 


X 






X 






X 






DAC90B 


Burr-Brown 














X 


X 






X 






X 






DAC90S 


t Burr-Brown 








255 


X 












X 


X 


X 


X 


X 


X 


NE5118 


Signetics 










X 












X 


X 


X 


X 


X 


X 


SE5118 


t Signetics 






0.135 


174 


X 


X 


X 


X 






X 


X 


X 




X 




DAC-08 


fAMD 










X 


X 


X 


X 






X 


X 


X 




X 




ADDAC-08 


tAD 


(3164) 








X 


X 


X 








X 


X 


X 




X 




jiAoeoi 


t Fairchild 




tn 
oU 






X 


X 


X 


X 






X 


X 


X 




X 




DAC-08 


t Motorola 










X 


X 


X 








X 








X 




DAC0800 


t National 


(3320) 








X 


X 


X 


X 






X 


X 


X 




X 




DAC-08 


tPM! 










X 


X 


X 


X 






X 


X 


X 








DAC-08 


t Raytheon 










X 


X 


X 


X 






X 


X 


X 








DAC-08 


t Signetics 








570 


X 












X 






X 






MN3015 


Micro Net 










X 












X 






X 






MN3015H 


t Micro Net 






0.14* 


130* 


X 


X 










X 






X 




X 


MC689QA 


t Motorola 


(2758) 




0.15 


1.5* 




X 




X 








X 










AD7523J 


AD 


(3164) 








X 


X 


X 


X 








X 










AD7523S 


tAD 


(3164) 


40 






X 


X 


X 


X 








X 






X 




MP7523J 


Micro Pwr 

(401.2749) 






136 


X 


X 










X 


X 


X 




X 




DAC-08BC 


Datal 


(2621) 








X 


X 










X 


X 


X 




X 




DAC-08BM 


t Datel 








174 


X 


X 


X 


X 






X 


X 


X 




X 




DAC-08E 


AMD 










X 


X 


X 


X 






X 


X 


X 




X 




ADOAC-08E 


AD 










X 


X 


X 


X 






X 


X 


X 




X 




mA0801E 


Faircliiid 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08E 


Motorola 










X 


X 


X 








X 








X 




BAC0800C 


Natlooal 


(3320) 








X 


X 


X 








X 








X 




;xPC624 


NEC-Electron 








X 


X 


X 


X 






X 


X 


X 




X 




DAC-08E 


PMI 




50 






X 


X 


X 


X 






X 


X 


X 




X 




OAC-08E 


Raytheon 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08E 


Signetics 

(Continued) 







^— < 
CO 
CO 



Bin.— Binary 
Off.-Offset 

®iC MASTER 1983 



Magn.— Magnitude 



Compl.— Complementary 



Int Ret.— Internal Reference 



CTC— Compl. 2's Compl. 
Mult.-Multiplying 

2441 



IC MASTER 



iNTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling Power 

Ity Time Dis. 

Bits Error ±'klSB mW 

Res. ±LSB mS (max.) 



Input 



Compl. CTC or 

Off. Compl. Off. 2's Sign. 

Bin. Bin. Bin. Compl. Magn. TTL CMOS ECL 

Input Input Input Input Input Logic Logic Logic 



Latches Device 



D/A Converters 



(Cont'd) 



1/2 



0.15 * 20 * 


X 


X 










X 


X 






X 


X 


(Cont'd) 

AD7524A AD (3164) 


X 


X 


X 


X 








X 






X 


X 


AD7524J AD (3164) 


X 


X 


X 


X 








X 






X 


X 


AD7524S tAD (3164) 


X 


X 


X 


X 








X 






X 


X 


MP7524J Micro Pwr 

(401.2740) 


X 


X 


X 


X 








X 






X 


X 


MP7524S t Micro Pwr 

ijni 97AQV 

(4D1.Z749) 


305 


X 












X 


X 






X 




nAPnono xii*itj*aai i99on\ 
DAUUoUo TN'tlOnil (od£U) 


X 












X 


X 






X 




DACOBOBC HlilOIIII (33Z0) 


0.16 * 123 


X 


X 


X 


X 


X 




X 


X 






X 


X 


Aikicnon^ Ann 
AMbUoUL AMU 


X 


X 


X 


X 


X 




X 


X 






X 


X 


AMt)UoUM 1 AInU 


X 


X 


X 


X 


X 


X 


X 


X 






X 


X 


AMbUoll/ AMI) 


X 


X 


X 


X 


X 


X 


X 


X 






X 


X 


Aftlcn041l 4- Aim 

AMOUUIM 7 AMU 


0.20 * 130 * 


X 


X 










X 






X 




X 


MCboSO MOiorOII (2700) 


ft 00 on * 


X 


X 










X 


X 






X 


X 


hUiacoh AD (0104) 


X 


X 










X 


X 






X 


X 


AD7528L AD (3164) 


X 


X 










X 


X 






X 


X 


AD7528T fAD (3164) 


X 


X 










X 


X 






X 


X 


AD7528U tAD (3164) 


0.25 170 


X 


X 










X 








X 


X 


DAC888B t PMI 


X 


X 










X 








X 


X 


DAC888F PMI 


0.25 * 265 


X 












X 


X 






X 




SSS1408A-8 AMD 


X 












X 


X 






X 




SSS1508A-8 t AMD 


X 


X 










X 


X 






X 




AD1408-8 AD (3164) 


X 


X 










X 


X 






X 




AD1508-8 tAD (3164) 


X 


X 










X 


X 






X 




DAC-1408A-8 PMI 


X 


X 










X 


X 






X 




DAC-1508A-8t PMI 


0.25/1.0 

900 






X 


X 


X 




X 






X 


X 




0AC82K Burr-Brown 






X 


X 


X 




X 






X 


X 




DAC82S t Burr-Brown 


0.3 * 305 


X 












X 


X 






X 




1408-8 AMD 


X 












X 


X 






X 




1508-8 t AMD 


X 


X 










X 


X 






X 




DAC-IC8BC Ditel (2621) 


X 


X 










X 


X 






X 




DAC-IC8BM fDatei 


X 












X 


X 






X 




,iA0802 t Fairchlld 


X 












X 


X 






X 




mA0802A Fairchlld 


X 




















X 




MC1408-8 Motorola (2759) 


X 




















X 




MCI 508-8 tMotoroli (2759) 


X 












X 








X 




LM 1408-8 National 


X 












X 








X 




LM 1508-8 t National 


X 












X 








X 




MC1408-8 Signetics 


X 












X 








X 




MC1508-8 t Signetics 


0.375 300 


X 


X 


X 








X 






X 






DAC-100C Micro Pwr 


0.6 * 500 


X 




X 








X 






X 




X 


XRg201 Exar (3193) 


0.8 100 * 


X 


X 










X 


X 




X 




X 


ZN428E-8 Ferranti 


X 


X 










X 


X 




X 




X 


ZN428J-8 t Ferranti 


1 30 


X 












X 


X 






X 




DAC0832 National 


45* 


X 












X 


X 




X 






ZN426E-8 Ferranti , 


X 












X 


X 




X 






ZN426J-8 t Ferranti 


X 












X 


X 










ZN429E-8 Ferranti 


X 












X 


X 










ZN429J-8 t Ferranti 


750 


X 












X 






X 






MN3008 Micro Net 


X 












X 






X 






MN3008H t Micro Net 




X 










X 






X 






MN3009 Micro Net 




X 










X 






X 






MN3009H t Micro Net 

(Continued) 



20 



30 



40 



50 



t Military Temperature Range (-55° to 125°C) 

2442 



* Typical Value 

Bold faco Indicates additional data Is provided on the page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digitai to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 

Bits Error ± 'A LSB 

Res. ±LS8 


Power 
DIs. 
mW 
(max.) 


Bin. 
Input 


on. 

Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 

0«. 

Bin. 
Input 


CTCor 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


nL 

Logic 


CMOS 
Logic 


ECL 
Logic 


InL 
Re(. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




8 1/2 

1.5 


75* 


X 












X 


X 




X 




X 


A0S58J 


AO 


[Cont'd) 
(3164) 






300 


X 


X 










X 


X 






X 




DAC331B-8 


t Hybrid Sys 










X 


X 










X 


X 






X 




DAC331C-8 


Hybrid Sys 






2* 


255 


X 


X 










X 






X 






0AC-UP8BC 


Dtlsl 


(2621) 








X 


X 










X 






X 






DAC-UP8BM tOatel 






255* 


X 












X 


X 


X 


X 


X 


X 


NE5018 


Signetics 










X 












X 


X 


X 


X 


X 


X 


SE5018 


t Signetics 






2.5 


570 


X 


X 


X 








X 






X 






MN3014 


Micro Net 










X 


X 


X 








X 






X 






MN3014H 


t Micro Net 






3 


680 


X 


X 
















X 






HS3020B 


t Hybrid Sys 




10 






X 


X 
















X 






HS3020C 


Hybrid Sys 








830 


X 


X 


X 








X 






X 




X 


MN3020 


Micro Net 










X 


X 


X 








X 






X 




X 


MN3020H 


t Micro Net 






4 


1080 


X 


X 




X 






X 


X 




X 




X 


DAC336B-8 


t Hybrid Sys 










X 


X 




X 






X 


X 




X 




X 


DAC336C-8 


Hybrid Sys 






20 


285 


X 












X 


X 




X 






DAC336B-1 


t Hybrid Sys 










X 












X 


X 




X 






DAC337B-0 


t Hybrid Sys 










X 












X 


X 




X 






DAC337B-2 


t Hybrid Sys 










X 












X 


X 




X 






DAC337C-0 


Hybrid Sys 










X 












X 


X 




X 






DAC337C-1 


Hybrid Sys 




20 






X 












X 


X 




X 






DAC337C-2 


Hybrid Sys 






23* 


585 






X 








X 


X 




X 






MN3000 


Micro Net 














X 








X 


X 




X 






MN3000H 


t Micro Net 












X 










X 


X 




X 






MN3001 


Micro Net 












X 










X 


X 




X 






MN3001H 


t Micro Net 










X 












X 


X 




X 






MN3002 


Micro Net 










X 












X 


X 




X 






MN3002H 


t Micro Net 












X 










X 


X 




X 






MN3006 


Micro Net 












X 










X 


X 




X 






MN3006H 


t Micro Net 






30 


570 


X 


X 


X 








X 






X 






UN3013 


Micro Net 




30 






X 


X 


X 








X 






X 






MN3013H 


t Micro Net 






40 


300 




X 










X 


X 




X 






DAC337B-6 


t Hybrid Sys 












X 










X 


X 




X 






0AC337C-6 


Hybrid Sys 






3/4 1.5 


375 


X 












X 


X 




X 




X 


AD558S 


fAD 


(3164) 




1 0.01 * 


675 


X 
















X 




X 




MC10318C-7 


Motoroli 


(2759) 




0.07 


305 


X 












X 


X 






X 




MC1408-7 


Signetics 






0.15 


174 


X 


X 


X 


X 






X 


X 


X 




X 




DAC-08C 


AMD 










X 


X 


X 


X 






X 


X 


X 




X 




ADDAC-08C 


AD 










X 


X 


X 


X 






X 


X 


X 




X 




fiAOSOIC 


Fairchild 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08C 


Motorola 




40 






X 


X 


X 








X 








X 




DAC0801C 


NttlODll 


(3320) 








X 


X 


X 


X 






X 


X 


X 




X 




DAC-08C 


PMI 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08C 


Raytheon 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-08C 


Signetics 






0.22 


20* 


X 


X 










X 


X 






X 


X 


AD7528J 


AD 


(3164) 








X 


X 










X 


X 






X 


X 


AD7528S 


tAD 


(3164) 




0.25* 


265 


X 


X 










X 


X 






X 




SSS1408A-7 


AMD 










X 


X 










X 


X 






X 




AD1408-7 


AD 


(3164) 








X 


X 










X 


X 






X 




f<A0802B 


Fairchild ° 










X 


X 










X 


X 






X 




DAC-1408A-7 PMI 


50 


0.3* 


305 


X 












X 


X 






X 




1408-7 


AMD 










X 




















X 




MC1408-7 


Motorola 


(2759) 








X 












X 








X 




DAC0807C 


Natlooil 


(3320) 








X 












X 








X 




LM 1408-7 


National 

(Continued) 





Bin.— Binary Compi.— Complementary CTC— Compl. 2's Compl. 

Off.— Offset Magn.— Magnitude Int Ref.— Internal Reference Mult.— Multiplying 



« IC MASTER 1983 



2443 



IC MASTER 



INtERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error ±'ALSB 
Res. ±LSB fiS 


Power 
DIs. 
niW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


CompL 
Off. 
Bin. 
Input 


CTC or 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


TTL 
Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




8 

1 1/4 U.o 


OUD 


X 














X 






X 






niiinii 


(Cont'd) 




2 0.01 * 


675 


X 
















X 




X 




MC1031SC-6 


Motorola 


(2759) 




0.25 * 


265 


X 


X 










X 


X 






X 




DAC1408A-6 


AMD 










X 


X 










X 


X 






X 




fxA0802C 


Fairchild 










X 


X 










X 


X 






X 




DAC-1408A-e 


PMI 






0.3* 


305 


X 












X 


X 






X 




1408-6 


AMD 










X 




















X 




MC1408-6 


Motorola 


(2759) 




























)( 




DAC0806C 


Natloiil 


(3320) 








)( 












)( 












LM 1408-6 


National 






8 (A/D, D/A, with counter) 
1/2" 2.0 


175 


X 












X 


X 




X 






ZN425E-8 


FerrantI 




10 


1 2.0 


175 


X 












X 


X 




X 






ZN425J-8 


t FerrantI 






8 (D/A, with counter/clock) 
1/2 0.8 




X 












X 


X 




X 






ZN435E-8 


FerrantI 










X 












X 


X 




X 






ZN435J-8 


t FerrantI 






8 Plus Sign 

1/2 20 


750 


X 












X 








X 




MN380 


Micro Net 










X 












X 








X 




MN380H 


t Micro Net 






8 (video digital converter) 
1/4 0.010 


1976 


X 
















X 








HDD-0810 


AD 










X 
















X 








HDD-0810M fAD 






2028 


X 
















X 








HDD-0810C 


AD 










X 
















X 








HDD-0810CMtAD 




1/2 0.008 


1660 


X 
















X 








HD6-0805 


AD 


(3169) 


20 


8 (7-Blts plus Sign) Companding 
- 0.5 * 192 














X 












AM6072C 


AMD 






















X 












AM6072M 


tAMD 






1/2 step 

0.5 


192 














X 












AM6070AC 


AMD 






















X 












AM6070AM 


tAMD 






















X 


X 


X 




X 




DAC-76B 


tPMI 






















X 


X 






X 




DAC-76E 


PMI 






















X 


X 


X 




X 




DAC-86E 


PMI 






















X 


X 


X 




X 




DAC-87E 


PMI 








207 














X 


X 


X 




X 




DAC-88E 


PMI 








500 














X 


X 


- X 




X 




DAC-89E 


PMI 




30 


1 step 0.5 


192 














X 












AM6070C 


AMD 






















X 












AM6070M 


tAMD 






0.5* 


192 














X 


X 


X 




X 




DAC-76 


tPMI 






















X 


X 


X 




X 




DAC-76C 


PMI 






















X 


X 


X 




X 




DAC-86C 


PMI 






















X 


X 


X 




X 




DAC-87C 


PMI 








207 














X 


X 


X 




X 




DAC-88C 


PMI 








500 














X 


X 


X 




X 




DAC-89C 


PMI 






1 1/2 step 

0.5* 


192 














X 


X 


X 




X 




DAC-76D 


PMI 






8-2 Digit BCD 

1/4 0.135 


194 














X 


X 


X 




X 




DAC-20A 


t Motorola 




40 


















X 


X 


X 




X 




DAC-20E 


Motorola 






1/2 0.135 


194 














X 


X 


X 




X 




DAC-20 


t Motorola 






















X 


X 


X 




X 




DAC-20C 


Motorola 






0.15 


194 














X 


X 


X 




X 




DAC-20C 


PMI 






23* 


630 














X 


X 




X 






MN3010 


Micro Net 






















X 


X 




X 






MN3010H 


t Micro Net 






9 1/2 0.01 


450 


X 




X 








X 










X 


TDC1016-9 


TRW 


(3438) 





Q) 
•♦— ' 
(O 
CO 



t Military Temperature Range (- 55° to 125°C) 

2444 



* Typical Value 

Bold fico Indleatos adiltlonil data Is provided on tho page notod. 



®IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error ±'/i!LSB 
Res. ±LSB nS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


CompI. 
Bin. 
Input 


CompI. 

Off. 

Bin. 
Input 


CTCor 

2's 
CompI. 
Input 


Sign. 
Magn. 
Input 


HL 
Logic 


CMOS 
Logic 


ECL 
Logic 


Inl 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




9 (8-Bits plus Sign) 

V4 0.75 


500 


X 










X 


X 


X 




X 


X 




DAC-208A 


tPMI 










X 










X 


X 


X 




X 


X 




DAC-208E 


PMI 






1/2 0.75 


500 


X 










X 


X 


X 




X 


X 




DAC-208B 


tPMI 










X 










X 


X 


X 




X 


X 




DAC-208F 


PMI 






10 1/8 0.5 * 


50 


X 


X 


X 


X 






X 


X 






X 




MP7620J 


Micro Pwr 






1/4 * 0.6 * 


780 


X 












X 


X 






X 




HI5610-2 


t Harris 

(2B83.328B) 








X 












X 


X 






X 




nl50lD-4 


Harris 

(2683.3288) 








X 












X 


X 






X 




HI56I0-5 


Harris 

(2683.3288) 








X 












X 


X 






X 




HI5610-8 


t Harris 

(2683.3288) 




1/4 0.025 * 


735 


X 


X 










X 


X 










HDS-1025 


AD 


(3169) 


10 






X 


X 










X 


X 










HDS-1025M 


tAD 


(3169) 




0.25* 


275 


X 


X 










X 


X 




X 






ADS61K 


AD 


(3164) 








X 


X 










X 


X 




X 






AD561T 


tAD 


(3164) 








X 


X 










X 


X ■ 




X 






MP561K 


Micro Pwr 












X 










X 


X 




X 






MP561T 


t Micro Pwr 






0.3 * 


1300 
















X 




X 






HOH-1003 


AD 


(3169) 




0.5 * 


50 


























MP7620K 


Micro Pwr 






1/2 01 


450 


























TnciniR.in 


TRW 


(3438) 








X 


X 










X 






X 






OAC- 

HF10BMC 


Datai 


(2621) 








X 


X 










X 






X 






DAC- 

HF10BMM 


t Dalai 


(2620) 


20 


0.15 


450 


X 


X 


X 


X 






X 


X 


X 




X 




DAC-10B 


tPMI 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-10C 


tPMI 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-10F 


PMI 










X 


X 


X 


X 






X 


X 


X 




X 




DAC-10G 


PMI 






0.25 


380 


X 














X 






X 




MC3410 


Motorola 


(2750) 








X 














X 






X 




MC3510 


t Motoreia 


(2759) 








X 














X 






X 




MC3410 


Signetlcs 








390 


X 


X 










X 


X 










DAC-IC10B 


Datel 










X 


X 










X 


X 










DAC-IC10BM t Oatel 




0.25 * 


275 


X 


X 










X 


X 




X 






AD561J 


AD 


(3164) 


30 






X 


X 










X 


X 




X 






AD5618 


AD 


(3164) 








X 


X 










X 


X 




X 






MP561J 


Micro Pwr 










X 


X 










X 


X 




X 






MP561S 


t Micro Pwr 






0.3 




X 


X 












X 






X 




AD75Z7C 


AO 


(3164) 








X 


X 












X 






X 




AD7527GC 


AD 


(3164) 








X 


X 












X 






X 




AD7527GL 


AD 


(3164) 








X 


X 












X 






X 




AD7S27GU 


tAD 


(3164) 








X 


X 












X 






X 




AD75Z7L 


AO 


(3164) 








X 


X 












X 






X 




AD7527U 


tAD 


(3164) 




0.375 


300 






X 


X 






X 






X 






MP5560A 


t Micro Pwr 


(2749) 


40 










X 


X 






X 






X 






DAC-100A 


tPMI 














X 


X 






X 






X 






DAC-100A 


PMI 






0.5 


30 


X 


X 










X 


X 






X 




DAC- 
HA10BC-1 


Datel 










X 


X 










X 


X 






X 




DAC- 

HA10BM-1 


t Datel 






0.5* 


0.025 


X 


X 










X 


X 






X 




DAC-HA10BC 


Dalai 


(2621) 








X 


X 










X 


X 






X 




0AC-HA10BM 


t Dalai 


(2620) 






20* 


X 


X 


X 


X 






X 


X 






X 




AD7520L 


AD (3164) 

(Continued) 





Bin.— Binary 
0«.-Offset 

®IC MASTER 1983 



Magn.— Magnitude 



CompI.— Compiementary 



Int Ref.— Internal Reference 



CTC-Compl. 2's CompI. 
Mult-Multiplying 

2445 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



CD 
"D 



C 
O 
-t— ' 

o 




CO 

<D 
-t— ' 

to 

03 



Linear- Settling 
Ity Time 
Bits Error ±y!LSB 
Res. ±LSB iiS 


Power 
Dis. 
mW 
(max.) 


Bin. 
Input 


Oft. 
Bin. 
input 


Compl. 
Bin. 
input 


Compi. 
Off. 
Bin. 
input 


CTCor 

2'S 
Compl. 

input 


Sign. 
Magn. 
input 


HL 
Logic 


cms 

Logic 


ECL 
Logic 


Int. 
Ret. 


Mult. 


Latches 


Device 


Source 


Line 


D/A Converters 


(Cont'd) 




10 1/2 0.5 * 


20* 


X 


X 


X 


X 






X 


X 






X 




AD75Z0U 


(Cont'd) 
tAD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7530L 


AD (3164) 








X 


X 


X 


X 














X 




AD7520L 


Intersil 








X 


X 


X 


X 














X 




AD7520U 


t Intersil 








X 


X 


X 


X 






X 


X 






X 




AD7530L 


Intersil 








X 


X 


X 


X 






X 


X 






X 




MP7SZ0L 


Micro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 




MP75Z0P 


Micro Pwr 

(101 91i9\ 








X 


X 


X 


X 






X 


X 






X 




MP75Z0U 


t Micro Pwr 








X 


X 


X 


X 






X 


X 






X 




MP7530 


Micro Pwr 






on * 




X 




















X 


ninnnn 

UAu lUUU 


^UallAiittl /999n\ 

J niiiunii \aOC\i} 


10 








X 












X 






X 


X 


ninnnnr 


IfallfiH*! /Q49n\ 
niliOnll {OQCMf 








X 


X 


X 


X 






X 


X 






X 


X 


UAulUUJ 


J iiaiionai 








X 












X 


X 






X 


X 


DAC1U03C 


National 








X 


X 


X 


X 






X 


X 






X 


X 


DAClOUD 


t Nltloml (33Z0) 








X 


X 


X 


X 






X 


X 






X 


X 


DAC1006C 


Nallonil (33Z0) 






40 


X 


X 


X 


X 






X 


X 






X 


X 


AD75ZZL 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 


X 


AD75ZZU 


tAD (3164) 








X 


X 










X 


X 






X 


X 


MP75ZZL 


Micro Pwr 

(401.Z74g) 








X 


X 


X 


X 






X 


X 






X 


X 


MP75ZZU 


t Micro Pwr 

(401,2749) 






50 


X 


X 


X 


X 






X 


X 






X 




MP7620L 


Micro Pwr 


20 


0.6 


30 


X 


X 


X 


X 






X 


X 






X 




AD7533C 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7533L 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7533U 


tAD (3164) 




0.8* 


30* 


X 


X 


X 


X 






X 


X 






X 




AD7533L 


Intersil 








X 


X 


X 


X 






X 


X 






X 




AD7533U 


t Intersil 








X 


X 


X 


X 






X 


X 






X 




MP7533L 


Micro Pwr 

(401.Z749) 








X 


X 


X 


X 






X 


X 






X 




MP7533U 


t Micro Pwr 

(401.Z74g) 




1.5 


30 


X 


X 










X 


X 






X 




DAC331B-10 t Hybrid Sys 








X 


X 










X 


X 






X 




DAC331C-10 


Hybrid Sys 




4* 


255 


X 












X 


X 


X 


X 


X 


X 


NE5020 


Signetics 


30 


10 


715 






X 


X 






X 






X 






MN3040 


Micro Net 












X 


X 






X 






X 






MN3040H 


t Micro Net 




15 


165 


X 








X 




X 


X 






X 




DAC348B-10 ] Hybrid Sys 








X 








X 




X 


X 






X 




DAC348C-10 


Hybrid Sys 




20 


150 






X 


X 






X 


X 




X 






DAC347LPB- 
108 


t Hybrid Sys 












X 








X 


X 




X 






DAC347LPB- 
10U 


t Hybrid Sys 












X 


X 






X 


X 




X 






DAC347LPC- 
10B 


Hybrid Sys 












X 








X 


X 




X 






DAC347LPC- 
10U 


Hybrid Sys 






285 




X 










X 


X 




X 






DAC337B-4 


t Hybrid Sys 








X 












X 


X 




X 






DAC337B-5 


t Hybrid Sys 


Af\ 








X 










X 


X 




X 






DAC337C-4 


Hybrid Sys 








X 












X 


X 




X 






DAC337C-5 


Hybrid Sys 




23* 


585 






X 








X 






X 






MN3003 


Micro Net 












X 








X 






X 






MN3003H 


t Micro Net 










X 










X 






X 






MN3004 


t Micro Net 










X 










X 






X 






IMN3004H 


t Micro Net 

(Continued) 





t Military Temperature Range ( - 55° to 125°C) * Typical Value 

Bold (ICO Indlcitos iddltlonil diti Is provldod on Iho pigo nolod. 



2446 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error ±%LSB 
Res. ±LSB fiS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Input 


Oft. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 

Off. 

Bin. 
Input 


CTC or 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


ni 
Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ret. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




10 1/2 23 * 


585 


X 












X 






X 






MN3005 


Micro Net 


(Cont'd) 








X 












X 






X 






MN3005H 


t Micro Net 












X 










X 






X 






MN3007 


Micro Net 












X 










X 






X 






MN3007H 


t Micro Net 






30 


- 




X 










X 








X 




M/D2005-1 


HyComp 






40 


300 






X 








X 


X 




X 






DAC337B-3 


t Hybrid Sys 












X 










X 


X 




X 






DAC337B-7 


t Hybrid Sys 














X 








X 


X 




X 






DAC337C-3 


Hybrid Sys 












X 










X 


X 




X 






DAC337C-7 


Hybrid Sys 






500 * 


24 


X 












X 


X 






X 




AD7520L 


National 




10 






X 












X 


X 






X 




AD7520U 


t National 










X 












X 


X 






X 




DAC1020 


t National 


(3320) 








X 












X 


X 






X 




DAC1020C 


Hatlonal 


(3320) 




1/2 0.01 


990 


X 
















X 








HDS-1015E 


AD 


(3169) 








X 
















X 








HDS-IOISEMfAD 


(3169) 




0.135 


276 


X 




X 








X 


X 






X 




DAC-10B 


Raytheon 










X 




X 








X 


X 






X 




DAC-10C 


Raytheon 










X 




X 








X 


X 






X 




DAC-10F 


Raytheon 






0.25 


380 


X 












X 


X 






X 




MC3510 


Signetlcs 






0.25 * 


300 


X 












X 


X 




X 


X 




HE5410 


Signstlcs 


(3413) 


20 






X 












X 


X 




X 


X 




SE5410 


Signetlcs 


(3413) 




0.3* 


1300 






X 


X 






X 


X 




X 






HDH1003M 


tAD 






0.375 


250 






X 


X 


X 




X 






X 






ADDAG100K 


AD 


(3164) 












X 


X 


X 




X 






X 






ADDAC100L 


AD 


(3164) 












X 


X 


X 




X 






X 






ADDAC100T 


tAD 


(3164) 




1 0.15 


276 


X 




X 








X 


X 






X 




DAC-10G 


Raytheon 






0.25 


- 




X 


X 








X 


X 




X 






DAC-101E 


PMI 








380 


X 














X 






X 




MC3410C 


Motorola 


(2759) 








X 












X 


X 






X 




MC3410C 


Signetlcs 








390 


X 


X 










X 


X 






X 




DAC-IC1DBC 


Daiel 


(2621) 


30 


0.3 


- 


X 


X 












X 






X 




AD7527B 


AD 


(3164) 








X 


X 












X 






X 




AD7527K 


AD 


(3164) 








X 


X 












X 






X 




AD7527T 


tAD 


(3164) 






300 






X 


X 






X 






X 






MP5560B 


t UlCTO Pwr 


(2749) 












X 


X 






X 






X 






DAC-100B 


tPMI 






0.375 


250 






X 


X 


X 




X 






X 






AODAC100J 


AD 


(3164) 












X 


X 


X 




X 






X 






ADDAC1G0S 


tAD 


(3164) 




0.5* 


20* 


X 


X 


X 


X 






X 


X 






X 




A07520K 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 




AD7520T 


tAD 


(3164) 








X 


X 


X 


X 






X 


X 






X 




A0753QK 


AD 


(3164) 


40 






X 


X 


X 


X 






X 


X 






X 




AD7520K 


Intersil 










X 


X 


X 


X 






X 


X 






X 




AD7520T 


t Intersil 










X 


X 


X 


X 






X 


X 






X 




AD7530K 


Intersil 










X 


X 


X 


X 






X 


X 






X 




MP7520K 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7520N 


Fillcro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 




MP7520T 


t F^lcro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 




MP753QK 


Fillcro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 


. X 


DAC1001 


t National 










X 


X 


X 


X 






X 


X 






X 


X 


DAC1001C 


National 










X 


X 


X 


X 






X 


X 






X 


X 


DAC1004 


t National 




50 






X 


X 


X 


X 






X 


X 






X 


X 


DAC1004C 


National 

(Continued) 





CD 

c 

o 

o 

CD 



CD 



Bin.— Binary Compl.— Complementary CTC— Compl. 2's Compl. 

Off.— Offset Magn.— Magnitude Int Ref.— Internal Reference Mult.— Multiplying 



iC MASTER 1983 



2447 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
ity Time 
Bits ■ Error ±'/2LSB 
Res. ± LSB (iS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


CompI. 
Bin. 
Input 


CompI. 
Off. 
Bin. 
Input 


CTC or 

2's 
CompI. 
Input 


Sign. 
Magn. 
Input 


TTL 
Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




10 1 0.5 * 


20 * 


X 


X 


X 


X 






X 


X 






X 


X 


DAC1007 


t National 


(Cont'd) 
(3320) 








X 


X 


X 


X 






X 


X 






X 


X 


DAC1007C 


National 


(3320) 






40 


X 


X 


X 


X 






X 


X 






X 


X 


AD7522K 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 


X 


AD7522T 


tAD 


(3164) 






50 


X 


X 


X 


X 






X 


X 






X 


X 


MP7522K 


Micro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 


X 


MP7522T 


t Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7620M 


Micro Pwr 






0.6 


30 


X 


X 


X 


X 






X 


X 






X 




AD7533B 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 




AD7533K 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 




AD7533T 


tAD 


(3164) 


10 


0.8* 


30* 


X 


X 


X 


X 






X 


X 






X. 




AD7533K 


Intersil 










X 


X 


X 


X 






X 


X 






X 




AD7533T 


t Intersil 










X 


X 


X 


X 






X 


X 






X 




MP7533K 


Micro Pwr 

(401.2749) 




1.5* 


300 




X 






X 




X 


X 




X 






DAC-04AC 


PMI 












X 






X 




X 


X 




X 






DAC-04BC 


PMI 












X 






X 




X 


X 




X 






DAC-06E 


PMI 








350 


X 












X 


X 




X 






DAC-03AD 


PMI 










X 












X 


X 




X 






DAC-03BD 


PMI 






5 


435 


X 


X 
















X 






DAC-UP10B 


Datei 


(2615) 




500* 


24 


X 












X 


X 






X 




AD7520K 


National 




20 






X 












X 


X 






X 




AD7520T 


National 










X 












X 


X 






X 




DAC1021 


t National 


(3320) 








X 












X 


X 






X 




DAC1021C 


National 


(3320) 




2 0.225 


300 






X 


X 






X 






X 






MP5560C 


t Micro Pwr 


(2749) 












X 


X 






X 






X 






MP5560C 


Micro Pwr 














X 


X 






X 






X 






nAP innr* 

UMV>- lUUU 


tPMI 














X 


X 






X 






X 






DAC-100C 


PMI 






0.25 


225 




X 


X 








X 


X 






X 




DAC-101F 


PMI 






0.5* 


20* 


X 


X 


X 


X 






X 


X 






X 




AD7520J 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 




AD7520S 


IAD 


(3164) 


30 






X 


X 


X 


X 






X 


X 






X 




AD7530J 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 




AD7520J 


Intersil 










X 


X 


X 


X 






X 


X 






X 




AD7520S 


t Intersil 










X 


X 


X 


X 






X 


X 






X 




AD7530J 


Intersil 










X 


X 


X 


X 






X 


X 






X 




MP7520J 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7520M 


t Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7520S 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7530J 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




DAC1002 


t National 


(3320) 








X 


X 


X 


X 






X 


X 






X 


X 


DAC1002C 


National 


(3320) 


40 






X 


X 


X 


X 






X 


X 






X 




DAC1005 


t National 










X 


X 


X 


X 






X 


X 










DAC1005C 


National 










X 


X 


X 


X 






X 


X 










DAC1008 


t National 


(3320) 








X 


X 


X 


X 






X 


X 






X 


X 


DAC1008C 


National 


(3320) 






40 


X 


X 


X 


X 






X 


X 






X 


X 


AD7522J 


AD 


(3164) 








X 


X 


X 


X 






X 


X 






X 


X 


A0752ZS 


tAD 


(3164) 






50 


X 


X 


X 


X 






X 


X 






X 


X 


MP7522J 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 


X 


MP7522S 


t Micro Pwr 

(401.2749) 

(Continued) 







•4—' 

CO 



t Military Temperature Range (-55° to 125°C) 

2448 



* Typical Value 

Bold faca indicates additional data is provided on tiia page notad. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error + 'A LSB 
Res. ±LSB nS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Input 


Ofl. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 

Off. 

Bin. 
Input 


CTC or 

2'S 
Compl. 
Input 


Sign. 
Magn. 
Input 


HL 
Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ret. 


MulL 


Latches 


Device 


Source 


Line 


D/A Converters 


(Cont'd) 




10 2 

0.6 


30 


X 


X 


X 


X 






X 


X 






X 




AD7533A 


(Cont'd) 
AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7533J 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7533S 


tAD (3164) 




0.8* 


30* 


X 


X 


X 


X 






X 


X 






X 




AD7533J 


Intersil 








X 


X 


X 








X 


X 






X 




AD7533S 


t Intersil 








X 


X 


X 


X 






X 


X 






X 




MP7533S 


t Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7533T 


t Micro Pwr 








X 


X 


X 


X 






X 


X 






X 




Mr/oool 


Micro Pwr 




1.5* 


300 




X 






X 




X 


X 




X 






DAC-04CC 


PMI 










X 






X 




X 


X 




X 






DAC-06F 


PMI 


10 




350 


X 












X 


X 




X 






DAC-03CD 


PMI 










X 






X 




X 


X 




X 






DAC-06A 


PMI 




500* 


24 


X 












X 


X 






X 




AD7520J 


National 








X 












X 


X 






X 




AD7520S 


t National 








X 












X 


X 






X 




DAC1022 


t National (3320) 








X 












X 


X 






X 




DAC1022C 


National (3320) 




3 0.225 


300 






X 


X 






X 






X 






MP5560D 


Micro Pwr (2749) 












X 


X 






X 






X 






DAC-100D 


- tPMi 












X 


X 






X 






X 






DAC-100D 


PMI 




0.5* 


50 


X 


X 


X 


X 






X 


X 






X 




MP7520H 


Micro Pwr 

(401,2749) 


20 


1.5* 


350 




X 






X 




X 


X 




X 






DAC-06B 


PMI 




4 0.2 






X 


X 








X 


X 




X 






DAC-10G 


PMI 




1.5* 


300 




X 






X 




X 


X 




X 






OAC-06G 


PMI 






350 


X 












X 


X 




X 






DAC-03DD 


PMI 




2.5* 


350 










X 




X 


X 




X 






DAC-04DD 


PMi 




5 1.5* 


350 










X 




X 


X 




X 






DAC-06C 


tPMI 




8 0.5 * 


50 


X 


X 


X 


X 






X 


X 






X 




MP7520G 


Micro Pwr 

(401.2749) 




10 Companding 
1/2 Step 

0.5 


260 












X 














DAC-78E 


PMI 




1 Step 0.5 


260 












X 














DAC-78F 


PMI 




11/2 Step 

0.5 


260 












X 














DAC-78G 


PMI 


30 


10 Plus Sign 

1/2 1.5 * 


350 


X 










X 


X 


X 




X 






DAC-05E 


PMI 






500 


X 










X 


X 


X 




X 






DAC-210A 


tPMi 








X 










X 


X 


X 




X 






DAC-210B 


tPMI 








X 










X 


X 


X 




X 






DAC-210E 


PMI 




6 300 


X 
























mPC610 


NEC-Electron 




1 1.5* 


300 


X 










X 


X 


X 




X 






DAC-210G 


PMI 






350 


X 










X 


X 


X 




X 






DAC-02AC 


PMi 








X 










X 


X 


X 




X 






DAC-02BC 


PMI 






500 


X 










X 


X 


X 




X 






DAC-210F 


PMi 




2 1.5* 


300 


X 










X 


X 


X 




X 






DAC-02CC 


PMI 


40 






X 










X 


X 


X 




X 






DAC-05F 


PMI 






350 


X 










X 


X 


X 




X 






DAC-05A 


tPMI 




3 1.5* 


350 


X 










X 


X 


X 




X 






DAC-05B 


tPMi 








X 










X 


X 


X 




X 






DAC-05C 


PMI 




4 1.5* 


300 


X 










X 


X 


X 




X 






DAC-05G 


PMI 




2.5* 


350 


X 










X 


X 


X 




X 






DAC-02DD 


PMI 





Bin.— Binary Compl.— Complementary CTC— Compi. 2's Compl. 

Off.-Offset Magn.-Magnltude Int Ref.-lnternal Reference Mult.— Multiplying 



IC MASTER 1983 



2449 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling Power 
ity Tiniie Dis. 
Bits Error ±V!LSB mW 
Res. ±LSB iiS, (max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Cortipl. 
Bin. 
Input 


Compl. 

Off. 

Bin. 
Input 


CTCor 

2's 
Compi. 
Input 


Sign. 
Magn. 
input 


ni 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




10 Video DiyitBl Convert6r 

1/2 0.015 2340 


X 


















X 






HDD-1015 


AD 


(3169) 






X 


















X 






HDD-1015C 


AD 


(3169) 






X 


















X 






HDD-1015M 


tAD 


(3169) 




11 Plus Sign Dynamic Range (7-Bit 
pius sign format) 
1/^ Step 

0.5 207 














X 


X 


• 

X 




X 




DAC-88E 


PMI 




















X 


X 


X 




X 




DAC-89E 


PMi 






0.5 * 207 














X 


X 


X 




X 




DAC-76B 


tPMI 




















X 


X 


X 




X 




DAC-76E 


PMI 




















X 


X 


X 




X 




DAC-86E 


PMI 




















X 


X 


X 




X 




DAC-87E 


PMI 






1 Step 0.5 207 














X 


X 


X 




X 




DAC-86C 


PMI 




10 
















X 


X 


X 




X 




OAC-88C 


PMI 




















X 


X 


X 




X 




DAC-89C 


PMI 






0.5 * 207 














X 


X 


X 




X 




DAC-76C 


PMI 




















X 


X 


X 




X 




DAC-87C 


PMI 






12 1/4 0.25 345 


X 


X 










X 


X 




X 






AD565AK 


AD 


(3165) 






X 


X 










X 


X 




X 






AD565AT 


tAD 


(3165) 




0.4 


X 


X 










X 


X 










DAC-562M 


t Datel 






210 


X 


X 










X 


X 




X 






MC3512 


Motorola 


(2757) 




300 


X 


X 










X 


X 




X 


X 




AD566AK 


AD 


(3166) 






X 


X 










X 


X 




X 


X 




AD566AT 


tAD 


(3166) 


20 




X 


X 










X 


X 




X 






AD566K 


AD 


(3166) 






X 


X 










X 


X 




X 






AD566T 


tAD 


(3166) 






X 


X 










X 


X 




X 






MCE566AK 


Micro Eng 








X 


X 










X 


X 




X 


X 




iVICE566AT 


t Micro Eng 








X 


X 










X 


X 




X 


X 




MCE566K 


Micro Eng 








X 


X 










X 


X 




X 






MCE566T 


t Micro Eng 






345 


X 


X 










X 


X 




X 






AD565K 


AD 


(3165) 






X 


X 










X 


X 




X 






AD565T 


tAD 


(3165) 






X 


X 










X 


X 




X 






MCE565K 


Micro Eng 








X 


X 










X 


X 




X 






MCE565T 


t Micro Eng 




30 


780 


X 












X 


X 






X 




HI562A-2 


t Hurls 


(3288) 






X 












X 


X 






X 




HIS62A-8 


Harris 


(3288) 




0.5 20 * 


X 


X 


X 


X 






X 


X 






X 




MP7621C 


Micro Pwr 

(401.2749) 






X 


X 


X 


X 






X 


X 






X 




MP7621L 


Micro Pwr 

(401.2749) 






X 


X 


X 


X 






X 


X 






X 




MP7621U 


t Micro Pwr 

(401.2749) 




375 


X 


X 










X 


X 




X 






HI565AK 


Harris 








X 


X 










X 


X 




X 






HI565AT 


t Harris 






495 


X 


X 










X 


X 




X 




X 


AD5e7K 


AD 


(3166) 




1 64* 


X 


X 










X 


X 






X 




HI7541K 


Harris 

(2731. 3288) 






X 


X 










X 


X 






X 




HI7541T 


t Harris 

(2731.3288) 


40 


1.5 465 


X 


X 










X 


X 






X 




AD562S/BIN 


AD (3166.3168) 






X 


X 










X 


X 






X 




AD562S/BIN 


Micro Pwr 






475 


X 


X 










X 


X 




X 






AD563K/BIN 


AD 


(3165) 






X 


X 










X 


X 




X 






AD563S/BIN fAD 


(3185) 






X 


X 










X 


X 




X 






AD563T/BIN fAD (3165) 

(Continued) 





t Military Temperature Range ( - 55° to 125°C) 

2450 



* Typical Value 

Boid laco indicates addilionai data is provided on liie page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Seniing 
ity Time 
Bits Error ±'ALSB 
Res. ± LSB I1.S 


Power 
Dis. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Oft. 
Bin. 
Input 


CTCor 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


TTL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




12 1/4 

1.5* 


200 * 


X 


X 










X 


X 






X 




MP562 


(Cont'd) 

Micro Pwr 

(401.2749) 




1.8 


500 


X 


X 


X 


X 






X 


X 




X 


X 




MN562-SD- 
BIN 


Analogic 








700 


X 


X 


X 


X 






X 


X 




X 


X 




MN563-SD- 
BIN 


Analogic 






1/2 


35 




X 






X 


X 


X 










X 


AD7545C 


AD 


(3166) 










X 






X 


X 


X 










X 


AD7545GC 


AD 


(3166) 










X 






X 


X 


X 










X 


AD7545GL 


AD 


(3166) 










X 






X 


X 


X 










X 


AD7545GU 


AD 


(3166) 










X 






X 


X 


X 










X 


AD7545L 


AD 


(3166) 










X 






X 


X 


X 










X 


AD7S45U 


AD 


(3166) 




0.035 




























DAC63 


Burr-Brown 




10 




855 


X 


X 










X 


X 










HOS-1250 


AD 


(3169) 








X 


X 










X 


X 










HDS-1250M tAD 


(3169) 




0.05 








X 


X 






X 




X 


X 






ADH-030II-12 


DDC 






0.050 


780 


X 


X 










X 






X 






DAC- 

HF12BMC 


DattI 


(2621) 








X 


X 










X 






X 






DAC- 
HF12BMM 


t Datel 








1200 


X 


X 










X 








X 




DAC391B-12 t Hybrid Sys 








X 


X 










X 








X 




DAC391C-12 


Hybrid Sys 








1350 






X 


X 










X 


X 






DAC397B-12 f Hybrid Sys 












X 


X 










X 


X 






DAC397C-12 


Hybrid Sys 






0.06/1 


675 






X 


X 






X 






X 






DAC-8528-12 


tDDC 




20 


0.060 


395 


X 


X 










X 






X 






4065 


t Teledyne P 






0.085 * 


780 


X 












X 


X 






X 




HI5612-2 


t Harris 










X 












X 


X 






X 




HI5612-4 


Harris 










X 












X 


X 






X 




HI5612-5 


Harris 










X 












X 


X 






X 




HI5612-8 


t Harris 






0.10 


775 






X 


X 






X 






X 






DAC87-CBI-i t DDC 






850 






X 


X 


X 




X ' 






X 






DAC85LD- 
CBI-I 


DDC 






0.18 
















X 








X 




A07544B 


AD 


(3166) 
































A07544BG 


AD 


(3166) 
































AD75446K 


AD 


(3166) 


30 






X 
























AD7544GT 


tAD 


(3166) 








X 


X 










X 


X 






X 




AD7544K 


AD 


(3166) 








X 


X 










X 


X 






X 




AD7544T 


tAD 


(3166) 




0.20 


430* 


X 


X 






X 




X 


X 




X 






DAC10HT 


t Burr-Brown 






0.25 


345 


X 


X 










X 


X 




X 






AD565AJ 


AD 


(3165) 








X 


X 










X 


X 




X 






AD565AS 


tAD 


(3165) 








X 


X 










X 


X 




X 






MCE565AJ 


Micro Eng 










X 


X 










X 


X 




X 






MCE565AS 


t Micro Eng 








900 






X 


X 






X 






X 






4080 


t Teledyne P 














X 


X 






X 






X 






4080-83 


t Teledyne P 




40 










X 


X 






X 






X 






4081 


Teledyne P 














X 


X 






X 






X 






4081-83 


t Teledyne P 














X 


X 






X 






X 






4082 


Teledyne P 














X 


X 






X 






X 






4082-83 


t Teledyne P 






0.3 


770* 






X 








X 


X 




X 






DAC-85C- 
CBI-I 


Ditll 


(2621) 












X 








X 


X 




X 






DAC-87C- 
CBi-l 


t Datel 








1000 






X 








X 






X 






HI5680I-5 


Hirrls (2689) 

(Continued) 





Bin.— Binary Compl.-Complementary CTC— Compl. 2's Compl. 

Off.— Offset Magn.-Magnltude Int Ref.-lnternal Reference Mult.— Multiplying 

®IC MASTER 1983 2451 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
ity Time 
Bits Error ± Vi LSB 
Res. ±LSB nS 


Power 
Dis. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compi. 

Off. 

Bin. 
Input 


CTC or 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


TTL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




12 1/2 0.3 


1000 






X 








X 


X 




X 






HI5685I-4 


(Cont'd) 
Harris (2696) 












X 


X 






X 






X 






HIS687I-2 


t Harris 


(2700) 




0.3/1.5 * 


800 * 






X 


X 


X 




X 






X 






UAUbOU-liBI- 
1 


Burr-Brown 














X 


X 


X 




X 






X 






DAC650-CBI- 
V 


Burr-Brown 














X 


X 


X 




X 






X 






DAC800-CBI- 
1 


Burr-Brown 














X 


X 


X 




X 






X 






DAC800-CBI- 
V 


Burr-Brown 














X 


X 


X 




X 






X 






DAC851-CBI- 
1 


t Burr-Brown 






0.3/2.5 * 


500* 






X 








X 


X 




X 






DAC1Z80AC 


National 


(3345) 
































DAC1285 


t National 


(3345) 


































t National 


(3345) 


10 
































National 


(3345) 
































niri7R'ir 


National 


(3345) 
































UMuOU-L»DI V 


National 


































V 


National 














X 








X 


X 










DAC85-CBI-V 


National 














X 








X 


X 










DAC85L-CBI- 
V 


National 














X 








X 


X 










DAC87-CBI-V 


National 






0.3/3 * 


800 






X 


X 


X 




X 






X 






DAC80/CBI 


Burr-Brown 














X 


X 


X 




X 






X 






DAC85/CBI 


Burr-Brown 














X 


X 


X 




X 






X 






DAC85C/CBI 


Burr-Brown 




20 










X 


X 


X 




X 






X 






DAC87/CBI 


t Burr-Brown 








850 






X 


X 


X 




X 






X 






ADDAC87/ 
CBI 


tAD 


(3165) 












X 


X 


X 




X 






X 






DAC85/CBI 


Micro Net 








925 






X 


X 


X 




X 






X 






ADDAC80/ 
CBI 


AD 


(3164) 












X 


X 


X 




X 






X 






ADDAC85/ 
CBI 


tAD 


(3164) 
































nuunuouu/ 

CBI 


AD 


(3164) 




0.35 


230 


X 












X 












HI5660 


Harris 


(2730) 




0.4 





X 


X 










X 


X 










DAC-SB2C 


Datal 


(2621) 












X 


X 


X 




X 












HIDAC801 


Harris 








210 


X 


X 










X 


X 




X 






MC3412 


Motoroli 


(2757) 


30 




300 


X 


X 










X 


X 




X 


X 




AD566AJ 


AD 


(3166) 








X 


X 










X 


X 




X 


X 




AD5B6A8 


tAD 


(3166) 








X 


X 










X 


X 




X 






ADS66J 


AD 


(3166) 








X 


X 










X 


X 




X 






AD566S 


tw 


(3166) 








X 


X 










X 


X 




X 






MCE565J 


Micro Eng 










X 


X 










X 


X 




X 






MCE565S 


t Micro Eng 










X 


X 










X 


X 




X 


X 




MCE566AJ 


Micro Eng 










X 


X 










X 


X 




X 


X 




MCE566AS 


t Micro Eng 










X 


X 










X 


X 




X 






MCE566J 


Micro Eng 










X 


X 










X 


X 




x 






MCE566S 


t Micro Eng 




40 




345 


X 


X 










X 


X 




X 






ADS65J 


AD 


(3165) 








X 


X 










X 


X 




X 






AD56SS 


tAD (3165) 

(Continued) 





-*— ' 
CO 
03 



t Military Temperature Range ( - 55° to 125°C) 

2452 



* Typical Value 

Bold face Indicates iddltlonal data Is provided on the page noted. 



^ IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
ity Time 
Bits Error t'/sLSB 
Res. ± LSB iiS 


Power 
Dis. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
Input 


CTC or 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


TTL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




12 1/2 0.4 


400 


X 


X 










X 


X 






X 




DAC862S 


t Burr-Brown 


(Cont'd) 








X 


X 


X 


X 






X 


X 


X 




X 




mPC648 


NEC-Electron 






780 


X 












X 


X 






X 




HI562A-4 


Harris 


(OCoO) 








X 












X 


X 






X 




HI562A-5 


Harris 


(3288) 




0.5 


0.05 


X 


X 










X 


X 






X 




DAC-HA12BC 


Date! 


/OCOIV 

(^0^1) 








X 


X 










X 


X 






X 




DAC-HA12BMtDatel 


\COL\J) 






10 * 


X 












X 


X 






X 




DAC1220 


t National 










X 












X 


X 






X 




DAC1220C 


National 








20 


X 


X 










X 


X 






X 




DAC- 


Oatel 










X 


X 










X 


X 






X 




DAC- 

HA12BM-1 


t Datel 




10 




312* 


X 


X 


X 


X 


X 




X 


X 


X 




X 




AM6012C 


AMD 


(3101) 








X 


X 


X 


X 


X 




X 


X 


X 




X 




AM6012r^ 


fAMD 


(3101) 








X 


X 


X 


X 


X 




X 


X 


X 




X 




MCE6012C 


Micro Eng 


(4440) 








X 


X 


X 


X 


X 




X 


X 


X 




X 




rilCE6012r.! 


t Micro Eng 


(4440) 






375 


X 


X 










X 


X 




X 






HI565AJ 


Harris 










X 


X 










X 


X 




X 






HI565AS 


t Harris 








495 


X 


X 










X 


X 




X 




X 


AD567J 


AD 


(3166) 








X 


X 










X 


X 




X 




X 


AD567S 


fAD 


(3166) 






1000 


X 












X 


X 






X 




AD562 


Motorola 


(2759) 








X 












X 


X 




X 






AD563 


Motorola 


(2759) 


20 


0.5* 


20* 


X 


X 


X 


X 






X 


X 






X 




MP7623 


Micro Pwr 

(401.2749) 






1300 






X 


X 






X 


X 










HDH-1205 


AD 


(3169) 












X 


X 






X 


X 










HDH-12G5M 


tAD 


(3169) 




0.6 


1410 


X 


X 










X 








X 




DAC392B-12 


Hybrid Sys 










X 


X 










X 








X 




DAC392C-12 


Hybrid Sys 






1 


20* 


X 


X 


X 


X 






X 


X 






X 




AD7541B 


AD (3164.3166) 








X 


X 


X 


X 






X 


X 






X 




AD7541K 


AD (3164.3166) 








X 


X 


X 


X 






X 


X 






X 




AD7541T 


tAD (3164.3166) 








X 


X 


X 


X 






X 


X 






X 




AD7541B 


Intersil 










X 


X 


X 


X 






X 


X 






X 




MUl ll\ 


Intersil 




30 








X 


X 


X 






X 


X 






X 




AD7541T 


Intersil 












X 


X 








X 


X 






X 




MP7541 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7621B 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7621K 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7621T 


t Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




754 IT 


t Teledyne S 










X 


X 


X 


X 






X 


X 






X 




TSC7541B 


Teledyne S 










X 


X 


X 


X 






X 


X 






X 




TSC7541K 


Teledyne S 










X 


X 


X 


X 






X 


X 






X 




TSC8641B 


t Teledyne S 










X 


X 


X 


X 






X 


X 






X 




TSC8641C 


Teledyne S 




40 




30 


X 


X 










X 


X 






X 




HS7541B-2 


t Hybrid Sy? 










X 


X 










X 


X 






X 




HS7541C-2 


Hybrid Sys 










X 












X 


X 






X 




DAC1203 


National 


(3320) 








X 












X 


X 






X 




DAC1218 


National 










X 












X 


X 






X 




DAC1230 


National 








30* 


X 


X 










X 


X 






X 




HS7541-4 


Hybrid Sys 








64* 


X 


X 










X 


X 






X 




HI7541J 


Harris 

(2731.3288) 








X 


X 










X 


X 






X 




HI7541S 


t Harris 

(2731.3288) 

(Continued) 





Bin.— Binary Compl.— Complementary , CTC— Compl. 2's Compl. 

Off.— Offset Magn.— Magnitude Int Ref.— Internal Reference Mult.— Multiplying 



® IC MASTER 1983 



2453 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling Power 
Ity Time DIs. 
Bits Error ±y!LSB mW 
Res. ±LSB iiS (max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
Input 


CTCor 

2'S 
Compl. 
Input 


sign. 
Magn. 
Input 


HL 
Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device Source 


Line 


D/A Converters 






12 1/2 

1 * 750 




X 


X 








X 


X 




X 






(Cont'd) 

noUAtoUUDI- 

1 Hybrid Sys (2747) 




1/1.5 * - 




• 


X 


X 






X 






X 






HSDAC87BI/ 

V t Hybrid Sys 










X 


X 






X 






X 






HSDAC87CI/ 

V Hybrid Sys 




1.5 300 






X 


X 






X 


X 




X 






DAC335B-12 t Hybrid Sys 










X 


X 






X 


X 




X 






DAC335C-12 Hybrid Sys 




1.5* - 


X 












X 


X 




X 




X 


AltRRI 1 in fQIRCi 
AUuDjJ AU (dlDO| 




465 


X 


X 










X 


X 






X 




AD562K/BIN AD (3166.3168) 




475 


X 


X 










X 


X 




X 






AD563J/BIN AD (3165) 




750 




X 


X 








X 


X 




X 






HSDAC80CBI- 

V Hybrid Sys (2747) 




1.5/2.5 * 






X 








X 


X 










DAC1200 t Nitlonil 

(3320,3345) 


10 








X 








X 


X 










DAC1200C Nillonil 

(3320,3345) 




1.8 500 


X 


X 


X 


X 






X 


X 




X 


X 




MN562-AD- 

BIN Analogic 






X 


X 


X 


X 






X 


X 




X 


X 




MN562-ID- 

BIN Analogic 






X 


X 


X 


X 






X 


X 




X 


X 




MN562-KD- 

BIN Analogic 




700 


X 


X 


X 


X 






X 


X 




X 


X 




iViriaDO'JU* 

BIN Analogic 






X 


X 


X 


X 






X 


X 




X 


X 




MN563-KD- 

BIN Analogic 






X 


X 


X 


X 






X 


X 




X 


X 




MN563-TD- 

BIN Analogic 




2 40 


X 


X 










X 


X 






X 




lllJfu4£ll , All ^OIuDJ 






X 


X 










X 


X 






X 




nvlu^LK nil ^OIuD| 






X 


X 










X 


X 






X 




in7>;i9T 4 in <4irr\ 

Illllu4£l 1 All ^Oluuj 






X 












X 








X 




AIIIU40D All ^OIODJ 






X 












X 








X 




AD/a43K AU (olDD) 




375 


























4058 t Teledyne P 




375* 


X 


X 


X 








X 


X 






X 




HS3120B-2 t Hybrid Sys (2747) 






X 


X 


X 








X 


X 






X 




HS3120C-2 Hybrid Sys (2747) 




1900 






X 


X 






X 












HDD-1206J AD (3169) 










X 


X 






X 












HDD-1206S tAD (3169) 




2* - 






X 


X 






X 












DAC345I-12 Hybrid Sys 




2.5 


X 


X 










X 


X 




X 






DAC338B-12- 

2 Hybrid Sys (2748) 




3 30 


X 


x 










X 


X 






X 




DAC331B-12 t Hybrid Sys 


30 




X 


X 










X 


X 






X 




DAC331C-12 Hybrid Sys 




770* 






X 








X 


X 




X 






DAC-85C- 

CBI-V Datel 










X 








X 


X 




X 






DAC-87C- 

PDI 1/ 4. riof/il 




775 






X 


X 






X 






X 






DAC87-CBI-I t DDC 




850 






X 


X 


X 




X 






X 






DAC85LD- 

CBI-V DDC 










X 


X 


X 




X 






X 






MNDAC87 t Micro Net 




900 


X 


X 










X 






X 




X 


DAC- 

HK12BGC Datel 

(Continued) 





t Military Temperature Range (-55° to 125°C) 

2454 



* Typical Value 

Bold face Indlcitss iddltionil diti Is provided on the piga noted. 



®IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling Power 

ity Time DIs. 

Bits Error ±'/!LSB mW 

Res. ±LSB )iS (max.) 



Bin. 
Input 



OH. 
Bin. 
Input 



Compl. 
Compl. Off. 
Bin. Bin. 
Input input 



CTCor 

2's Sign, 

Compl. Magn. 

Input Input 



Logic 



CMOS 
Logic 



ECL 
Logic 



Int. 
Ref. 



Latcties Device 



D/A Converters 



(Cont'd) 



1/2 



3 900 










X 




X 






X 




X 

• 


(Cont'd) 

DAC- 

HK12BGC-2 Datel 


X 


X 










X 






X 




X 


DAC- 

HK17RilH + filial l?R9D\ 


























HAC- 

HK12BMM-2 f Datel 


1000 






X 








X 






X 






HI5680V-5 Harris (2689) 






X 








X 


X 




X 






HI5685V-4 Hirrls (2696) 






X 


X 






X 






X 






HI5687V-2 Harris (2700) 


1050 






X 


X 






X 






X 






OAC- 

HZ12BGC Datsi (2621) 






X 


X 






X 






X 






HAC- 

HZ12BMM t Datel 


3.5 465 


X 


X 










X 


X 






X 




AD562A/BCD 

AO (3166,3168) 




X 










X 


X 






X 




AD562A/BIN AD (3166,3168) 


4 300 














X 


X 




X 




X 


DAC336B-12 t Hybrid Sys 














X 


X 




X 




X 


DAC336C-12 Hybrid Sys 


5 450 * 
















X 










HS9338-2 Hybrid Sys (2748) 


1000 


























HS3860B t Hybrid Sys (2748) 


























HS3860C Hybrid Sys (2748) 


5 * _ 


























DAC345V-12 Hybrid Sys 


525* 
















X 










MN3850 t Micro Net 


























MN3850H Micro Net 


675* 


























MN3860 Micro Net 


























MN3860H t Micro Net 


7 1000 


























AD3860K AD (3166) 






X 


X 






X 






X 




X 


AD3860S tAO (3166) 


8 - 


X 












X 


X 










AD390K AD (3166) 


375 






X 


X 






X 






X 






MN3348 Micro Net 






X 


X 






X 






X 






MN3348H t Micro Net 


10 375 






X 


X 






X 






X 






MN3349 Micro Net 






X 


X 






X 






X 






MN3349H f Micro Net 


/DU 






X 


X 


X 
















UMO OL~ l£, J UUu 


15 165 


X 








X 




X 


X 






X 




UMiionOD' ic I riyijriu oys 


X 








X 




X 


X 






X 




It nyuriQ oys 


300 


X 


X 










X 


X 




X 






UAi/04yo- 1^ 7 riyDriu bys 


X 


X 










X 


X 




X 






DACo4ac-iZ rlyDrldbys 


X 


X 










X 


X 




X 






DAC9349-12 Hybrid Sys 


20 150 






X 


X 






X 


X 




X 






DAC347LPB- 

12U t Hybrid Sys 


























DAC347LPC- 

12B Hybrid Sys 






X 


X 






X 


X 




X 






DAC347LPC- 

12U Hybrid Sys 






X 


X 






X 


X 




X 






HAC347LPB- 

12B t Hybrid Sys 


355 






X 








X 








X 




MN3412 Micro Net 


25 








X 






X 


X 




X 




X 


DAC02701 DDC 


175* 






X 








X 


X 




X 






DAC9356 Hybrid Sys 


30 


X 




X 








X 








X 




M/OA2000 HyComp 


35 90 






X 








X 






X 






MN371 Micro Net 






X 








X 






X 






MN371H t Micro Net 


150 








X 






X 


X 




X 






AD370J AD (3165) 








X 






X 


X 




X 






AD370K AO (3165) 








X 






X 


X 




X 






AD37aS tAO (3165) 






X 








X 


X 




X 






AD371J AD (3165) 

(Continued) 



20 



30 



40 



Bin.— Binary 
Off.-Offset 

<^IC MASTER 1983 



Magn.— Magnitude 



Compl.— Complementary 



Int Ref.— Internal Reference 



CTC— Compl. 2's Compl. 
Mult.— Multiplying 

2455 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error ± Vz LSB 
Res. ± LSB iS 


Power 
Dis. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
input 


CTCor 

2's 
Compl. 

Input 


sign. 
Magn. 
Input 


TTL 
Logic 


CMOS 
Logic 


ECL 
Logic 


InL 
Ref. 


Mult. 


Latches 


Device 


Source 


Line 


D/A Converters 


(Cont'd) 




12 1/2 35 


1065 


X 




X 








X 


X 




X 






MN3210 


Micro Net 


(Cont'd) 














X 






X 


X 




X 






MN3211 


Micro Net 






35* 




X 


X 










X 


X 




X 






DDC1250-12- 

1 


DDC 










X 


X 










X 


X 




X 






DDC1250-12- 
3 


DDC 






50 


265 








X 






X 


X 




X 






DAC356B-12 t Hybrid Sys 














X 






X 


X 




X 






DAC356C-12 


Hybrid Sys 








908 








X 






X 


X 




X 






DAC356LPB- 
12 


t Hybrid Sys 
















X 






X 


X 




X 






DAC356LPC- 
12 


Hybrid Sys 








1653 






X 


X 










X 


X 






HDS-1240E 


AD 


(3169) 












X 


X 










X 


X 






HDS-1240EM 


t AD 


(3169) 


10 


70 


90 


























MN370 


Micro Net 






\ 




























MN370H 


t Micro Net 






3/4 8 




























AD390J 


AD 


(3166) 




1 - 


35 




X 






X 


X 


X 










X 


AD7545B 


AD 


(3166) 










X 






X 


X 


X 










X 


AD7545K 


t AD 


(3166) 










X 






X 


X 


X 










X 


AD7545T 


AD 


(3166) 




0.06/1 


675 






X 


X 






X 


\ 




X 






DAC-8528-11 


tDDC 






0.18 


- 


X 


X 










X 


X 






X 




nil 1 u*t*tn 


AD 


(3166) 








X 


X 










X 


X 






X 




in7S44 1 


AD 


(3166) 








X 


X 










X 


X 






X 




in7R44^ 


AD 


(3166) 


20 


1 


20* 


X 


X 


X 


X 






X 


X 






X 




nuf u4 in 


AD (3164.3166) 








X 


X 


X 


X 






X 


X 






X 




AD7541J 


AD (3164.3166) 








X 


X 


X 


X 






X 


X 






X 




AD7541A 


Intersil 










X 


X 


X 


X 






X 


X 






X 




AD7541J 


Intersil 










X 


X 


X 


X 






X 


X 






X 




MP76Z1A 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7621J 


Micro Pwr 

(401.2749) 
































MP7621S 


t Micro Pwr 

(401.2749) 
































7541S 


t Teledyne S 










X 


X 


X 








X 


X 






X 




TSC7441S 


t Teledyne S 










X 


X 


X 








X 


X 






X 




TSC7541A 


Teledyne S 




30 






X 


X 


X 








X 


X 






X 




TSC7541J 


Teledyne S 










X 


X 


X 








X 


X 






X 




TSC8640B 


t Teledyne S 










X 


X 


X 








X 


X 






X 




TSC8640C 


Teledyne S 








30 


X 


X 










X 


X 






X 




HS7541B-1 


t Hybrid Sys 










X 


X 










■ X 


X 






X 




HS7541C-1 


Hybrid Sys 










X 












X 


X 






X 




DAC1209 


Nitioml 


(3320) 








X 












X 


X 






X 




DAC1219 


National 










X 












X 


X 






X 




D AC 1231 


National 








40* 


X 


X 


X 


X 






X 


X 






X 


X 


MP7622A 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 


X 


MP7622J 


Micro Pwr 

(401.2749) 


40 






X 


X 


X 


X 






X 


X 






X 


X 


MP76Z2S 


t Micro Pwr 

(401.2749) 






50* 


X 


X 


X 


X' 






X 


X 






X 




AD7541S 


tAD (3164.3166) 








X 


X 


X 


X 






X 


X 






X 




AD7541L 


Intersil 










X 


X 


X 


X 






X 


X 






X 




AD7541S 


t Intersil 






2 


40 


X 


X 










X 


X 






X 




AD754ZA 


AD (3166) 

(Continued) 





CD 

;d 

O 

c 
o 

-4— • 

o 
CO 

k_ 

CD 
■♦— ' 

to 
cc 



t Military Temperature Range ( - 55° to 125°C) 

2456 



* Typical Value 

Bold face indicates addltlonai data is provided on tlia page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling Power 
Ity Time DIs. 
Bits Error ±\^LSB mW 
Res. ±LSB nS (max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
Input 


CTCor 

2's 
Compl. 
Input 


sign. 
Magn. 
Input 


HL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




12 1 2 , 40 


X 


X 










X 


X 






X 






in 
nU 


(Cont'd) 

(J 1 DO) 






X 


X 










X 


X 






X 




AD754ZS 


tAD 


(3166) 






X 


X 










X 








X 




AD7543A 


AD 


(3166) 






X 


X 










X 








X 




AD7543J 


AD 


(3166) 




2.5 — 


X 


X 










X 


X 




X 






DAC338B-12- 
1 


Hybrid Syt 


(2748) 




2.5 * 625 * 






X 








X 


X 




X 






DAC1280C 


Nitlonal 


(3345) 




5 450* 


X 


X 










X 


X 




X 






HS9338-1 


HybrldSyt 


(2748) 




10 750 






X 


X 


X 




X 






X 




X 


DAC-SL-11 


tDDC 






20 * 500 


X 


X 










X 


X 




X 




X 


DAC9377-16 
5 


Hybrid Sys 


(2745) 




30 - 


X 




X 








X 








X 




M/DA2005 


HyComp 




10 


35 150 






X 








X 


X 




X 






AD371K 


AD 


(3165) 










X 








X 


X 




X 






AD371S 


tAD 


(3165) 




2-35 




X 






X 


X 


X 










X 


A0754SA 


AD 


(3166) 








X 






X 


X 


X 










X 


AD7545J 


AD 


(3166) 








X 






X 


X 


X 










X 


AD7545S 


tAD 


(3166) 




0.04 - 


X 


X 














X 


X 






DA4OO0 


HyComp 






0.05 - 






X 


X 






X 




X 


X 






ADH-O3OII-10 


DDC 






0.25 375 


X 




X 








X 


X 


X 




X 




DAC312B 


fPMI 








X 




X 








X 


X 


X 




X 




DAC312F 


PMI 






0.5 20 * 


X 


X 


X 


X 






X 


X 






X 




MP7621H 


Micro Pwr 

(401,2749) 


20 




X 


X 


X 


X 






X 


X 






X 




MP7621R 


t Micro Pwr 

(401.2749) 






X 


X 


X 


X 






X 


X 






X 




MP7621Z 


Micro Pwr 

(401.2749) 




0.5 * 20 * 


X 


X 


X 


X 






X 


X 






X 




A07521L 


AD 


(3164) 






X 


X 


X 


X 






X 


X 






X 




AD7521U 


tAD 


(3164) 






X 


X 


X 


X 






X 


X 






X 




AD7521L 


Intersil 








X 


X 


X 


X 






X 


X 






X 




AD7521U 


t Intersil 








X 


X 


X 


X 






X 


X 






X 




AD7531L 


Intersil 








X 


X 


X 


X 






X 


X 






X 




MP7521L 


Micro Pwr 

(401.2749) 






X 


X 


X 


X 






X 


X 






X 




MP7521P 


Micro Pwr 

(401.2749) 






X 


X 


X 


X 






X 


X 






X 




MP7521U 


t Micro Pwr 

(401.2749) 


30 




X 


X 


X 


X 






X 


X 






X 




MP7531L 


Micro Pwr 

(401.2749) 




0.50 397 


X 


X 


X 




X 




X 


X 


X 




X 




AM6012 


Slgoillct 


(3383) 




1 30 


X 












X 


X 






X 




DAC1210 


National 








X 












X 


X 






X 




DAC1232 


National 






2 40* 


X 


X 


X 


X 






X 


X 






X 


X 


HP7622H 


Micro Pwr 

(401.2749) 






X 


X 


X 


X 






X 


X 






X 


X 


MP7622R 


t Micro Pwr 

(401.2749) 






X 


X 


X 


X 






X 


X 






X 


X 


MP7622Z 


Micro Pwr 

(401.2749) 




375* 


X 


X 


X 








X 


X 






X 




DAC3120B-0 tHybrli Sys 


(2747) 






X 


X 


X 








X 


X 






X 




DAC3120C-0 


HybrldSyt (2747) 

(Continued) 





Bin.— Binary 
Off.-Offset 

«IC MASTER 1983 



Magn.— Magnitude 



Compl.— Ccmplementary 



Int Ref.— Internal Reference 



CTC— Compl. 2's Compl. 
Mult.-Multlplying 

2457 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 

Bits Error ±y!LSB 

Res. ±LSB 


Power 
Dis. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


CompI. 
Bin. 
Input 


CompI. 

Off. 

Bin. 
Input 


CTCor 

2's 
CompI. 

Input 


Sign. 
Magn. 
Input 


TTL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int 
Ref. 


Mult. 


Latches 


Device 


Source 


Line 


D/A Converters 


(Cont'd) 




12 2 

2* 


- 






X 


X 






X 












DAC345I-10 


(Cont'd) 

Hybrid Sys 




2.5 






)( 












X 




X 






DAC338B-12 



Hybrid Sys (2748) 




5 


450* 


X 


X 










X 


X 




X 






HS9338-0 


Hybrid Sys (2748) 






800 






X 


X 






X 


X 




X 






DAC1201 


t Nitlonil 

(3320,3345) 












X 


X 






X 


X 




X 






DAC1201C 


Ntllonal 

(odcU.oo4a) 




5 * 








X 


X 






X 












UAl/04DV-lU 


nyDrio oys 




on * 


500 


X 


X 










X 


X 




X 




X 


UAbUo/ f-ID 
4 


Hybrid Sys (2745) 




35* 


- 


X 


X 










X 


X 




X 






DDC1250-10- 
1 


DDC 








X 


X 










X 


X 




X 






DDC1250-10- 
3 


DDC 




500* 


24 


X 












X 


X 






X 




AD7521L 


National 


10 






X 












X 


X 






X 




An7wiii 

MU/ u£ lU 


t National 




4 0.5 * 


20* 


X 


X 


X 


X 






X 


X 






X 




AD7S21K 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7521T 


t AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7531K 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7521K 


Intersil 








X 


X 


X 


X 






X 


X 






X 




AD7521T 


t Intersil 








X 


X 


X 


X 






X 


X 






X 




AD7531K 


Intersil 








X 


X 


X 


X 






X 


X 






X 




MP7521K 


Micro Pwr 








X 


X 


X 


X 






X 


X 






X 




IIP7^91II 

nri u£ in 


Micro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 




MP7521T 


t Micro Pwr 

(401,2749) 


20 






X 


X 


X 


X 






X 


X 






X 




MP7531K 


Micro Pwr 

(401,2749) 




500* 


24 


X 












X 


X 






X 




AD7521K 


National 








X 












X 


X 






X 




AD7521T 


t National 








X 












X 


X 






X 




DAC1221 


t National 








X 












X 


X 






X 




UAu1Z21C 


National 




8 0.5 * 


20* 


X 


X 


X 


X 






X 


X 






X 




AD7521J 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7521S 


tAD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7531J 


AD (3164) 








X 


X 


X 


X 






X 


X 






X 




AD7521J 


Intersil 








X 


X 


X 


X 






X 


X 






X 




AD7521S 


t Intersil 


30 






X 


X 


X 


X 






X 


X 






X 




AD7531J 


Intersil 








X 


X 


X 


X 






X 


X 






X 




MP7521J 


Micro Pwr 

(401.2749) 








X 


X 


X 


X 






X 


X 






X 




MP7521M 


Micro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 




MP7521S 


t Micro Pwr 

(401,2749) 








X 


X 


X 


X 






X 


X 






X 




MP7531J 


Micro Pwr 

(401,2749) 




500* 


24 


X 












X 


X 






X 




AD7521J 


National 








X 












X 


X 






X 




AD7521S 


t National 








X 












X 


X 






X 




DAC1222 


t National 








X 












X 


X 






X 




DAC1222C 


National 




16 0.5 * 


50 


X 


X 


X 


X 






X 


X 






X 




MP7521H 


Micro Pwr 

(401,2749) 


40 


32 0.5 * 


50 


X 


X 


X 


X 






X 


X 






X 




MP7521G 


Micro Pwr 

(401.2749) 





t Military Temperature Range (-55° to 125°C) 

2458 



* Typical Value 

Bold fics indicates idditlonii data Is provided on the page noted. 



®IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling Power 
ity Time Dis. 
Bits Error ±y!LSB mW 
Res. ±LSB fiS (max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
Input 


CTC or 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


TTL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latcfies 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




12 Plus Sign Dynamic Range (7-Bit 
plus sign format) 

- 0.5 192 














X 












AM6072C 


AMD 




















X 












AM6072M 


t AMD 






1/2 step 

0.5 192 














X 












AM6070AC 


AMD 




















X 












AM6070AM 


t AMD 






207 














X 


X 


X 




X 




DAC-86E 


PMI 






1 step 0.5 192 














X 












AM6070C 


AMD 




















X 












AM6070M 


t AMD 






207 














X 


X 


X 




X 




DAC-86C 


PMI 






0.5 * 192 














X 


X 


X 




X 




DAC-76 


tPMI 






12-3 Digit BCD 

1/4 0.3 770 * 






X 








X 


X 




X 






DAC-85C- 
CCD-I 


Datel 




10 








X 








X 


X 




X 






DAC-87-CCD 
1 


t Datel 






0.3/3* 925 














X 


X 




X 






ADDACBO/ 
CCD 


AD 


(3164) 










X 








X 


X 




X 






ADDAC85/ 
CCD 


t AD 


(3164) 










X 








X 


X 




X 






ADDAC85C/ 
CCD 


AD 


(3164) 




3 770* 






X 








X 


X 




X 






DAC-85C- 
CCD-V 


Datel 












X 








X 


X 




X 






DAC-87-CCD 
V 


t Datel 






900 




















X 




X 


DAC- 
HK12DGC 


Datel 


























X 




X 


DAC- 

HK12DMM 


t Datel 






3 * 1050 














X 






X 






DAC- 
HZ12DGC 


Datel 




















X 






X 






DAC- 
HZ12DMC 


Datel 




20 
















X 






X 






DAC- 
HZ12DIVIiVI 


t Datel 






1/2 0.3/3 * 800 














X 






X 






DAC80/CCD 


Burr-Brown 




















X 






X 






DAC85/CCD 


t Burr-Brown 




















X 






X 






DAC85C/CCD 


Burr-Brown 






850* 














X 






X 






DAC85/CGD 


t Micro Net 




















X 






X 






DAC85C/CCD 


Micro Net 






0.5 30 














X 


X 




X 






DAG- 
HA12DC-1 


Datel 




















X 


X 




X 






DAC- 

HA12DM-1 


t Datel 






0.5 * 0.05 














X 


X 




X 






DAC-HA12DC 


Datel 




















X 


X 




X 






DAG- 
HA12DM 


t Datel 




30 


1.8 500 














X 


X 




X 


X 




MN562-AD- 
BGD 


Analogic 




















X 


X 




X 


X 




MN562-ID- 
BGD 


Analogic 




















X 


X 




X 


X 




MN562-KD- 
BCD 


Analogic 






700 














X 


X 




X 


X 




MN563-JD- 
BCD 


Analogic 

(Gontinued) 





Bin.— Binary 
Off.-Offset 

®IC MASTER 1983 



Magn.— Magnitude 



Compl.— Gomplementary 



Int Ref.— internal Reference 



CTG-Gompl. 2's Compl. 
Mult.— Multiplying 

2459 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- 
ity 

Bits Error 
Res. ±LSB 


Settling 
Time 
iViLSB 
/xS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Input 


0«. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compi. 

OH. 

Bin. 
Input 


CTCor 

2's 
Compl. 
Input 


sign. 
Magn. 
Input 


TTL 
Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




12-3 Digit BCD 
1/2 


1.8 


700 


























!VIN563-KD- 
BCD 


Analogic 


(Cont'd) 


































MN563-TD- 
BCS 


Analogic 








15 


300 


























DAC349B-3D f Hybrid Sys 










X 


X 










X 


X 




X 






DAC349C-3D 


Hybrid Sys 












X 












X 


X 




X 






DAC9349-3D 


Hybrid Sys 








35 


1065 














X 


X 




X 






MN3212 


Micro Net 






1/10 


1.5* 


465 














X 


X 






X 




AD562K/BCD 


AD (3166,3168) 






















X 


X 






X 




AD56ZS/BCD 


tAO (3166,3168) 








475 














X 


X 




X 






AD563J/BCD 


AD 


(3165) 






















X 


X 




X 






AD563K/BCD 


AD 


(3165) 


10 




















X 


X 




X 






ADS63S/BCD 


t AD 


(3165) 






















X 


X 




X 






AD563T/BCB 


tAD 


(3165) 






















X 


X 




X 


X 




MN562-SD- 
BCD 


Analogic 








1.8 


700 














^ 


X 




X 


X 




MN563-SD- 
BCD 


Analogic 






12-4 Digit BCD 
1/2 


20* 


500 


X 


X 










X 


X 




X 




X 


BACg377-4D 


Hybrid Sys 

(2745,2745) 




13 1 


0.1 


980 








X 






X 






X 






2615-12 


DDC 








1.6 


1100 








X 






X 






X 






SOAC-12 


DDC 






2 


0.1 


980 








X 






X 






X 






2615-11 


DDC 








1.6 


1100 








X 






X 






X 






SDAC-11 


DDC 






4 


0.1 


980 








X 






X 






X 






2615-10 


DDC 




20 




1.6 


1100 








X 






X 






X 






SDAC-10 


DDC 






13 (3 Device Set) 
1 


1.8 


3475 










X 




X 






X 






DDAC-12 


DDC 






2 


1.8 


3475 










X 




X 






X 






DDAC-11 


DDC 






4 


1.8 


3475 










X 




X 






X 






DDAC-10 


DDC 






14 1/2 






X 


X 










X 


X 






X 




DAC9331-14 


Hybrid Sys 








2 


30* 


X 


X 










X 


X 






X 




HS3140B-4 


t Hybrid Sys 


(2746) 










X 


X 










X 


X 






X 




HS3140C-4 


Hybrid Sys 


(2746) 






3 


30 


X 


X 










X 


X 






X 




DAC331B-14 t Hybrid Sys 










X 


X 










X 


X 






X 




DAC331C-14 


Hybrid Sys 






1 


0.5 


0.05 


X 


X 










X 


X 






X 




BAC-HA14BC 


Ditil 


(2621) 


30 








X 


X 










X 


X 






X 




DAC-HA14BMtDital 


(262D) 








30 


X 


X 










X 


X 






X 




DAC- 
HA14BC-1 


Datel 












X 


X 










X 


X 






X 




DAC- 

HA14BM-1 


Datel 








2 


30* 


X 


X 










X 


X 






X 


X 


MP3140B-4 t Micro Pwr 


(2749) 










X 


X 










X 


X 






X 


X 


MP3140C-4 


Micro Pwr 


(2740) 








375* 


X 


X 


X 








X 


X 






X 




HS3140B-3 


Hybrid Sys 


(2746) 










X 


X 


X 








X 


X 






X 




HS3140C-3 


Hybrid Sys 


(2746) 






2* 


20* 


X 


X 










X 


X 






X 




MP7614 


Micro Pwr 

(401.2749) 




2 


2 


30* 


X 


X 










X 


X 






X 


X 


MP3140B-3 


t Micro Pwr 


(2749) 










X 


X 










X 


X 






X 


X 


MP3140C-3 


Micro Pwr 


(2749) 


40 




20 


900 


X 












X 








X 




DAC-U12-1 


tDDC 






4 


20 


900 


X 


X 










X 








X 




DAC-U11-1 


tDDC 







CD 

•4—" 

to 



t Military Temperature Range (-55° to 125°C) 

2460 



* Typical Value 

Bold fice iRdicitos iddllionil data Is provided on ths paga noted. 



®IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling Power 
Ity Time Dis. 
Bits Error ±'/!LSB mW 
Res. ±LSB liS (max.) 


Bin. 
Input 


Oft. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
Input 


CTC or 

2's 
Compl. 
Input 


Sign. 
Magn. 
Input 


HL 

Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ret. 


Mult. 


Latches 


Device 


Source 




Line 


D/A Converters 


(Cont'd) 




16 1/2 2* 60 


X 


X 










X 


X 






X 




DAC370B-16 t Hybrid Sys 






X 


X 










X 


X 






X 




DAC370C-16 


Hybrid Sys 








X 


X 










X 


X 






X 




DACg33M6- 

6 Hybrid Sys 


(2745) 






X 


X 










X 


X 






X 




MP9331-6 


Micro Pwr 






5 - 






X 


X 


X 










X 


X 


X 


PCM50K 


Burr-Brown 






5* 50* 


X 


X 










X 


X 






X 


X 


AD7546B 


AD 


(3166) 






X 


X 










X 


X 






X 


X 


AD7546K 


AD 


(3166) 




20 * 500 


X 


X 










X 


X 




X 




X 


DACg377-16 
6 


Hybrid Sys 


(2745) 






X 


X 










X 


X 




X 




X 


MP9377-16 


Micro Pwr 

(401.2749) 




35 420 


X 












X 


X 




X 






MN3310 


Micro Net 




10 


50 - 


























DAC736 


Burr-Browr 
































DAC74 


Burr-Browr 






500 






X 


X 






X 


X 




X 




X 


DAC73 


^ Burr-Brown 












X 


X 






X 


X 




X 




X 


0AC73C 


Burr-Brown 






1 1 465 


X 


X 






X 




X 


X 










HIDAC16B 


Hsrrls 


(2722) 




2* 60 


X 


X 










X 


X 






X 




DACg33M6 
5 


Hybrid Sys 


(2745) 






X 


X 










X 


X 






X 




MP9331-5 


Micro Pwr 






5* 50* 


X 


X 










X 


X 






X 


X 


AD7546A 


AD 


(3166) 






X 


X 










X 


X 






X 


X 


AD7546J 


AD 


(3166) 




2 1 — 


























DAC-71-C0B- 
1 


Datel 




20 




























DAC-71-CSB- 
1 


Datel 












X 








X 






X 






DAC-72C- 
COB-I 


Datel 












X 








X 






X 






DAC-72C- 
CSB-I 


Datel 






465 


X 


X 






X 




X 


X 










HIDAC16C 


Harris 


(2722) 




1225 








X 






X 






X 






A0DAC71- 
COB-I 


AD 


(3166) 










X 








X 






X 






ADDAC71- 
CSB-I 


AD 


(3166) 












X 






X 






X 






ADDAC72- 
COB-I 


AD 


(3166) 










X 








X 






X 






ADDAC72- 
CSB-I 


AD 


(3166) 




2 30 


X 


X 










X 


X 






X 




HS3160B-4 


t Hybrid Sys 


(2746) 






X 


X 










X 


X 






X 




HS3160C-4 


Hybrid Sys 


(2746) 


30 


2 * 60 














X 


X 






X 




DAC933M6- 
4 


Hybrid Sys 


(2745) 


























X 




MP9331-4 


Micro Pwr 






5 






X 








X 






X 






DAC-71-C0B- 
V 


Datel 












X 








X 






X 






DAC-71-CSB- 
V 


Datel 












X 








X 






X 






DAC-72C- 
COB-V 


Datel 












X 








X 






X 






DAC-72C- 
CSB-V 


Datel 






1225 








X 






X 






X 






ADDAC71- 
COB-V 


AD 


(3166) 










X 








X 






X 






ADDAC71- 
CSB-V 


AD 


(3166) 












X 






X 






X 






ADDAC72- 
COB-V 


AD 


(3166) 










X 








X 






X 






ADDAC72- 
CSB-V 


AD (3166) 

(Continued) 


40 



Bin.— Binary 
Off.-Offset 

•^IC MASTER 1983 



Magn.— Magnitude 



Compl.— Complementary 



Int Ref.— Internal Reference 



GTC-Compl. 2's Compl. 
Mult.— Multiplying 

2461 



IC MASTER 



INTERFACE-Digital to Analog Converters (Cont'd) 



Linear- Settling 
Ity Time 
Bits Error ±'ALSB 
Res. ±LSB fiS 


Power 
DIs. 
mW 
(max.) 


Bin. 
Input 


Off. 
Bin. 
Input 


Compl. 
Bin. 
Input 


Compl. 
Off. 
Bin. 
Input 


CTCor 

2's 
Compl. 
Input 


Sljn. 
Magn. 
Input 


HL 
Logic 


CMOS 
Logic 


ECL 
Logic 


Int. 
Ref. 


Mult. 


Latches 


Device Source 


Line 


D/A Converters 


(Cont'd) 




16 2 

10 


500 








X 






X 






X 






DAC71/C0B t Burr-Brown 












X 








X 






X 






DACTl/ubB t Burr-Brown 










X 










X 






X 






DAC72/C0B t Burr-Brown 












X 








X 






X 






DAC72/CSB t Burr-Brown 




35 


1170 






X 


X 






X 






X 






DAC- 

HP16BI^C Datel 












X 


X 






X 






X 






DAO- 

HP16BMC-1 Datel 












X 


X 






X 






X 






DAC- 

HP16BMM tDitll (2620) 












X 


X 






X 






X 






DAC- 

HP16BMIVI-1 t Datel 




50/100 * 


575* 






X 








X 






X 






DAC70/CSB t Burr-Brown 












X 








X 






X 






DAC70C/CSB Burr-Brown 


10 


3 50/100 * 


575* 








X 






X 






X 






DAC70/C0B t Burr-Brown 














X 






X 






X 






DAC70C/C0B 

Burr-Brown 




4 2 


— 


X 


X 










X 


X 






X 




MP7616L Micro Pwr 

(401.2749) 




8 2 


— 


X 


X 










X 


X 






X 




MP7616K Micro Pwr 

(401,2749) 






30 


X 


X 










X 


X 






X 




HS3160B-3 t Hybrid Sys (2746) 








X 


X 










X 


X 






X 




HS3160C-3 Hybrid Sys (2746) 




16-4 Digit BCD 

1/2 15 


1170 














X 






X 






DAC- 

HP16DGC Datel 




















X 






X 






DAC- 

WPmm Datel 




















X 






X 






DAC- 

HP16DMM t Datel 




35 


420 














X 


X 




X 






MN3300 Micro Net 


20 


50/100 * 


575* 














X 






X 






DAC70/CCD t Burr-Brown 




















X 






X 






DAC70C/CCD 

Burr-Brown 




2 1 









X 








X 






X 






DAC-71-CCD- 

i Datel 












X 








X 






X 






CCD-i Datel 




C 










X 








X 






X 






UAl/-/ l-liUU- 

V Datel 












X 








X 






X 






nAr* Tor* 

CCD-V Datel 




10 


1,2 














X 






X 






DAC71/CCD t Burr-Brown 




18 1 20 


60 


X 


X 










X 


X 




X 




X 


DAC370B-18 t Hybrid Sys 








X 


X 










X 


X 




X 




X 


DAC370C-18 Hybrid Sys 








X 












)( 






)( 




x 


MP370B-18 t Micro Pwr 

(401.2749) 


30 






X 


X 










X 


X 




X 




X 


MP370C-18 Micro Pwr 

(401,2749) 






500 


X 


X 










X 


X 




X 






DAC377-18 Hybrid Sys (2745) 








X 


X 










X 


X 




X 




X 


DAC377B-18 t Hybrid Sys (2745) 








X 


X 










X 


X 




X 




X 


DAC377C-18 Hybrid Sys (2745) 








X 


X 










X 


X 




X 




X 


MP377B-18 tMicroPwr (401) 








X 


X 










X 


X 




X 




X 


MP377C-18 Micro Pwr (401) 





to 



t Military Temperature Range (-55° to 125°C) 

2462 



* Typical Value 

Bold fics Indlcitss idditionil dita is provided on the pigs notad. 



®IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Display Drivers 



Device 



Source 



Function Device 


Source 




BCD to 7-Segment Decoder/Driver, Active High, Resistive 


Pull-Up 


(Cont'd) 


9307C 


Fairchlld 




9307M 


t Fairchlld 




HD74LS248 


Hitachi 




HD74LS48 


Hitachi 




IVIC5448 


t Motorola 




MC7448 


Motorola 




MC8307 


Motorola 




MC9307 


t Motorola 




SN54LS248 


t Motorola 




SN54LS48 


t Motorola 




SN74LS248 


Motorola 




SN74LS48 


Motorola 




DM5448 


t National 




DM54LS248 


t National 




DM54LS48 


t National 




DM7448 


National 




DM74LS248 


National 




DM74LS48 


National 




DS8856 


National 




N8T05 


Signetics 




S8T05 


t Signetics 




SN54248 


tTI 


(ai4) 


SN5448 


tTI 


(847) 


SN54LS248 


tTI 


(914) 


SN54LS48 


tTI 


(847) 


SN74Z48 


Tl 


(914) 


SN7448 


Tl 


(847) 


SN74LS248 


Tl 




SN74LS48 


Tl 


(041) 


BCD to 7-Segment Decoder/Driver, Active Low, Open 




Collector 54LS347 


t Fairchlld 




74LS347 


Fairchlld 




74LS447 


Fairchlld 




MC4039 


Motorola 




S8T04 


t Signetics 




SN54LS347 


tTI 


(931) 


SN54LS447 


tTI 


(950) 


SN74LS347 


Tl 


(931) 


SN74LS447 


Tl 


(950) 


BCD to 7-S8gment Decoder/Driver, Active Low, Open 




Collector, 15 V Output 






5447 


t Fairchlld 




54LS247 


t Fairchlld 




7447 


Fairchlld 




74LS247 


Fairchild 




74LS47 


Fairchlld 




9317BC 


Fairchild 




9317BM 


t Fairchild 




HD7447A 


Hitachi 




HD74LS247 


Hitachi 




HD74LS47 


Hitachi 




MC5447 


t Motorola 




MC7447 


Motorola 




SN54LS247 


t Motorola 




SN54LS47 


t Motorola 




SN74LS247 


Motorola 




SN74LS47 


Motorola 




DM5447A 


t National 




DM54LS247 


t National 




DM54LS47 


t National 




DM7447A 


National 




DM74LS247 


National 




DM74LS47 


National 




383A/C 


Teledyne S 




383B/M 


t Teledyne S 




SN54247 


tTI 


(913) 


SN5447A 


tTI 


(847) 


SN54LS247 


tTI 


(913) 


SN54LS247A 


tTI 


(913) 


SN54LS47 


tTI 


(847) 


SN74247 


Tl 


(913) 




(Continued) 



Display Drivers 



Bargraph Fluorescent 

XR2276 



Exir 



(3204) 



Bargraph Gas Discharge Display Driver (module) 



AW100 


AWI 


Bargraph Gas Discharge (module) 






AWI 


Bargraph LED LM3914 


National 


LM3915 


National 


AN6875 


Panasonic 


LB 1405 


Sanyo 


LB 1409 


Sanyo 


LB1415 


Sanyo 


LB1416 


Sanyo 


LB1419 


Sanyo 


LB 1426 


Sanyo 


LB 1436 


Sanyo 


UAA170 


Siemens 


UAA180 


Siemens 


TDA1594 


Signetics 


U237B 


Telefunken 


U244 


Telefunken 


U247B 


Telefunken 


U254 


Telefunken 


U257B 


Telefunken 


U267B 


Telefunken 


TSC9403 


Toshiba 


TSC94G4 


Toshiba 


Bargraph LED or Vacuum Fluorescent (module) 


AW580 


AWI 


Bargraph or LED Dot Display Generators 


XH2277 


Exar (3204) 


XR2278 


Exar (3204) 


XR2279 


Exar (3205) 


Bargraph VF HA12010 


Hitachi 


HA12011 


Hitachi 


LM3916 


National 


LB1470 


Sanyo 



Clock Driver, Dual 

DS3671 



National 



Display Controllers and Keyboard Interface: See 
Microprocessors-General Purpose 



Lamp Driver 



CSR301 



Teledyne 



LCD Display Interface (drives 7 
displays) SAA1062 



to 20-segment linear 
Signetics 



LCD Dot Matrix Driver 



SED1100 


Epson 


SED1300 


Epson 


HLCD0488 


Hughes 


HLCD0515 


Hughes 


HLCD0538A 


Hughes 


HLCD0539A 


Hughes 


HLCD0540 


Hughes 


HLCD0548 


Hughes 


HLCD0550 


Hughes 


HLCD0551 


Hughes 


HLCD0607 


Hughes 



LCD Graphics Driver 




SED1500 


Epson 


LED Bar Display Driver, 10 LEDs 




TA7612A 


Toshiba 


LED, Cascadable 




SDA2014 


Siemens 


LED Display Driver, 5 LEDs 




TA7654 


Toshiba 


TA7655 


Toshiba 



LED Display Driver, 33 Outputs, 15 mA Sink Capability 
MM5486 National 



LED Display/Interface (drives 7, 14, 16-segments for linear 
displays, bar graphs) 

SAA1060 Signetics 
SAA1061 Signetics 



LED Driver System, 8 Decade, 8x8 Memory, Decoder 
(versions either hardwire or processor controlled 
1CM7218A Intersil 
ICM7218B Intersil 
ICM7218C Intersil 
ICM7218D Intersil 
ICM7218E Intersil 



LED, Static 



U180M 
U3080M 



Telefunken 
Telefunken 



Multiplexed LCD Driver, Master and Slave 

MC145000 Motorola 
MC145001 Motorola 
MM58201 National 



Segment Driver for Gas Discharge Displays 

DI232 Dionics 
01242 Dionics 



Universal (LED, LCD, or vacuum fluorescent) 
S2809 AMI 



BCD (hexadecimal) to 7-Segment Decoder/Driver with 
Latch Active Low, Open Collector 

9370C Fairchild 



BCD (hexadecimal) to 7-Segment Latch/Decoder/Driver 
(CMOS with bipolar output) 

MC14495 Motorola 
UCN-4805A Sprague 
UCN-4806A Sprague 



BCD (hexadecimal) to 7-Segment LED Decoder/Driver, 
Constant Current, with Latch 

9368C Fairchild 



BCD Plus 1 to 7-Segment 



40 



50 



LM1017 


National 




U143 


Telefunken 




BCD to 7-Segment Decoder/Driver 






MC14547BA 


t Motorola 




MC14547BC 


Motorola 




BCD to 7-Segment Decoder/Driver, Active High, Open 




Collector 5449 


t Fairchild 




54LS249 


t Fairchild 




74LS249 


Fairchild 




74LS49 


Fairchild 




HD74LS249 


Hitachi 




HD74LS49 


Hitachi 




MC5449 


t Motorola 




MC7449 


Motorola 




SN54LS249 


Motorola 




SN54LS49 


t Motorola 




SN74LS249 


t Motorola 




SN74LS49 


Motorola 




DM54LS249 


t National 




DM54LS49 


t National 




DM74LS249 


National 




DI\/I74LS49 


National 




N8T06 


Signetics 




SK54249 


tTI 


(914) 


SN5449 


tTI 


(847) 


SN54LS249 


tTI 


(914) 


SN54LS49 


tTI 


(847) 


SN7424g 


Tl 


(914) 


SN744g 


Tl 


(847) 


SN74LS249 


Tl 


(914) 


SN74LS49 


Tl 


(847) 


BCD to 7-Segment Decoder/Driver, Active High, Resistive 


Pull-Up 5448 


t Fairchild 




54LS48 


t Fairchild 




7448 


Fairchild 




74LS248 


Fairchild 





74LS48 



Fairchild 

(Continued) 



60 



80 



90 



100 



110 



120 



130 



CD 
•+— > 
CO 
CC 



140 



150 



160 



170 



t Military Temperature Range (-55° to 125°G) 



IC MASTER 1983 



* Typical Value 

Bold face Indicates additional data Is provided on the page noted. 



2463 



IC MASTER 



INTERFACE-Display Drivers (Cont'd) 



Display Drivers 


(Cont'd) 


BCD to 7-Segnient Decoder/Driver, Active Low, Open 




Collector, 15 V Output 








(Cont'd) 


SN7447A 


Tl 


(847) 


SN74L47 


Tl 




SN74LS247 


Tl 


(913) 


SN74LS47 


Tl 


(847) 


BCD to 7-Segment Decoder/Driver, Active Low, Open 




Collector, 30 V Output 






5446 


t Fairchild 




7446 


Fairchlld 




9317CC 


Fairchild 




9317CM 


t Fairchild 




HD7446A 


Hitachi 




MC5446 


t Motorola 




MC7446 


Motorola 




DM5446A 


t National 




DiVI7446A 


National 




SN54246 


tTI 


(913) 


SN5446A 


tTI 


(847) 


SN74246 


Tl 


(913) 


SN7446A 


Tl 


(847) 


BCD to 7-Segment Decoder/Driver, for Fluorescent 




Displays CS250 


Cherry 




CS250-1 


Cherry 




BCD to 7-Segment Decoder/Driver, for Liquid Crystal 




Displays CD4055B 


fRCA 


(748) 


CD4055BE 


RCA 


(748) 


TC4055B 


Toshiba 




BCD to 7-Segment Decoder/Driver, 2-Digit, Direct Driver 


for Common Anode LED Displays 






DS8669 


National 




BCD to 7-Segment Latch/Decoder/Driver 




CS260 


Cherry 




BCD to 7-Segment Latch/Decoder/Driver (CIVIOS with 




bipolar output) 






F4511BC 


Fairchild 




F4511BM 


t Fairchild 




HD14511B 


Hitachi 




MC14511BA 


t Motorola 




MC14511BC 


Motorola 




MC14513BA 


t Motorola 




MC14513BC 


Motorola 




CD4511BC 


National 




CD4511BM 


t National 




CD4511B 


tRCA 


(749) 


CD4511BE 


RCA 


(749) 


883/45118 


tsss 




SCL4511B 


sss 




CM4511B 


t Solitron 




CM4511BE 


Soiitron 




BCD to 7-Segment Latch/Decoder/Driver for Common 


Cathode LED Displays 






NE589 


Signetics 




BCD to 7-Segment Latch/Decoder/Driver, for Liquid 




Crystal Displays 






CD4543BD 


tRCA 


(749) 


CD4543BE 


RCA 


(749) 


BCD to 7-Segment Latch/Decoder/Driver, Output 1-16 


SAB3211 


Siemens 




BCD to 7-Segment Latch/Decoder/Driver (ripple blanking) 


IVIC14544BA 


t Motorola 




MC14544BC 


Motorola 




BCD to 7-Segment Latch/Decoder/Driver (strobed latch). 


for Liquid Crystal Displays 






LS7100 


LSI Camp 


(696) 


MC14543BA 


t Motorola 




MC14543BC 


Motorola 




CD4056B 


tRCA 


(748) 


CD4056BE 


RCA 


(748) 




(Continued) 



Device 



Source 



20 



30 



40 



BCD to 7-Segment Latch/Decoder/Driver (strobed latch), 
for Liquid Crystal Displays 

(Cont'd) 

883/4543B t SSS 

SCL4543B SSS 
TC4056B Toshiba 



BCD to 7-Segment LED Decoder/Driver 

CA3168 RCA 



BCD to 7-Segment LED Decoder/Driver, Constant Current 
DS8857 National 
NE587 Signetics 



BCD to 7-Segment LED Decoder/Driver with Latch, Output 
0-9,-,E,H,L,P 

9374C Fairchild 



BCD to 7-Segment LED Driver Adjustable Current 
DS8858 National 



BCD to 7-Segment LED Latch/Decoder/Driver, with Ripple 
Blanking F4734BC Fairchild 
F4734BM f Fairchild 



BCD-to-Declmal Decoder/Driver (for lamps) 

380A/C Teledyne S 

380B/M t Teledyne S 

381A/C Teledyne S 

381B/M t Teledyne S 



BCD-to-Decimal Decoder/Driver (nixie driver) 

7441 Fairchild 
DM5441A t National 

DM7441A National 
382A/C Teledyne S 

382B/M t Teledyne S 



BCD-to-Decimal Decoder/Driver with Blanking (for cold 
cathode Indicator tubes) 
54141 
74141 
HD74141 
MC54141 
MC74141 
DM54141 
DM74141 
SN74141 



t Fairchild 
Fairchild 
Hitachi 

t Motorola 
Motorola 

t National 
National 
Tl 



(881) 



Quad AC Plasma Display Axis Driver 

SN55426B fTI 

SN55427B t Tl 

SN75426 Tl 

SN75427 Tl 



Hex TTL to LED Bulb Driver, with Latch 

DS885g National 
DS8869 National 



2-Digit, 7-Segment Decoder/Driver Interfaces to CPU 
MN1205E - Panasonic 

MN1205P Panasonic 
MN1205Q Panasonic 



3 1/2-Digit Liquid Crystal Clock 
C1200 



LSI Comp 



4/5-Digit Fluorescent Display Driver 

MM5474 National 

MM5476 National 

MM5477 National 

MM5478 National 



4/5-Digit (serial data input) 
MM5450 
MM54S1 



Nitlonal 
National 



(735) 
(735) 



4/5-Digit Vacuum Fluorescent 
MM5445 
MM5446 
MM5447 
MM5448 
SAA1063 



National (735) 

National (735) 

National (735) 

National (735) 

Signetics 



4x5 Matrix LED Decoder/Driver, Interface to CPU 
MN1205F Panasonic 



70 



80 



90 



4x8 Matrix LED Decoder/Driver, Interface to MPU 
MN1205A Panasonic 



4-Channel Incandescent Lamp Driver 

CLD4 Teledyne C 



4-Channel Plasma 

XR2284 



Exar 



(3203) 



4-Character, 18-Segment Triplexed LCD Decoder/Driver 
ICM7233 Intersil 



4-Digit Fluorescent 

ICM7235 Intersil 

ICM7235A Intersil 

ICM7235AM Intersil 

ICM7235M Intersil 



4-Digit Gas Discharge Display Anode Driver 

DI500 Dionics 
DI502 Dionics 



4-Digit LCD Decoder/Driver 
SCL7211 



SSS 



4-Digit LCD Driver 

ICM7211AM Intersil 
ICM7211M Intersil 



4-Digit LED Driver 

SDA2004 



Siemens 



4-Digit LED Driver, Multiplexed BCD or Binary to 7- 
Segment Decoder/Driver 

ICM7212 Intersil 
ICM7212A Intersil 



4-Digit LED Driver, BCD or Binary to 7-Segment Decoder/ 
Driver, Data and Digit Select Code Latches for ftP 
Interface ICM7212AM Intersil 
ICM7212M Intersil 
UDN-7183 Sprague (2843) 

UDN-7184 Spragns (2843) 

UDN-7186 Spragne (2843) 

UHP-482 Spragut (2843) 



4-Digit Liquid Crystal, Multiplexed BCD to LCD Decoder/ 
Driver, AC Drive 

ICM7211 Intersil 
ICM7211A Intersil 
DF412 Siliconix 
SCL25411 SSS 



4-Digit/Segment Fluorescent 

DI503 Dionics 
DI504 Dionics 



4-Digit (stores segment and address data, drives 7-8 
segment digits) 

MM74C911 National (735) 



4-Diglt, 17-Segment Alpha-Numeric with Memory, Decoder 
and LED Drivers 

MM74Cg56 National 
NSM4307 National 
NSM4507 National 



4-Digit, 7-Segment LCD Decoder/Driver 

TSC7211A Teledyne S (2852) 



4-Digit, 7-Segment LED Decoder/Driver 

TSC700A Teledyne S (2846) 

TSC8212A Teledyne S 



4-Digit/8-Segment Fluorescent 
C0P470 



National 



4-Segment Liquid Crystal 
CD40S4B 
TC4054B 



RCA 

Toshiba 



(748) 



4-Segment MOS to LED Anode Driver 
75491 
MC75491 
DS55493 
DS75491 
DS75493 
SN75491 



Fairchild 
Motorola 
t National 
National 
National 
Tl 

(Continued) 



100 



110 



120 



130 



140 



t Military Temperature Range ( - 55° to 125°C) 



2464 



* Typical Value 

Bold face Indicates additional dale is provided on the page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Dispiay Drivers (Cont'd) 



Display Drivers 


(Cont'd) 


4-Segment MOS to LED Anode Driver 










(Cont'd) 


SN75491A 


Tl 




SN75493 


Tl 




5x7 Dot Matrix LCD/Console Controller 




CY300 


Cybernetic 


5x8 Dot Matrix Multiplexed LCD. On-board memory allows 


ASCII code and special symbols display without refresh 


circuitry. (2-chip set) 






PE7901 


Polycore 




PE7902 


Polycore 




5x12 Dot Matrix (up to 80 characters by cascading) 


10938 


Rockwell 




10939 


Rockwell 




5-Character, 18-SegmentTriplexed LCD Decoder/Driver 


ICM7234 


Intersil 




5-Digit Fluorescent 






MSM58291G 


OKI 




5-Digit Gas Discharge Display Anode Driver 




UHD-490 


t Sprague 




UHP-4gO 


Sprague 


(2843) 


5-Digit LCD Driver, Serial Input, Decoder 




MSM5829G 


OKI 




5-Line Plasma Display Axis Driver 






DI5140 


Dionlcs 




DI5180 


Dionics 




DI5240 


Dionlcs 




DI5280 


Dionics 




5-Segment Gas Discharge Display Cathode Driver 




UHP-480 


Spragus 


(2843) 


5-Segment MOS to LED Anode Driver 






DS8861 


National 




5-Step Logarithmic Dual LED Driver 






TA7666 


Toshiba 




TA7667 


Toshiba 




6-Digit Gas Discharge Display Anode Driver 




DI5Q5 


Dionics 




DI507 


Dionics 




DI603A 


Dionics 




DI604A 


Dionics 




DI605A 


Dionics 




DS8891 


National 




8891 


Signetics 




UDN-6164 


Spragus 


(2843) 


UHD-491 


t Sprague 




UHP-491 


Sprague 


(2843) 


UHP-4g5 


Sprague 


(2843) 


SN75481 


Tl 




6-Digit LED Driver (low voltage) 






DS8646 


National 




6-Digit MOS to LED Cathode Driver 






55492A 


t Fairchild 




75492 


Fairchild 




75492A 


Fairchild 




MC75492 


Motorola 




DS75492 


National 




DS75494 


National 




DS8870 


National 




DS8877 


National 




PS55494 


t National 




NE582-1 


Signetics 




SN75492 


Tl 




SN75492A 


Tl 




SN75494 


Tl 




6-Digit/Segment Fluorescent 






DI508 


Dionics 




DI509 


Dionics 




UDN-6116 


Sprague 


(2843) 


UDN-6126 


Sprague 


(2843) 



6-Digit BCD (stores segment and address data, drives 7-8 


segment digits) 






MM74C912 


National 


(735) 


6-Digit Hex (stores segment and address data, drives 7 


segments) MM74C917 


National 


(735) 


6-Digit, 7-Segment LCD Driver with Decimal Points, or 


Three 16-Segment Characters. 48-Stage Shift Register, 


48-Bit Data Latch and 48-Segment Driver 




MSM5219 


OKI 


(3873) 


7-Digit Gas Discharge Display Anode Driver 




MC3490 


Motorola 




MC3494 


Motorola 




7-Digit MOS to Gas Discharge 






XR2272 


Exar 




7-Digit MOS to LED Cathode Driver 






SN75497 


Tl 




7-Digit/Segment MOS to Fluorescent 






XR2271 


Exar 




7-Line Dot Matrix or Segmented 






SN75581 


Tl 


(2863) 


7-Segment Gas Discharge Display Cathode Driver 




DS8885 


National 




8885 


Signetics 




UHP-481 


Sprague 


(2843) 


SN75584 


Tl 




7-Segment Gas Discharge Display Cathode Driver, with 


BCD Decoder DS7880 


t National 




DS8880 


National 




DS8884A 


National 




DS8980 


National 




DS8880 


Signetics 




SN75480 


Tl 




7-Segment to BCD Converter/Driver 






MM54C915 


t National 




MM74C915 


National 




8-Bit Parallel In/Parallel Out Fluorescent (for mP systems) 


UCN-4815A 


Sprague 


(2843) 


UCS-4815H 


t Sprague 




8-Channel Plasma 






XR2288 


Exar 


(3203) 


8-Digit Gas Discharge Display Anode Driver 




DI510 


Dionics 




DI512 


Dionics 




DI803A 


Dionics 




DI804A 


Dionics 




DI805A 


Dionlcs 




DS8887 


National 




DS8897 


National 




UDN-6184 


Sprague 


(2843) 


8-Digit MOS to LED Cathode Driver 






DS8863 


National 




DS8871 


National 




DS8963 


National 




8-Digit/Segment Fluorescent 






DI513 


Dionics 




DI514 


Dionics 




DI514A 


Dionics 




XR6118 


Exar 


(3205) 


XR6128 


Exar 


(3205) 


NE594 


Signetics 




SA594 


Signetics 




SG6118 


Silicon G 




UDN-6118 


Sprague 


(2843) 


UDN-6128 


Sprague 


(2843) 


UDN-6138 


Sprague 


(2843) 


UDN-6148 


Sprague 


(2843) 


8-Digit, 7-Segment Triplexed LCD Decoder/Driver 




ICM7231 


Intersil 





8-Line Fluorescent Driver 






MSL912R 


OKI 


(3873) 


MSL915R 


OKI 


(3873) 


MSL916R 


OKI 




MSL917R 


OKI 


(3873) 


8-Output Digit-Scan Counter/Decoder for Cold-Cathode 


Counter Tubes 






MSL9510R 


OKI 


(3873) 


MSLgSIIR 


OKI 


(3873) 


8-Segment Gas Discharge Display Cathode Driver 




DI210 


Dionics 




DI2210 


Dionics 




DI230 


Dionics 




DI240 


Dionlcs 




DI300 


Dionics 




DI302 


Dionics 




MC3491 


Motorola 




MC3492 


Motorola 




DS7889 


t National 




DS888g 


National 




UDN-7180 


Sprague 


(2843) 


8-Segment MOS to LED Anode Driver 






MC676 


Motorola 




DS8867 


National 




9-Dlgit MOS to LED Cathode Driver 






DS8872 


National 




DS8920 


National 




DS8973 


National 




DS8975 


National 




SN75498 


Tl 




9-Digit MOS to LED Cathode Driver, with Low Battery 


Indicator DS8864 


National 




DS8873 


National 




9-Digit MOS to LED Cathode Driver with Shift Register 


Decoding DS8874 


National 




9-Line, 30 LED U1096B 


Telefunken 




9-Segment LED Driver (low voltage) 






DS8647 


National 




DS8648 


National 




10-Bit High-Voltage, High-Current 






S4534 


AMI 


(2611) 


10-Bit Serial In/Parallel Out Fluorescent (for mP systems) 


UCN-4aiOA 


Sprague 


(2843) 


ULN-4810H 


t Sprague 




UCN4810A 


Tl 




10-Digit, 7-Segment Triplexed LCD Decoder/Driver 




ICM7232 


Intersil 




11-Segment LED Display Drivers 






MM5485 


National 




12-Line Vacuum Fluorescent 






SN75512A 


Tl 




SN75513A 


Tl 


(2861) 


14-Digit Decoder/Driver 






DS8665 


National 




DS8666 


National 




14-Digit Decoder/Driver, with Low Battery Indicator 




DS7664 


t National 




DS8664 


National 




14-Segment Decoder/Driver, Interface to CPU 




MN1205H 


Panasonic 




16-Line Fluorescent 






DS8881 


National 




8881 


Signetics 




16-Segment LED Display Drivers 






MM5484 


National 




18-Segment Alphanumeric 






AC5947 


Tl 




18-Segment, 16-Character Alphanumeric (30, 35 and 40 


volt versions) 10937 


Rockwell 





30 



40 



80 



90 



100 



110 



(D 

c 
o 

o 
o 

Q) 
CO 

v_ 

(D 

-4— > 

CO 



120 



130 



140 



t Military Temperature Range (-55° to 125°C) 



IC MASTER 1983 



* Typical Value 

Bold face indicales additional data is provided on the page noted. 



2465 



Authorized IC Master 
International Distributors 



ARGENTINA, COLOMBIA, 
ECUADOR, VENEZUELA, 
MEXICO, PERU 

Intectra 

2629 Terminal Blvd. 
Mt. View, CA 94043 
Tel. (415) 967-8818 



AUSTRALIA 

A J Distributors Pty Ltd. 
P.O. Box 71 

Prospect, S. Australia 5082 
Tel. 269-1244 
Telex (790) 82635 



AUSTRIA 

LBG GmbH 
Tichtelgasse 10/2/12 
A-1120 Vienna, Austria 
Tel. (0222) 83 41 01 
Telex (847) 134106 



BELGIUM 

J. P. Le Maire 
Rampe Gaulouise la 
1020 Bruxelles, Belgium 
Tel. 02 478 4847 
Telex (846) 24610 



BRAZIL 

Filcres Importacao 
Rua Auroraigs 
CEP 01209 
Caixa Postal 18767 
Sao Paulo, Brazil 
Tel. (Oil) 223 7388 
Telex 113298 



CYPRUS 

MOR Electronics Ltd. 

P.O. Box 4155 

Ramat Gan 52141, Israel 



DENMARK 

Advanced Electronik 

55, Mariendalsvej 

DK2000, Copenhagen F, Denmark 

Tel. 01 194433 

Telex (855) 22431 



ENGLAND 

Paterson/Steadman & Partner 
4 Gold Street 

Saffron Walden, Essex CB10 lEP 
England 
Tel. 27067 
Telex 81653 



J. B. Tratsart Ltd. 
Dogmersfieid Nr. Baskingstoke 
Hampshire RG27 8SU, England 
Tel. 02514 3334 
Telex (851) 8814136 



FRANCE 

Conseilet Promotion 
1 Rue Damiens 
92100 Boulogne, France 
Tel. 621-30-77 
Telex 250030F 

OFFILIB 

48 Rue Gay-Lussac 

75240 Paris, Cedex 05, France 

Tel. 329-2132 

Telex: None 



HOLLAND 

Manudax-Nederland B. V. 
54732G Heeswijk (N.B.) 
Meerstraat 7, Holland PB25 
Tel. 04139 2901 
Telex (844) 50175 



HONG KONG 

Conmos Products, Ltd. 
Haynein BIdg., 11th Floor 
1 Tai Yip Street 
Keun Tong, Kowloon 
Tel. 3-684572 
Telex 85448 



INDIA, MALAYSIA, 
SINGAPORE, THAILAND 

Radio & Craft Publications 
4794/23 Bharat Ram Road 
Daryanganj, New Delhi 2, India 
Tel. 277147 
Telex: None 



ISRAEL 

STG International Ltd. 
10 Huberman Street 
P.O. Box 1276 
61012 Tel-Aviv, Israel 
Tel. 248231 
Telex 342229 



ITALY 

Gruppo Editoriale Jackson 

Technoclub 

Direzione Redacione e 

Amministrazione 

Via Rosellini 12 

20124 Milano, Italy 

Tel. 688-0951 



JAPAN 

Asahi Glass Company, Ltd. 
Electronic Components Group 
1-2 Marunouchi 2-chome 
Chiyoda-ku, Tokyo 100, Japan 
Tel. (03) 218-5813 
Telex TK4616 



JAPAN (Continued) 

Overseas Data Service Co., Ltd. 
Shugetsu Building, No. 12-7 
Kita-Aoyama 3-chome 
Minato-ku, Tokyo 107, Japan 
Tel. (03) 400-7090 
Telex (781) J26487 

Tokyo International 
Communications, Inc. 
Miyajima Blvd. 

28 Yoyogi 1-chome, Shibuya-ku 
Tokyo 151, Japan 
Tel. 379-2561 
Telex: 33106 

NORWAY, FINLAND, SWEDEN 

Ingenioerforlaget A/S 
Kronprinsens Gate 17 
Boxs 2476 Solli 
Oslo 2, Norway 
Tel. (02) 11-51-70 
Telex 72400Y 

SOUTH AFRICA 

Suntronika PTY Ltd. 
P.O. Box 46268 Orange Grove 
Johannesburg 2119, South Africa 
Tel. 725-1210 

SPAIN 

Sagitron 
Castello 25, 2, ° 
Madrid 1, Spain 
Tel. 402 6085 
Telex (831) 43819 

SWITZERLAND 

W. Stolz AG 
Taefernstrasse 15 
CH-5404 Baden-Daettwil 
Switzerland 
Tel. 056 840151 
Telex (845) 54070Z 

TAIWAN 

Alfred M. L. Pien 
IBS Publications Ltd. 
P.O. Box 55-879 
Taipei, Taiwan 

TURKEY 

EEMPA Elektronik 
Tersane Cad. Kuthan 38/408 
TR/Kara Koy, Istanbul 
Turkey 

Tel. (11)49-6249 
Telex 24429 

WEST GERMANY 

Astronic GmbH 
Winzererstrasse 47d 
8000 Munich 40 
West Germany 
Tel. (089) 309031 
Telex (841) 5216187 



ABBREVIATIONS 




Action Ins 

AD 

ADT 

Adapt Sci 

Advent 

Alphatron 

AMA 

AMD 

AMI 

Amperex 

Analogic 

Analog Sys 

APC 

Apex 

APM 

AppI Sys 

APT 

Aptek 

Array Tech 

AWI 



Bedford 
Burr-Brown 



CAE 

Cal Devices 

Cent Data 

Cermetek 

CGRS 

Cherry 

CIC 

Citel 

Comlinear 

CMA 

Comark 

Comdial 

Comp Auto 

Compas 

Cont Logic 

Control Sys 

CreMicro 

Cromemco 

CSG 

Cubit 

Curtis 

Cybernetic 

Cybersys 

Cybertek 

Data General 

Data I/O 

Data Trans 

Date! 

Datricon 

DDC 

DEC 

DeIco 

DGM 

Digelec 

Digitek 

Dionics 

Dist Comp 

Divers Tech 



E-HI 
Elind 
EL Instr 
EMM 
Emulogic 
Epson 
ETI Micro 
Exar 



Fairchild 
Ferranti 
Fujitsu A 
Fujitsu 




Action Instruments 
Analog Devices 
Advanced Digital Technology 
Adaptive Science Corp. 
Advent Products, Inc. 
Alphatron 

American Automation 
Advanced Micro Devices 
American Microsystems, inc. 
Amperex Electronic Corp. 
Analogic 
Analog Systems 
Applied Micro Circuits 
Apex Microtechnology 
Applied Microsystems Corp. 
Applied Systems Corp. 
Applied Microtechnology 
Aptek Microsystems 
Array Technology 
Analog West 



Bedford Computer Systems Inc. 
Burr-Brown Research 



Computer Aided Engineering 
California Devices 
Central Data Corp. 
Cermetek 

CGRS Microtech Inc. 
Cherry Semiconductor 
Custom Integrated Circuits 
Citel, Inc. 

Comlinear Corporation 

Custom MOS Arrays 

Comark Corp. 

Comdial Semiconductor 

Computer Automation 

Compas Microsystems 

Control Logic Inc. 

Control Systems Microsystems Div. 

Creative Micro Systems 

Cromemco, Inc. 

Commodore Semiconductor Group 
Cubit Inc. 

Curtis Electro Devices, Inc. 
Cybernetic Micro Systems 
Cybersystems 
Cybertek Inc. 

Data General 

Data I/O 

Data Translation 

Datel-lntersil 

Datricon Corporation 

Data Devices Corporation 

Digital Equipment Corporation 

DeIco Electronics 

Digital Microsystems 

Digelec Corp. 

Digitek, Inc. 

Dionics Inc. 

Distributed Computer Systems 
Diversified Technology 

E-H International, Inc. 
Elind Elettronica Industriale 
E & L Instruments 
EMM 

Emulogic Inc. 
Epson America, Inc. 
ETI Micro 

Exar Integrated Systems 



Fairchild 

Ferranti Electric 

Fujitsu America 

Fujitsu Microelectronics, Inc. 



^^^^^^ ^^^^1^^^^ ^^^^^^^ 1^^ ^ 

MUiilMlgC 



Gl 


General Instrument 


GMS 


General Microsystems 


GTE Micro 


GTE Microcircuits 


Harris 


Harris Semiconductor 


Heurikon 


Heurikon Corp. 


Hilevel 


Hilevel Technology, Inc. 


Hitachi 


Hitachi America, Ltd. 


Holt 


Holt Inc. 


HP 


Hewlett-Packard 


Hughes 


Hughes Aircraft, Solid State 


Products 


Hybrid Sys 


Hybrid Systems 


Hycom 


Hycom Incorporated 


IDT 


Integrated Device Technology 


IMI 


International Microcircuits, Inc. 


IMP 


International 




Microelectronic Products 


IMS 


Industrial Micro-systems Inc. 


Inconix 


Inconix Corporation 


Ind Tech 


Inductive Technology 


Inmos 


Inmos 


IntnirFnpr 

1 II lU 11 tug 


Integrated Circuit Engineering 


1 11 lull O Jd 


Integrated Circuit Systems 


IntCompSys 


Integrated Computer Systems 


IntCyber 


International Cybernetics 


Int Micro 


International Microsystems 


Int Tech 


integrated Technology Corp. 


Intprh/FMI 

III ICUII / 1 1>1I 


Intprh/Fiinrtinn MnHiiIp*; Inp 


Intel 


Intel 


Intprrlpcian 
1 11 LCI U C0I3II 


Intprdp^icrn 


Intprcil 

1 II ICI oil 


IntprQi 1 

1 1 1 LCI 1 1 


Intronics 


Intronics 


IPI 


IntGgrsted Photomstrix Inc. 


ITT 


1 TT ^DmipnnHiiotnrc 
II 1 oclllllrUliUUU lUI 


Kinetic Sys 


Kinetic Systems 


Kontron 


Kontron Electronics 


Lambda 


Lambda Semiconductor 


Laserdyne 


Laserdyne 


LSI Comp 


LSI Computer Systems 


LSI Logic 


LSI Logic Corporation 


Master Logic 


Master Logic Corporation 


Matrix 


Matrix Corp. 


Matrox 


Matrox Electronic Systems 


MCC 


Microcomputer Control 


Micrel 


Micrel 


Micro Eng 


Micro Circuit Engineering 


Micro Innov 


Micro Innovators 


Micropac 


Micropac Industries 


Micro Net 


Micro Networks 


Micro Pwr 


Micro Power Systems 


Micro Sci 


Micro Sciences Corp. 


Micro Tech 


Microcircuits Technology 


Micro-Link 


Micro-Link Corporation 


Micron 


Micron Technology 


MilerTron 


MilerTronics 


Miller 


Miller Technology 


Mitel 


Mitel Semiconductor 


Mitsubishi 


Mitsubishi Electronics 


MMI 


Monolithic Memories, Inc. 


Monosil 


Monosil 


MonSys 


Monolithic Systems Corp. 


Mostek 


Mostek 


Motorola 


Motorola Semiconductor 


MRC 


MRC Systems 


Murray 


Murray Consulting 


National 


National Semiconductor 


NCR 


NCR Corp., Microelectronics 




Division 


NEC-EA 


NEC/ Electronic Arrays Division 


NEC Electron 


NEC/Electron Division 


NEC Micro 


NEC/ Microcomputer Division 


Nitron 


Nitron 


Nortek 


Nortek 



CAE 


Oliver Advanced Engineering 


Octagon 


Octagon Systems Corp. 


OEI 


Optical Electronics Inc. 


Ohio Sci 


Ohio Scientific 


OKI 


OKI Semiconductor 


Omnibyte 


Omnibyte Corp. 


Oscar 


1. S. Oscar Assoc. 


Panasonic 


Panasonic 


PC/M 


Pacific/Cyber Metrix 


Percom 


Percom Data Co. 


Phoenix 


Phoenix Digital Corp. 


Pico Design 


Pico Design 


Polycore 


Polycore Electronics 


Plessey 


Plessy Semiconductors 


PMI 


Precision Monolithics, inc. 


PragDes 


Pragmatic Design Inc. 


PDFMA 

rntiViH 




Pro-Log 


Pro-Log Corp. 


Quay 


Quay Corp. 


Raytheon 


Raytheon Semiconductor 


RCA 


RCA Solid State Division 


RCI Data 


Filil Data 


RELMS 


Relational Memory Systems 


Reticon 


. Reticon 


RIFA 


RFIA 


Rockwell 


Rockwell, Microelectronic Devices 


RTC 


Riehl Time Corporation 


Sanken 


Sanken Electric 


Sanyo 


Sanyo 


SEEQ 


SEEQ Technology, Inc. 


Semi Proc 


Semi Processes 


Siemens 


Siemens 


Signetics 


Signetics 


SGS 


obo-Mito oemiconuucior 


Sharp 


Sharp 


Silicon G 


Silicon General 


Siliconix 


Siliconix 


Silicon Sys 


Silicon Systems Inc. 


Siltronics 


Siltronics 


SMC 


Standard Microsystems Corp. 


Solarise 


Solarise Enterprises 


Solitron 


Solitron Devices 


Sprague 


Sprague Electric Company 


SSM 


Solid State Micro Technology 




for Music 


sss 


Solid State Scientific 


stag 


Stag Microsystems 


Struc. Des. 


Structured Design Inc. 


Stynetic 


Stynetic Systems 


Sunrise 


Sunrise Electronics 


Sunshine 


Sunshine Semiconductor 


Supertex 


Supertex Inc. 


Symtek 


Symtek Corp. 


Synapse 


Synapse Corp. 


Synertek 


Synertek 


Sys Innov 


Systems Innovations 


Tau Zero 


T -7 

Tau Zero Inc. 


Tektronix 


Tektronix 


Talaris 


(See Laserdyne) 


Teledyne C 


Teledyne Crystalonics 


Teledyne P 


Teledyne Philbrick 


Teledyne S 


Teledyne Semiconductor 


Telefunken 


Telefunken 


Telephonies 


Telephonies LSI 


Telmos 


Telmos 


Teltone 


Teltone Corporation 


Tl 


Texas Instruments 


Thomson-CSF 


Thompson-CSF Components Corp. 


TMX 


TMX 


Topanga 


Topanga Data Systems 


Toshiba 


Toshiba America 


Trans-Data 


Trans-Data 


TRW 


TRW-LSI Products 


Unitrode 


Unitrode 


Universal 


Universal Semiconductor, Inc. 


Vantage 


Vantage Data Products 


VTI 


VLSI Technology, Inc. 


Votrax 


Votrax 


Weitek 


Weitek Corporation 


Western 


Western Digital 


Wintek 


Wintek Corp. 


Xicor 


Xicor, Inc. 


Xycom 


Xycom 


Zendex 


Zendex Corp. 


Zilog 


Zilog 


Zymos 


Zymos Corporation 



© IC MASTER 1983 



IC MASTER 



iNTERFACE-Display Drivers (Cont'd) 



Display Drivers 



(Cont'd) 



30-Bit LCD Driver/Register 






MD43oljD 


Mitel 




32 Segment LCD 






MM5452 


Nitlonal 


(735) 


MM5453 


Nitlonal 


(735) 




Signetics 




32-Bit Higii-Voitage 






S45Z1 


AMI 


(2610) 


S4535 


AMI 


(2609) 


32-6it LCD MM58438 


National 




32-Line AC Plasma Display Axis Driver 






SN75500 


Tl 




SN75501 


Tl 




SN75502 


Tl 




SN75503 


Tl 




32~Lin6 Vscuum Fluor6SC6nt 






SN75518 


Tl 


(2862) 


32-Segment LCD Controller/Driver 






MPD7255 


NEC-iVlicro 




32-Segment LCD Driver 






MM5483 


National 




40-Segment LCD Duplex 






PCE2100 


Signetics 




60-Segment LCD Duplex 






PCE2110 


Signetics 




64-Segment LCD Duplex 






PCE2111 


Signetics 





t Military Temperature Range (-55° to 125°C) 

2466 



* Typical Value 

Bold face Indlcites addllionil data is provided on the page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Error Checking Circuits 



Max. Serial 
Data Rate, 



Supply 
Voltage, 



Function 


MHz 


V 


Device 


Source 




Error Checking Circuits 




CRCC Generator 


2 * 


5 


COM8004 


SMC 






3 


5 


MC8500 


Motorola 










SSI8500 


Silicon Sys 






10 


5 


940 1C 


Fairchild 










940 1M 


t Fairchild 










9411C 


Fairchild 










9411M 


t Fairchild 










8X01 A 


Signetics 










N9401 


SIgnetlcs 


(1514) 


Deskew-Queue Register 


3 * 


5 


MC8520 


Motorola 










cciQcon 


Silicon Sys 




Error Detection/Correction Circuit 




5 


wnR7nfi 


Western 


(3995) 


Prrnr nptprtlnn/Pnrrprtinn Plrnilt ^FPI \ 

UIIUI UCICUIIUII/UUI 1 CbLIUII UIIUUIl ^LUL^ 




— 5 2 


IVIO lU luo 


Motorola 










[Vlu lU ISO 


Motorola 










MC 10563 


t Motorola 










MC 10593 


Motorola 




Error Detection/Correction Circuit (TTL) 


. 


5 


9428 


Fairchild 










SN74ALS790 


Motorola 


(732) 








SN54LS630 


tTI (440.979) 








SN54LS631 


tTI (440.979) 








SN74LS630 


Tl 


(979) 








SH74LS631 


Tl 


(979) 






7 


MB1412A 


Fujitsu 




Error Pattern Register 


3 


5 


MC8501 


Motorola 




Expandable Error Checl<er and Corrector 




5 


DP8400 


National 


(2764) 


LRCC Data Register 


3 


5 


MC8502 


Motorola 










SSI8502 


Silicon Sys 




Polynominal Generator 


4* 


5 


MC8506 


Motorola 




Polynominal Generator/Checl<er 


3.5* 


5 


MC2653 


Motorola 


(1360) 








MC68653 


Motorola 


(1360) 








MC8503 


Motorola 






4 


5 


2653 


Signetics 




Universal Polynominal 4-Bit Generator 


17* 


5 


MC8504 


Motorola 




Single Error Hamming Code Detector and Generator 




5 


MC4041 


Motorola 





CD 

;a 

(D 
c 

o 

Q) 

CD 
CO 



•*—> 
CO 

CC 



20 



30 



t Military Temperature Range (-55° to 125°C) 

® IC MASTER 1983 



* Typical Value 

Bold face indicates additional data Is provided on the page noted. 



2467 



IC MASTER 



INTERFACE-Keyboard Encoder-Decoders 



No. of 

No. of Output 
Keys Bits 



Max. 

Clock Rate, 
KHz 



Supply 
Voltage, 
V 



Keyboard Encoder- Decoders 



Binary 



External ROM Programmable 



1of 16 



3-15 



2 key rollover, 3 state output 



MM54C922 f National 
MM74C922 National 



Antibounce, mute, interlock 



M190 



SGS 



Strobe output, key rollover output, 2 of 8 
keyboard to binary encoder, one of four 
row inputs and column Inputs (telephone 
key pads) give binary output, strobe. 



HD0165 



MC14419 



Harris 

(2733.3287) 
Motorola (3298) 



Binary 



3-15 



2 key rollover, 3 state output 



MM54C923 f National 
MM74C923 National 



85 



ASCII/HEX 



1000 



4-10.5 



Scans and generates code for 53 key ASCII 
plus 32 non-ASCII keys 



CDP1871 RCA 
CDP1871D tBCA 



(1484) 
(1484) 



4-6.5 



Scans and generates code for 53 key ASCII 
plus 32 non-ASCII keys 



CDP1871C RCA 
CDP1871CD tBCA 



(1484) 
(1484) 



8 plus Parity Mask, Programmable 



100 



-12.5 



Programmable parity, strobe width, strobe 
delay. Two key rollover. 8x11 matrix, 3 
levels. 



KR2376 



SMC 



90 10 External ROM Programmable 
Mask, Programmable 



100 
100 



-12.5 
-12.5 



9x10 matrix, 4 Mode, 2 or N key rollover 
9 X 10 matrix, 4 Mode, 2 or N key rollover 



KR3600-PRO SMC 
KR3600 SMC 



112 10 



Mask Programmable 



112 bits for internal programming of 
function keys 



AY3-4592 Gl 



128 



Mask Programmable 
Mask Programmable 



400 
100 



16 X 18 matrix, 8-Bit bus interface, 4 

rollover modes, UART on chip 
16 X 18 matrix, three-state I/O, 2 or 3 key 

alarm 



SCN2671A Signstics (1522) 
MSM3914A OKI (3873) 



t Military Temperature Range ( - 55° to 125°C) 



2468 



* Typical Value 

Bold face Indicates additional data is provided on the page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Line Circuits 



No. 


Supply 










Per Party 


Voltage, 










Device Output ' Line 


V 


Comments 


Device 


Source 




Line 


Line Drivers — Single Ended 






2 High Current Yes 


5 


Coax/Twisted Pair 


MC8T23 


Motorola 












DS75123 


National 












N8T23 


Signetics 












N6T23 


Tl 












S8T23 


Tl 












SN75123 


Tl 










Emitter Follower for Coax/Twisted Pair 


MC8T13 


Motorola 












DS55121 


t National 












DS75121 


National 












N8T13 


Signetics 




10 








S8T13 


OiyilcllUo 












N8T13 


Jl 














+ Tl 












SN75121 


Tl 






-0.5 to 5.5 V No 


5 


RS422A, RS423A 




Jl 






±4to6V No 


±9 to ±15 


RS232, RS423, CCiTT V.26, V.28 


9636AC 


Fairchild 












9636AM 


•j- Fairchild 












/iA9636A 








±6 V No 


± 12 


4 Input 


N8T15 


Signetics 






±8 V No 


± 12 


RS2o2C 


75150 


Fairchild 




20 








DS75150 


National 












SN55150 


tTI 












SN75150 


Tl 






3 High Current No 


5 


IBM360 


HD2904 


Hitachi 






±6 V No 


— 12 


Rb2o2D/C, CCITT, MlLloo 


9616 


Fairchild 












9616E 


Fairchild 












9616M 


"f Fairchild 






4 TTL No 


5 


Active Pull-Up 


AM2614C 


AMD 












AM2614M 


t AMD 






Yes 


5 


DS7831 w/o Vcc Clamp 


DS7832 


t National 




30 








DS8832 


National 












DS8832 


Tl 










Three-State 


RC8T09 


Raytheon 












RM8T09 


t Raytheon 












N8T09 


Signetics 












S8T09 


t Signetics 










2-lnput NAND, 80 Ma 


96101C 


Fairchild 












96101M 


t Fairchild 










4-lnput AND, NAND 


DS7831 


t National 












DS8831 


National 




40 








DS8831 


Tl 






0.15 to 4 V No 


7 


IBM360/370 


MC3481 


Motorola 


(2753) 










MC3485 


Motorola 


(2753) 




3.11 No 


5 


IBM360/370 


SN75126 


Tl 












SN75130 


Tl 






— 7 to 12 Yes 


5 


RS422 Three-State 


SN75174 


Tl 






-7 to ±12 Yes 


5 


RS422, Three-State 


SN75172 


Tl 






±4to6V No 


±5 


RS423, RS422 with mode control 


DS3691 


National 








±5.5 


RS423, RS422 with mode control 


DS1691 


t National 






Yes 


±5 


RS423, Three-State 


AM26LS29C 


AMD 




50 








AM26LS29 


Signetics 








±5.5 


RS423, Three-State 


AM26LS29M t AMD 




±6to9V No 


±9 to ±15 


RS232C. coin V.24 


XR1488 


Exar 


(3188) 










mA1488 


Fairchild 












HD75188 


Hitachi 












MC1488 


Motorola 


(2753) 










DS1488 


National 












MC1488 


Signetics 












SG1488 


Silicon G 












MC1488 


Tl 




60 








SN55188 


tTI 












SN75188 


Tl 






±4to6V No 


±5 


RS423, RS422 with mode control 


AM26LS30C 


AMD 












AM26LS30 


Signetics 








±5.5 


RS423, RS422 with mode control 


AM26LS30M t AMD 





t Military Temperature Range ( - 55° to 125°C) * Typical Value 

Bold faca Indicatas additional data Is provided on the page noted. 



'>IC MASTER 1983 2469 



IC MASTER 



INTERFACE-Line Circuits (Cont'd) 



No. 
Per 
Device 



Output 



Party 
Line 



Supply 
Voltage, 
V 



Source 



Line Drivers— Single Ended 



(Cont'd) 



NTDS 



No 



5,-15 
5,-5 



NTDS 

NTDS Hex Driver 



M0A-268B t Interdesign 
M0F1305B t Interdesign 



TTL 



Yes 



Tliree-State (also see index for 74S244, 74LS244, 67S304, 67LS304) 



Three-State, Inverting 



AM25LS241C AMD 
AM25LS241Mt AMD 
AM25LS244C AMD 
AM25LS244Mt AMD 
SN54LS241 fAMD 
SN54LS244 fAMD 
SN54S241 
SN54S244 
SN74LS241 
SN74LS244 
SN74S241 
SN74S244 
54LS241 



54LS541 
74LS241 
74LS244 
74LS541 
HD74LS241 
HD74LS244 
M74LS244 
SN54LSZ41 fMMI 
SN54LS244 fMMI 
SN54LS245 fMHI 
SN54LS341 fMMI 
SN54LS344 fMMI 
SNS4S241 fMMI 
SN54SZ44 
SN74LS241 
SN74LS244 
SN74LS245 
SN74LS341 
SN74LS344 
SN74S241 
SN74S244 



fAMD 
fAMD 
AMD 
AMD 
AMD 
AMD 
t Fairchild 
t Fairctilld 
Fairchild 
Fairchild 
Fairchild 
Hitachi 
Hitachi 
Mitsubishi 



tMMI 
MMI 
MMI 
MMI 
MMI 
MMI 
MMI 
MMI 



SN54LS241 t Motorola 

SN54LS244 f Motorola 

SN54LS541 t Motorola 

SN74LS241 Motorola 



SN74LS244 
SN74LS541 
DM54S241 
DM74S241 
MM54C941 
MM74C941 
74LS241 
74LS244 
74LS541 
SN54ALSZ41 ]J\ 
SN54ALSZ44tTI 
SN54LS241 fTI 
SN54LS244 fTI 
SN54LS541 fTI 
SN54S241 tTI 
SN74ALS241 Tl 
SN74ALSZ44 Tl 
SN74LSZ41 Tl 
SN74LSZ44 Tl 
SN74LS541 Tl 
SN74S241 Tl 



Motorola 
Motorola 
t National 
National 
t National 
National 
Signetics 
Signetics 
Signetics 



(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 
(715) 



(2775) 
(911) 
(912) 
(911) 
(912) 
(960) 
(911) 
(911) 
(912) 
(911) 
(912) 
(960) 
(911) 



AM25LS240C AMD 
AM25LS240Mt AMD 
SN54LS240 .fAMD 
SN54S240 AMD 
SN74LS240 AMD 
SN74S240 AMD 
54F240 t Fairchild (630) 
54LS240 t Fairchild 

(Continued) 



t Military Temperature Range ( - 55° to 125°C) 

2470 



* Typical Value 

Bold lacs Indicates additional data Is provided on the page noted. 



IC i\1 ASTER 1983 



MASTER SELECTION GUIDE 



INTERFAC^-Line Circuits (Cont'd) 



No. 


Supply 










Per Party 


Voltage, 










Device Output Line 


V 


Comments 


Device 


Source 




Line 


Line Drivers — Single Ended 


(Cont'd) 




8 TTL Yes 


5 


Three-State, Inverting 






(Cont'd) 










54LS540 


t Falrchild 












74F240 


Filrchlld 


(630) 










74LS240 


Falrchild 












74LS540 


Fairchild 












M74LS240 


Mitsubishi 












SH54LS240 


tMMI 


(715) 










SN54LS340 


tMMI 


(715) 










SN54S240 


tMMI 


(715) 










SH74LS240 


MM! 


(715) 










SN74S240 


MMI 


(715) 


10 








SN54LS240 


t Motorola 












SN54LS540 


t Motorola 












SN74LS240 


Motorola 












SN74LS540 


Motorola 












DM54S240 


t National 












DM74S240 


National 












54LS540 


tSlgnellcs 


(2775) 










74LS240 


Signetics 












74LS540 


SIgnatlcs 


(2775) 










SN54ALS240 fTI 


(910) 


20 








SN54LS240 


tTI 


(910) 










SN54LSS40 


tTI 


(960) 










SN54S240 


tTI 


(910) 










SN74ALS24Q 


n 


(910) 










SN74LS240 


Tl 


(910) 










SN74LSS40 


Tl 


(960) 










SN74S240 


Tl 


(910) 




16 TTL Yes 


5 


Three-State 


SN54LS365A fTI 


(935) 










SN54LS367AtTI 


(936) 










SN74LS365A 


Tl 


(935) 


30 








SN74LS367A 


Tl 


(936) 








Three-State, Inverting 


SN54LS366AtTI 


(935) 










SN54LS368A fTI 


(936) 










SN74LS366A 


n 


(935) 










SN74LS368A 


Tl 


(936) 




Line Drivers — Differential 






See also Drivers under digital logic families 






2 High Current CMOS 














No 


3-15 


CMGS50mA,4-lnputAND,NAND 


MM78C30 


t National 












MM88C30 


National 






High Current TTL No 


5 


40 mA, Active Pull-up/Pull-down 


96120 


Fairchild 










40 mA, Open Collector/Active Pull-up 


96140 


Fairchild 




40 








9614M 


t Fairchild 












DS55114 


t National 












DS75114 


National 












9614C 


Tl 












SN55114 


tTI 












SN75114 


Tl 










40 mA, RS422 


SN55128 


tTI 












SN75158 


Tl 










40 mA, 4-lnput AND, NAND 


54S140 


t Fairchild 












74S140 


Fairchild 




50 








HD74S140 


Hitachi 












DM74S140 


National 












DS7830 


t National 












DS8830 


National 












54S140 


t Signetics 












74S140 


Signetics 












DS8830 


Tl 












SNS4S140 


tTI 


(881) 










SN55183 


tTI 












SN74S140 


Tl 


(881) 


60 








SN75183 


Tl 






Yes 


5 


Three-State 


DS7831 


t National 












DS8831 


National 












DS8831 


Tl 














(Continued) 




t Military Temperature Range (-55° to 125°C) 




* Typical Value 









Bold ties iRdlcates additional data Is provided on the paga noted. 



IC MASTER 1983 



2471 



IC MASTER 



INTERFACE-Line Circuits (Cont'd) 



No. 


Supply 










Per Party 


Voltage, 










Device Output Line 


V 


Comments 


Device 


Source 




Line 


Line Drivers — Differential 


(Cont'd) 




2 High Current TTL Yes 


5 








(Cont'd) 








DS7831 w/o Vcc Clamp 


DS7832 


t National 












DS8832 


Tl 










40 mA, Open Collector/Active Pull-Up, Three-State 


DS55113 


j National 












DS75113 


National 












SN55113 


fTI 












SN75113 


Tl 










4u mA, niAiiLi 1 nree-oiaie 


9634C 


Fairchild 












9634M 


t Fairchild 














National 












SN75159 


Tl 




10 


2.5 to 3.5 No 


5 


High Speed 


^A9638C 


Tl 






o.D niM Yes 


± D 


Twisted Pair 


nU/01U9 


niiacni 












MC75109 


Motorola 












SN55109A 


tTI 












SN74109A 


Tl 


(870) 




6.5 mA Yes 


±5 


Twisted Pair, Level Shifting 


551 10A 


t Fairchild 












751 10A 


Fairchild 












HD75110 


Hitachi 












MC75110 


Motorola 












MC75S110 


Motorola 




20 








SN55110A 


tTI 












SN75110A 


Tl 






18 mA Yes 


±5 


Higher Current 75110 


SN75112 


Tl 






±3V Yes 


±5 


RS422 at Low Data Rates, RS423 


AM26LS30C 


AMD 












AM26LS30 


Signetics 








±5.5 


RS422 at Low Data Rates, RS423 


AM26LS30M t AMD 




±5V , No 


±15,±5 . 


ARING 429, 1000K bits data rate 


HS3182 


t Harris 






4 High Current CMOS 














■ No 


3-15 


CMOS, 25 mA 


MM78C29 


t National 












MM88C29 


National 






High Current TTL No 


5 


50 Ohm Lines 


74128 


Signetics 




30 








SN74128 


Tl 


(876) 








75 Ohm Lines 


54128 


t Signetics 












SN54128 


tTI 


(876) 




Yes 


5 


RS-422, RS-423, Three-State 


MC3487 


Motorola 












DS3487 


National 












MC3487 


Tl 










Three-State 


DS1688 


t National 






11 mA Yes 


±5 


Quad 75110 


MC3453A 


Motorola 






20 mA Yes 


5 


MIL188-114, Three-State 


DS1692 


t National 












DS3692 


National 




40 






RS-422, Three-State 


AM26LS31C 


AMD 












AM26LS31M t AMD 












AMZ6LS31 


Motorola 


(2753) 










AM26LS31C 


Motorola 


(2753) 










AM26LS31M t Motorola 


(2753) 










DS26LS31C 


t National 












DS26LS31M 


National 












AM26LS31 


Signetics 












AM26LS31C 


Tl 












AM26LS31M fTI 




50 


40 mA Yes 


5 


RS-422, Fed. 1020, Three-State 


SN75151 


Tl 












SN75153 


Tl 







CD 

;d 

O 

c 
o 

•4—' 

o 

(D 

w 

-4—' 

(0 



t Military Temperature Range (-55° to 125°C) 



2472 



* Typical Value 

Bold face indicates additional data 1$ provided on the page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Line Circuits (Cont'd) 



No. 


Receiver 


Common 


Supply 










Per 


Input 


Mode 


Voltage, 










Device 


Threshold 


Voltage, V 


V 


Comments 


Device 


Source 


Line 



Line Receivers — Single Ended 



Also see Line Receivers-DiKercntlal 



0.4 to 2.4 



±15 



:0.1V (rot) 



±2,0 



Differential Input, Single Ended Data 



At^2615C AMD 
Afk12615M t AMD 



Ext, Rcf. Adj. 1.5 to 3.5 V with Optional Internal 2,5 V Reference 



SN55142A t Tl 

SN55143A t Tl 

SN75142A Tl 

SN75143A Tl 



Ext. Reference Adjustable from 1.5 to 3.5 V 



MC75140 
SN55140 
SN55141 
SN75140 
SN75141 



Motorola 
tTI 
tTI 

Tl 

Tl 



Hysteresis, EIA/MIL 
RS232B 



N8T16 
DS7822 
DS8822 



Signetics 
t National 
National 




T 

C 
C 

o 

•4— ' 

o 

0) 

CD 
CO 

a> 
•*— ■ 
w 

03 



0.7 to 1.7 



0.75 to 2.25 



0.8 to 2.0 V 



0.86 to 2.40 



1.15 to 1.55 



0.75 to 1.5 V 



0.75 to 2,25 



0.97 to 2,65 



1.05 to 2.5 



1.2 to 1,8 



1.3 to 1.7 



1.7 



1.75 to 2.25 V 



5 to 7.5 



5.5 to8 



±3/0.8 to 3 



0.97 to 2.65 
1.05 to 2.50 



Hysteresis, IBM360/370 



MC8T24 
0S75124 
N8T24 
SN75124 



Motorola 
National 
Signetics 
Tl 



Hysteresis. RS232C, CCITT V.24 



9617C 



Falrctiild 



Hysteresis, High-Speed 



MC8T14 

DS55122 

0375122 

NaT14 

SN55122 

SN75122 



Motorola 
t National 

National 

Signetics 
tTI 

Tl 



High-Speed 



HD2915 



llit.ichi 



IBM360 



HD2905 



Hitachi 



RS232C, Programmable Threshold, Hysteresis 



RS232C, Programmable Threshold, Wider Hysteresis ttun 1489 



Hysleresis, 120 Ohm System 



Hysteresis, 120 Ohm System 



1?0 Ohm System. No Hyslctcslr., NOR Input 



1?0 Ohm System. No Hystmu:.l:i. NOR Input 



No Hysteresis. NOR Inpul 



RS232C. ProgramnMblo Thtcsholtl, Hysteresis 



Hysteresis, Inlcifaco to CMOS 



Hysteresis, Open Collcclor, Intcifaco to CMOS 



Hysteresis. Open Collector, Intcit.ico to CMOS 
llystersis, Interface to CMOS 



5 or 12 



R5232C, HystciC'Js. fall Sato Option 




Hysteresis, 120 Ohm System 
Hysteresis, 120 Ohm System 



t Military Temperature Range { - 55" to 125' C) 

®1C MASTER 1983 



* Typical Value 
Bold fict lidlcitssi<<llloBit 'ill Is provldid oa thspk. 



rC MASTER 



INTERFACE-Line Circuits (Cont'd) 



Receiver 
Input 



Common 
Mode 



Supply 
Voltage, 



Device Threshold Voltage, V V 


Comments 


Device 


Source 




Line 


Line Receivers — Single Ended 


(Cont'd) 




6 1.05 to 2.50 5 


Hysteresis, 120 Ohm System 






(Cont'd) 








0S8837 


National 










N8T37 


SIgnetics 






-1 to 4.5/- 1.5 to 13 












5 


NTDS 


MOB-272 


t Interdesign 






7 0.7 to 1.7 5 


IBM360/370 


MC75125 


Motorola 


(2753) 








MC75127 


Motorola 


(2753) 








DS75125 


National 










DS75127 


National 










SN75125 


Tl 










SN75127 


11 






8 0.7 to 1.7 5 


IBM360/370 


MC75126 


Motorola 


(2753) 


10 






MC7512g 


Motorola 


(2753) 








DS75128 


National 










DS75129 


National 










SN75128 


Tl 










SN75129 


Tl 






Line Receivers— Differential 






See also Receivers-listed under Digital-ECL and Digital-HNIL/HTL Miscellaneous sections 






2 ±U.U|U ±0 xS 


10 mV, MOS Sense, Active Pull-up 


DS75207 


National 










DS75208 


National 










SN75207 


Tl 








10 mV, MOS Sense. Open Collector 


SN75208 


Tl 




20 




10 mV, MOS Sense, Three-State 


DS3604 


National 








75207 with Diode Protected Input Stage 


SN75207B 


Tl 








75208 with Diode Protected Input Stage 


SN75208B 


Tl 






±0.025 :t3 ±5 


25 mV, Active Pull-up 


55107A 


t Fairchild 










75107A 


Fairchild 










HD75107A 


Hitachi 










MC55107 


t Motorola 










MC75107 


Motorola 








25 mV, Active Pull-Up 


DS55107 


t National 










DS75107 


National 




30 




25 mV, Active Pull-up 


SN55107A 


tTI 










SN75107A 


Tl 






1 


25 mV, Open Collector 


HD75108A 


Hitachi 










MC55108 


t Motorola 










MC75108 


Motorola 










DS55108 


t National 










DS75108 


National 










SN55108A 


tTI 










SN75108A 


Tl 








25 mV, Three-Stale 55107 


DS1C03 


t National 




40 






OS3C03 


National 








55107A with Diode Protected Input Stage 


75 1078 


Fairchild 










DS55107 


t National 










DS75107 


National 










SN55107B 


tTI 










SN75107B 


Tl 








55108A with Diode Protected Input St.ige 


75108B 


Fairchild 










0555108 


t National 










D575108 


National 










SN55108B 


tTI 




50 






SN75108B 


Tl 






\ W15 5 


Twisted Pair, ± 15 V CMV. Respofir,c Control 


DS78LS120 


t National 










DS88LS120 


National 






\ ^ 


CMOS Co0ipatib!e, Response Control 


DS78C120 


t National 










DS88C120 


National 






\ ^ 


RS232, RS422/3 


9637AG 


Fairchild 










9637AM 


t Fairchild 










SN55157 


tTI 










SN75157 


Tl 










MA9637AC 


Tl 




60 


^A1^ — 






(Continued) 





a; 
o 

c 
o 

' 

o 

CD 

(n 
\— 

(D 
-+— ' 
(f) 
CO 



* Typical Value 

Bold face fndlcalesadilllloRal data is provldod on Iha pagt notid. 



iC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Line Circuits (Cont'd) 



No. 


Receiver 


Common 


Supply 










Per 


Input 


Mode 


Voltage, 










Device 


Threshold 


Voltage, V 


V 


Comments 


Device 


Source 


Line 



Line Receivers — Single Ended 




Also see Line Receivers-Differential 




2 0.4 to 2.4 ± 15 


5 


Differential Input, Single Ended Data 


AM2615C 


AMD 








AM2615M 


t AMD 


±0.1V(ref) 


5 


Ext. Ref. Adj. 1.5 to 3.5 V with Optional Internal 2.5 V Reference 


SN55142A 


tTI 








SN55143A 


tTI 








SN75142A 


Tl 








oil f tj l*TOn 


•pi 






Ext. Reference Adjustable from 1.5 to 3.5 V 


MC75140 


Motorola 








SN55140 


tTI 








SN55141 


tTI 








SN75140 


Tl 








SN75141 


Tl 


±2.0 


5 


Hysteresis, EIA/MIL 


N8T16 


Signetics 








DS7822 


t National 








DS8822 


National 


3 0.7 to 1.7 


5 


Mysieresis, lomobu/j/u 


MUo 1 c'\ 


Motorola 








Uo/0 IZ4 


National 








N8T24 


Signetics 










Tl 

1 1 


0.75 to 2.25 


5 


Hysteresis, RS232C, CCITT V.24 


9617C 


Fairchild 


0.8 to 2.0 V 


5 


Hysteresis, High-Speed 


MC8T14 


Motorola 








DS55122 


t National 








DS75122 


National 








N8T14 


Signetics 








SN55122 


tTI 








SN75122 


Tl 


0.86 to 2.40 


5 


High-Speed 


HD2915 


Hitachi 


1.15 to 1.55 


5 


IBM360 


HD2905 


Hitachi 


*t U.lO lU 1.9 V 


g 


R^9^9P Prnnramnnahlo ThrechnlH Huctproc'ic 
no^ocO, ri uyi aiiiiiiauic 1 III couuiu, nyoici caio 




PolrrhilH 
rail UIIIIU 








HD75154 


Hitachi 








MC1489 


Motorolt (2753) 








DS1489 


National 








MC1489 


Signetics 








OU 1409 


oiMcon U 








SN55189 


tTI 








SN75189 


Tl 


0.75 to 2.25 


5 


RS232C, Programmable Threshold, Wider Hysteresis than 1489 


XR14BgA 


Exir (3188) 








MA1489A 


Fairchild 








HD75189 


Hitachi 








MC1489A 


Motorola (2753) 








nCiylOQA 

UoMoSA 


National 








IVIl>14t]yA 


Signetics 








SG1489A 


Silicon G 








SN55189A 


tTI 


0.97 to 2.65 


5 


Hysteresis, 120 Ohm System 


DS7836 


t National 


1.05 to 2.5 


5 


Hysteresis, 120 Ohm System 


DS8836 


National 


1.2 to 1.8 


5 


120 Ohm System, No Hysteresis, NOR Input 


DS7640 


t National 


1.3 to 1.7 


5 


120 Ohm System, No Hysteresis, NOR Input 


DS8640 


National 


1.7 


5 


No Hysteresis, NOR Input 


QC-tne 


rdiruiMIU 


i./i) 10 V 


c 



RS232C, Programmable Threshold, Hysteresis 


ori/u lOaM 


Jl 


5 to 7.5 


15 


Hysteresis, Interface to CMOS 


367A 


Teledyne S 








OD/ m 


1 1 cicuyiic o 






Hysteresis, Open Collector, Interface to CMOS 


368A 


Teledyno S 


5.5 to 8 


12 


Hysteresis, Open Collector, Inferface to CMOS 


368C 


Teledyno S 






Hystersis, Interface to CMOS 


367B 


Teledyne S 








367C 


t Teledyne S 


±3/0.8 to 3 


5 or 12 


RS232C, Hysteresis, Fail Safe Option 


55154 


t Fairchild 








75154 


Fairchild 








DS75154 


National 








SG55154 


t Silicon G 








SG75154 


Silicon G 








SN54154 


fll (885) 








SN75154 


Tl 


6 0.97 to 2.65 


5 


Hysteresis, 120 Ohm System 


DS7837 


t National 


1.05 to 2.50 


5 


Hysteresis, 120 Ohm System 


MC3437 


Motorola 










(Continued) 



(D 

■g 

CD 
c 

o 


CO 

•+— ' 
CO 
CC 



40 



50 



60 



t Military Temperature Range (-55° to 125°C) 

^ IC MASTER 1983 



* Typical Value 

Bold fact Indicates additional data Is provided on the page noted. 



IC MASTER 



INTERFACE-Line Circuits (Cont'd) 



No. Receiver Common Supply 










Per Input Mode Voltage, 










Device Threshold Voltage, V V 


Comments 


Device 


Source 




Line 


Line Receivers — Single Ended 


(Cont'd) 




6 1.05 to 2.50 5 


Hysteresis, 120 Ohm System 






(Cont'd) 








DS8837 


National 










N8T37 


SIgnetics 






-1to 4.5/-1.5 to 13 












5 


NTDS 


MOB-272 


t Interdesign 






7 0.7 to 1.7 5 


IBM360/370 


MC751Z5 


Motorola 


(2753) 








MC75127 


Motorola 


(2753) 








DS75125 


National 










DS75127 


National 










SN75125 


Tl 










SN75127 


Tl 






8 0.7 to 1.7 5 


IBM360/370 


MC751Z8 


Motorola 


(2753) 


10 






MC75129 


Motorola 


(2753) 








DS75128 


National 










DS75129 


National 










SN75128 


Tl 










SN75129 


Tl 






Line Receivers — Differential 






See also Receivers-listed under DIgltal-ECL and DIgltal-HNIL/HTL Miscellaneous sections 






2 ±0.010 ±3 ±5 


10 mV, MOS Sense, Active Pull-up 


DS75207 


National 










DS75208 


National 










SN75207 


Tl 








10 mV, MOS Sense, Open Collector 


SN75208 


Tl 




20 




10 mV, MOS Sense, Three-State 


DS3604 


National 








75207 with Diode Protected Input Stage 




Tl 
1 1 








75208 with Diode Protected Input Stage 




Tl 






±0.025 ±3 ±5 


25 mV, Active Pull-up 


55107A 


t Fairchild 










75107A 


Falrchild 










HD75107A 


Hitachi 










MC55107 


t Motorola 










MC75107 


Motorola 








25 mV, Active Pull-Up 


DS55107 


t National 










DS75107 


National 




30 




25 mV, Active Pull-up 


SN55107A 


tTI 










SN75107A 


Tl 








25 mV, Open Collector 


HD75108A 


Hitachi 










MC55108 


t Motorola 










MC75108 


Motorola 










DS55108 


t National 










DS75108 


National 










SN55108A 


tTI 










SN75108A 


Tl 








25 mV, Three-State 55107 


DS1603 


t National 




40 






DS3603 


National 








55107A with Diode Protected Input Stage 


75107B 


Falrchild 










DS55107 


t National 










DS75107 


National 










SN55107B 


tTI 










SN75107B 


Tl 








55108A with Diode Protected Input Stage 


75108B 


Fairchild 










DS55108 


t National 










DS75108 


National 










SN55108B 


tTI 




50 






SN75108B 


Tl 






±0.2/0.3 ±10/15 5 


Twisted Pair, ± 15 V CMV. Response Control 


DS78LS120 


t National 










DS88LS120 


National 






±15' 5 


CMOS Compatible, Response Control 


DS78C120 


t National 










DS88C120 


National 






±0.2/0.5 ±7/15 5 


RS232, RS422/3 


9637AC 


Fairchild 










9637AM 


t Fairchild 










SN55157 


tTI 










SN75157 


Tl 










mA9637AC 


Tl 




60 








(Continued) 




t Military Temperature Range (-55 to 125"C) 


* Typical Value 







CD 

;o 

O 

c 
o 

o 

\— 

Q) 
-t— ' 
U) 
CO 



Bold lice Indlcatos additional data Is provided on tho page noted. 



?474 



®\0 MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Line Circuits 


(Cont'd) 










No. Receiver Common 


Supply 










Per Input Mode 


Voltage, 










Device Threshold Voltage, V 


V 


Comments 


Device 


Source 




Line 


Line Receivers — Differential 


(Cont'd) 




2 










(Cont'd) 




±0.3/0.3 ±0/15 


5 


± 15 V CMV, Response Control 


DS78L20 


t National 






±0.5/1 ±0/15 


5 


± 15 V CMV, Response Control 


9615C 


Fairchlld 












9615M 


t Falrchild 












DS55115 


t National 












DS75115 


National 












9615C 


Tl 












SN55115 


+ Tl 

TTI 














Tl 
1 1 






±3/15 


5 


Twisted Pair, ±3/15 V CMV, Response Control 


Ub/O^UA 


t National 












noQOort A 
UotiOiiUA 


National 




10 








UoOO^lU 


Tl 












SN55152 


tTI 












SN55182 


tTI 












SN75182 


Tl 






± 10/15 


5 


Twisted Pair, ± 15 V CMV, Response Control 


DS7820 


t National 












DS78C20 


t National 












DS8820 


National 












OS88C20 


National 






± U.O/ J ± dX3 


± 12 


Aujusis no£o<:u/iviiL- 100, ±^0 V iiMV, nysieresis 


SN75152 


Tl 






4 ±0.025 ±3 


±5 


Four 75107, Active Pull-up 


MC3450 


Motorola 




20 








DS1650 


t National 












DS3650 


National 










Pniir 7f\inR Hnon Pnllopfnr 

ruur #3 luo, upcn i/UiicLiur 


MC3452 


Motorola 












DS1652 


t National 












DS3652 


National 






+0.2 ±3 


±5 


Three-State, RS422/423 


MC3486 


Motorola 


(2753) 










DS3486 


National 












MC3486 


Tl 






±7 


±5 


Three-State, RS-422/423 


AM26LS32C 


AMD 












AM26LS32M t AMD 




30 








DS26LS32C 


National 












DS26LS32M 


t National 












AM26LS32C 


Tl 












AM26LS32M f Tl 






±12 


±5 


Three-State, RS-422 


SN75173 


Tl 












SN75175 


Tl 






±15 


±5 


50 mV Hysteresis 


0S1689 


t National 












DS1690 


t National 












DS3689 


National 












DS3690 


National 




40 


±0.5 ± 15 


±5 


Three-State 


AM26LS33C 


AMD 












AM26LS33M f AMD 












DS26LS33C 


National 












DS26LS33M 


t National 












AM26LS33C 


Tl 












AM26LS33M f Tl 






±0.8 -12, ±7.5 


±5,-5 


NTDS 


M0F1623B 


t Interdesign 







•+— ' 
CO 
03 



t Military Temperature Range (-55° to 125°C) 

®IC MASTER 1983 



* Typical Value 

Bold face indlcalas additional data Is provided on tlie page noted. 



2 ^' 



IC MASTER 



INTERFACE-Line Circuits 


(Cont'd) 










No. Receiver 


Supply 










Per Input 


Voltage, 










Device Threshold, V Output 


V 


Comments 


Device 


Source 




Line 


Line Transceivers — Single Ended 






Bidirectional Bus Transceiver, Three-State, CMOS 














- nUCMOS 


5 


General Purpose Interface Bus 


DS3666 


National 


(2768) 










DS75160A 


National 


(2768) 










DS75161A 


National 


(2768) 










DS75162A 


National 


(2768) 




A Q tn n TTI 
U.O 10 C.\J 1 1 L 


D 


D'A- »■ IDT ;d • * n 

Bidirectional Bus Transceiver/ReQister, Open Collector 


SN74LS647 


Tl 


(986) 










SN74LS649 


Tl 


(986) 








Bidirectional Bus Transceiver, Three-State 


G74SC245 


GTE Micro 












G74SC545 


GTE Micro 










Bidirectional Bus Transceiver, Three-State, CMOS 


MD54SC245 t Mitel 


(706) 










MD54SC545 t Mitel 


(706) 


10 








MD74SCZ45 


Mitel (702.706) 











MD74SC545 


Mitel 


(706) 








General Purpose Interface Bus 


MC3447 


Motorola 














(2753.2755) 










SN75160 


Tl 












SN75160A 


Tl 












SN75161 


Tl 












SN75161A 


Tl 












SN75162 


Tl 












SN75162A 


Tl 












SN75163 


Tl 




20 


4 0.05 to 2.50 HL 


5 


Open Collector, 1 V Hysteresis 


AM8838 


AMD 












MC3438 


Motorola 












DS8838 


National 












N8T38 


SIgnetics 






0.21 to 1.84 TTL 


5 


Open Collector (Inverting), Common Enable 


96103M 


t Fairchild 






0.4 to 2.05 m 


5 


Open Collector, Hysteresis 


AM26S12AC 


AMD 












AM26S12AM t AMD 






0.5 to 2.0 m 


5 


Bus Transceiver, Tridirectional, Open Collector 


SN54LS440 


tTI 












SN54LS441 


tTI 


(947) 










SN54LS448 


tTI 


(951) 


ou 






Bus Transceiver, Tridirectional, Three-State 


SN54LS442 


tTI 


(947) 










SN54LS443 


tTI 


(947) 










SN54LS444 


tTI 


(947) 




n R tn 9 n TTI 


c 


_ T -rf- f 1 n rut 

Bus transceiver, Tridirectional, open uoiiector 


SN74LS440 




(947) 










SN74LS441 




(947) 










SN74LS448 




(951) 








Bus Transceiver, Tridirectional, Three-State 


SN74LS442 




(947) 










SN74LS443 




(947) 










SN74LS444 




(947) 








General Purpose Interface Bus, Open Collector, for MOS Input 


MC3446A 


Motorola 


(2753) 


40 








MC3446 








0.7 to 2.0 m 


5 


Three-State, Bus Transceiver 


AM2915AM 


tAMD 


(1211) 








Three-State, Bus Transceiver, Parity Generator/Checker 


AM2gi6AM 


tAMD 


(1211) 










AM2gi7AM 


tAMD 


(1212) 








Three-State, Hysteresis 


AM25LS242MtAMD 












AM25LS243Mt AMD 












SN54LS242 


tAMD 












SN54LS243 


tAMD 












SN54S242 


tAMD 












SN54S243 


tAMD 




50 








54LS242 


t Fairchild 












54LS243 


t Fairchild 












SN54LS242 


t Motorola 












SN54LS243 


t Motorola 












SN54ALS242tTI 


(911) 










SN54ALS243 tTI 


(912) 










SN54LS24Z 


tTI 


(911) 










SN54LS243 


tTI 


(912) 




0.8 to 1.8 ni/MOS 


5 


Bus Transceiver, Individual Direction Controls 


SN54LS446 


tTI 


(950) 










SN54LS449 


tTI 


(951) 


60 






General Purpose Interface Bus, Bidirectional Bus Transceiver, Three-State 


AM3448A 


AMD 












MA3448A 


Fairchild 












MC3448A 


Motorola 


(2753) 




0.8 to 2.0 TTL 


5 


Bus Transceiver, Individual Direction Controls 


SN74LS446 


Tl 


(950) 












(Continued) 





CD 
■D 

13 

O 

C 

o 
o 

Q) 
<D 
CD 
1— 
Q) 



t Military Temperature Range (-55° to 125°C) 

M76 



* Typical Value 

Bold face Indicates additional data Is provided on the page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Line Circuits (Cont'd) 



No. Receiver 


Supply 










Per Input 












Device Threshold, V 


Output V 


Comments 


Device 


Source 




Line 


Line Transceivers- 


—Single Ended 




(Cont'd) 




4 0.8 to 2.0 


TTL 5 


Bus Transceiver, Individual Direction Controls 






(Cont'd) 










SN74LS449 


Tl 


(951) 








General Purpose Interface Bus Open Collector 100 mA Output 


DS8641 


Motorola 












MC3440A 


Motorola 


(2753) 










MC3441A 


Motorola 


(2753) 










MC3443A 


Motorola 


(2753) 










DS3662 


National 












DS7641 


t National 












DS8641 


National 












MC3443 


Tl 










Three-State. Bus Transceiver 


AM2gi5AC 


AMD 


(1211) 


10 






Three-State, Bus Transceiver, Parity Generator/Checker 


AM2916AC 


AMD 


(1211) 










AM2917AC 


AMD 










Three-State, Dual Rank Latches 


SN74S226 


Tl 


(908) 








Three-State, Hysteresis 


AM25LS242C 


AMD 












AM25LS243C 


AMD 












SN74LS242 


t AMD 












SN74LS243 


AMD 












SN74S242 


AMD 












SN74S243 


AMD 












74LS242 


Fairchild 




20 








74LS243 


Fairchild 












SN74LS242 


Motorola 












SN74LS243 


Motorola 












74LS242 


Signetics 












74LS243 


Signetics 












SN74ALS242 


Tl 


(911) 










Sn74ALSZ4< 


Tl 


(912) 










SN74LS242 


Tl 


(911) 










SN74LS243 


Tl 


(912) 








Three-State (Inverting) 


N8T26 


AMD 




30 








S8T26 


t AMD 












>jA8T26A 


Fairchild 












mA8T26AM 


t Fairchild 












HD268T26 


Hitachi 












MC6880 


Motorola 












MC8T26A 


Motorola 












DS8T26A 


National 












DS8T26AM 


t National 












N8T126 


Signetics 












N8T127 


Signetics 




40 








N8T26A 


Signetics 












S8T126 


t Signetics 












S8T127 


t Signetics 












Olif 3 lOD 


Tl 
1 1 










Three-State (Non-Inverting) 


N8T28A 


AMD 














J AMU 












mA8T28 


Fairchild 












/iA8T28M 


t Fairchild 












MC6889 


Motorola 












MC8T28 


Motorola 




50 








DS8T28 


National 












DS8T28M 


t National 












N8T128 


Signetics 












N8T129 


Signetics 












N8T28 


Signetics 












S8T128 


t Signetics 












S8T129 


t Signetics 






0.97 to 2.65 


HL 5 


Open Collector, 1 V Hysteresis 


AM7838 


tAMD 












DS7838 


t National 






1.05 to 2.50 


HL 5 


Inverting 7833/8833 


DS7835 


t National 




60 








DS8835 


National 










Inverting 7839/8839 


DS7834 


t National 












DS8834 


National 












N8T34 


Signetics 










Three-State, NOR Gate, Transmit Disable, Hysteresis 


DS7839 


t National 












DS8839 


National 














(Continued) 





t Military Temperature Range ( - 55° to 125°C) * Typical Value 

Bold face indicates additional data is provided on llio page noted. 



® IC MASTER 1983 2477 



IC MASTER 



INTERFACE-Line Circuits (Cont'd) 



No. R6C6iV6r 


Supply 










Per Input 


Voltage, , 










Device Threshold, V 


Output V 


Comments 


Device 


Source 




Line 


Line Transceivers- 


—Single Ended 




(Cont'd) 




4 1.05 to 2.50 


TTL 5 








(Cont'd) 








Three-State, T/R Disables, Hysteresis 


DS7833 


t National 












DS8833 


National 






1.5 to 2.4 


TTL 5 


Open Collector, 100 mA Output, Parity Generator/Checker 


AM2g07M 


tAMD 


(1206) 








Q-bus Compatible 2907 


AM2g08M 


tAMD 


(1206) 








2-lnput, Open Collector 100 mA Drivers 


AMZgOSM 


tAMD 


(1205) 








2-lnput, Open Collector 100 mA Drivers, Parity Generator/Checker 


A If onncu 


tAMD 


(1205) 




1.5 to 3.2 


TTL 5 


Open Collector, 100 mA Output 


SG55138 


t Silicon G 












SN55138 


tTI 






1.6 to 1.8 


TTL 5 


Open Collector, Hysteresis 


AM26S12C 


AMD 












AM26S12M 


tAMD 




10 


1.6 to 2.3 


TTL 5 


Open Collector, 100 MA Output, Parity Generator/Checker 


AM2g07C 


AMD 


(1206) 








Q-bus Compatible 2907 


AMzgosc 


AMD 


(1206) 








2-lnput, Open Collector 100 mA Drivers 


AM2g05C 


AMD 


(1205) 








L.~MI|JUl, U^CII UullCblUI lUU IIIM uiivcio, raiiiy 




nmu 






1.6 to 2.4 


TTL 5 


Open Collector, 100 mA Output 


AM26S10M 


tAMD 












AM26S11M 


tAMD 












9640M 


t Fairchild 












uo^uo lum 


t Nstional 












DS26S11M 


"I" Natlnnal 
1 iiallUliai 












AM26S10M 


tTI 




20 








AM26S11M 


tTI 






1.75 to 2.25 


HL 5 


Open Collector, 100 mA Output 


AM26S10C 


AMD 












AM26S11C 


AMD 












9640C 


Fairchild 












MC26S10 


Motorola 












MC26S11 


Motorola 












DS26S10C 


National 












DS26S11C 


National 












AM26S10C 


Tl 












AM26S11C 


Tl 




30 








AM2S10C 


Tl 






1 8 to 2.9 


TTL 5 


Open Collector 100 mA Output 


ovj/ J loo 


oiiicon u 












ori/ u 100 


Jl 






8 TTL 


TTL 5 


Bidirectional Bus Transceiver, Three-State 


MIvi/oU*tD 


1 AMU 












rtiVl00U4 


AMn 

^IVIU 












UrOOU*t 


National 






0.5 to 2.0 


TTL 5 


Bidirectional Bus Transceiver, Open Collector 


54LS641 


tSlgnstics 


(2772) 










54LS642 


tSlgnetlcs 


(2772) 










74LS641 


Signetics 












74LS641-1 


Signetics 




40 








74LS642 


SIgnellcs 


(2772) 










74LS642-1 


Signetics 


(2772) 










SN54LS621 


tTI 


(976) 










SN54LS622 


tTI 


(976) 










SN54LS641 


tTI 


(984) 










SN54LS642 


tTI 


(984) 










SN54LS644 


tTI 


(984) 








Bidirectional Bus Transceiver, Three-State 


AM7303 


tAMD 












AM7307 


tAMD 












AM7308 


tAMD 




50 








AM8303 


AMD 












AM8307 


AMD 












AM8308 


AMD 












SN54LS645 


tMMI 


(715) 










SN54LS645- 














1 


tMMI 


(715) 










DP7303 


t National 












DP7304B 


t National 












DP7307 


t National 












DP7308 


t National 












DP8303 


National 




60 








DP8304B 


National 












DP8307 


National 












DP8308 


National 












SN54ALS1645tTI 


(1023) 










SN54ALS245 tTI 


(913) 












(Continued) 




t Military Temperature Range (- 


55° to 125°C) 


* Typical Value 









Q) 

•g 
"3 

CD 

■c 
o 

o 

0) 

CD 
CO 



CO 



Bold face Indicates additional data is provided on the page noted. 



2478 



IC IVIASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Line Circuits (Cont'd) 



No. n6C6IVSr 


buppiy 










Per Input 


Voltage, 










Device Threshold, V 


Output V 


Comments 


Device 


Source 




Line 


Line Transceivers- 


— Single Ended 




(Cont'd) 




8 0.5 to 2.0 


HL 5 


Bidirectional Bus Transceiver, Three-State 






^uoni 0^ 










SN54ALS845tTI 


(984) 










SN54LS620 


tTI 


(976) 










SN54LS623 


tTI 


(976) 










SN54LS640 


tTI 


(984) 










SN54LS643 


tTI 


(984) 










SN54LS645 


tTI 


(9841 










SN54SL245 


tTI 






0.6 to 2.0 


TTL 5 


... 

Bidirectionai Bus Transceiver, Open Collector 


SN74LS621 


11 


(976) 










SN74LS622 


Tl 


(976) 










SN74LS641 


Tl 


(984) 


10 








SN74LS641- 














1 


Tl 


(984) 










SN74LS642 


Tl 


(984) 










SN74LS642- 














1 


Tl 


(984) 










SN74LS644 


Tl 


(984) 










SN74LS644- 














1 


Tl 


(984) 








Bidirectional Bus Transceiver, Three-State 


SN74LSd45 


MMI 


(715) 










on iiLoulu- 














1 


MMI 


(715) 










74LS640 


Signetics 












74LS640-1 


Signetics 












74LS645 


Signetics 




20 








SN74LS245 


Tl 


(913) 










SN74LS62Q 


Tl 


(976) 










SN74LS623 


Tl 


(976) 










SN74LS640 


Tl 


(984) 










SN74LS64Q- 














1 


Tl 


(984) 










SN74LS643 


Tl 


(984) 










SH74LS643- 














1 


Tl 


(984) 










SN74LS645 


Tl 


(984) 










SN74LS645- 














1 


Tl 


(984) 




0.7 to 2 


TTL 5 


Bidirectional Bus Transceiver Open Collector 


SN54LS641 


t Motorola 




30 








SN54LS642 


t Motorola 










... 

Bidirectional Bus Transceiver/ReQlster, Open Collector 


SN54LS647 


tTI 


(986) 










SN54LS64g fTI 


(986) 








Bidirectional Bus Transceiver, Three-State 


54LS245 


t Fairchild 












SN54LS245 


t Motorola 












SN54LS640 


t Motorola 












SN54LS645 


t Motorola 












SN54LS646 fTI 


(986) 










SN54LS648 fTI 


(986) 




0.8 to 2.0 


HL 5 


Bidirectional Bus Transceiver, Open Collector 


SN74LS641 


Motorola 




40 








SN74LS642 


Motorola 










Bidirectional Bus Transceiver, Three-State 


74LS245 


Fairchild 












IVI74LS245 


Mitsubishi 












SN74LS245 


Motorola 












SN74LS640 


Motorola 












SN74LS645 


Motorola 












DS3667 


t National 












74LS245 


SIgnellcs 


(779) 










N8T125 


Signetics 












S8T125 


t Signetics 




50 








SN74ALS1645 


Tl 


(1023) 










SN74ALS245 


Tl 


(913) 










SN74ALS645 


Tl 


(984) 










SN74LS646 


Tl 


(986) 










SN74LS648 


Tl 


(986) 





Q) 

13 
O 
C 

o 

•4— » 

o 
CO 

i_ 

0) 

CO 
CO 



t Military Temperature Range (-55° to 125°C) 

®IC MASTER 1983 



* Typical Value 

Bold faca indlcitas additional data Is provided on the paga notad. 



2479 



IC MASTER 



INTERFACE-Line Circuits (Cont'd) 



No. Receiver 
Per input 
Device Thresliold, V 



Output 



Suppiy 
Voitage, 
V 



Line Transceivers — Differential 



TTL 



Designed to meet proposed EIA Standard RS485 



±0.5/±1 V 



TTL 



Independent Three-State 55113 Driver and 55115 Receiver 



Same as 55116 with Three-State Receiver 



Same as 55117 with Three-State Receiver 



Three-State 8 Pin, 40 MA 



DS3695 National (2770) 

083696 National (2770) 

0S3697 National (2770) 

DS3698 National (2770) 



SN55116 
SN75116 



tTI 
Tl 



SN55118 
SN75118 



tTI 
Tl 



SN55119 
SN75119 



tTI 
Tl 



SN55117 
SN75117 



tTI 
Tl 



t Military Tetnperature Range (-55° to 125°C) 

2480 



* Typical Value 

Bold facs indicates additional data is provided on the page noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Memory and Peripheral Drivers 



Function Device 


Source 




Driver, 7 Channel, CMOS/TTL Input (hammer, lamp, relay 


driver) 




(Cont'd) 


9667M 


t Fairchild 




MC1413 


Motorola 


(2753) 


PBD352303 


RIFA 




L203 


SGS 




ULN2003 


Signetics 




SG2003 


Silicon G 




SG3853 


Silicon G 




ULN-2003A 


SpraguB 


(2843) 


ULN-2005A 


Sprague 


(2843) 


ULN-2013A 


Spragua 


(2843) 


ULN-2015A 


Spragae 


(2843) 


ULN-2023A 


Spragua 


(2843) 


ULN-2025A 


Spragua 


(2843) 


ULS-2003H 


tSprague 




ULS-2005H 


t Sprague 




ULS-2013H 


tSprague 




ULS-2015H 


t Sprague 




ULS-2023H 


t Sprague 




ULS-2025H 


t Sprague 




SN75468 


Tl 




ULN2003A 


Tl 




Driver, 7 Channel, MOS/TTL Input (hammer, lamp. 


relay 


driver) XR2201 


Exar 


(3200) 


XR2201M 


t Exar 


(3200) 


9665 


Fairchild 




MC1411 


Motorola 


(2753) 


PBD352301 


RIFA 




L201 


SGS 




ULN2001 


Signetics 




SG2001 


Silicon G 




SG3851 


Silicone 




ULN-2001A 


Spragua 


(2843) 


ULN-2011A 


Sprague 


(2843) 


ULN-2021A 


Spragua 


(2843) 


ULS-2001H 


t Sprague 




ULS-2011H 


tSprague 




ULS-2012H 


t Sprague 




SN75466 


Tl 




ULN2001A 


Tl 




Driver, 7 Channel, PMOS Input (hammer, lamp, relay 


driver) XR2202 


Exar 


(3200) 


XR2202M 


fExar 


(3200) 


9666 


Fairchild 




g666M 


t Fairchild 




MC1412 


Motorola 


(2753) 


PBD352302 


RIFA 




L202 


SGS 




SG2002 


Silicon G 




SG3852 


Silicon G 




ULN-2002A 


Spragua 


(2843) 


ULN-2012A 


Spragua 


(2843) 


ULN-2022A 


Sprague 


(2843) 


ULS-2002H 


t Sprague 




ULS-2022H 


t Sprague 




SN75467 


Tl 




ULN2002A 


Tl 




Driver, 8 Channel, CMOS/PMOS Input (hammer, lamp, relay 


driver) ULN2804 


Motorola 




ULN-2804A 


Sprague 


(2843) 


ULN-2814A 


Sprague 


(2843) 


ULN-2824A 


Sprague 


(2843) 


ULS-2804H 


t Sprague 




ULS-2814H 


t Sprague 




ULS-2824H 


t Sprague 




Driver, 8 Channel, CMOS/PMOS Input (lamp, relay driver) 


UDN-2982A 


Spragua 


(2843) 


UDN-2984A 


Sprague 


(2843) 


UDS-2982H 


t Sprague 




UDS-2984H 


t Sprague 





Memory & Peripheral Drivers 



Addressable Peripheral Driver (latched, 8-output driver) 
NE590 Signetics 
NE591 Signetics 
SE590 t Signetics 



BiMOS Latched Driver 

UCS-4401H t Sprague 

UCS-4801H Sprague 



Bridged Motor Driver 

MD346 



Analog Sys 



Clock Generator/Oscillator, to 10 MHz, 8 and 1 Divider, for 
Microprocessors 

ICM7209 t Intersil 



Data Acquisition Controller (intelligent) for A/D Converter 
CY600 Cybernetic 



Disc Memory Read/Write 
mPC751 
^PC752 



NEC-Electron 
NEC-Electron 



Driver, Half Bridge, 2 A 
SG1635 
SG3635 



t Silicon G 
Silicon G 



Driver, Open Collector/Emitter, for 150 mA (load connected 
to negative supply) 

PBD3520 RIFA 



Driver, Serial lnput/16-Bit Parallel Output, High-Voltage, 
High-Current Outputs 

TSC9403 Teledyoe S (2854) 

TSC9404 TeledyneS (2854) 



Driver, to 80 V, 0.2 A 
DI445 



Oionics 



Driver, Single, 125 mA, for Relays, Motors, Lamps 
PBD3510 RIFA 
PBD3511 RIFA 



Driver, Dual, to 80 V, 0.2 A 
DI446 



Dionics 



Driver, Dual, 2-lnput, Sink or Source 500 mA 

SG1627 t Silicon G 

SG3627 Silicon G 



Driver, 5 Channel, CMOS/PMOS Input (lamp, relay driver, 
load to negative supply) 

UDN-2956A Spragua (2843) 



Driver, 5 Channel, CMOS/TTL Input (lamp, relay driver, 
load to negative supply) 

UDH-2957A Sprague (2843) 



Driver, 5 Channel Darlington, to 400 mA 

XR2200 Exar 
XR2200M t Exar 

LB1287 Sanyo 

LB 1288 Sanyo 



Driver, 7 Channel, CMOS/PMOS 
driver) MD402 
XR2204 
XR2204M 
9668 
9668M 
MC1416 
PBD352304 
ULN2004 ■ 
ULN-2004A 
ULN-2014A 
ULN-2024A 
ULS-2004H 
ULS-2014H 
ULS-2024H 
SN75469 
ULN2004A 



Input (hammer, lamp, relay 

Analog Sys 

Exar (3200) 
t Exar (3200) 

Fairchild 
t Fairchild 

Motorola (2753) 

RIFA 

Signetics ■ 
Spragua (2843) 
Sprague (2843) 
Spragua (2843) 

t Sprague 
t Sprague 
t Sprague 

Tl 

Tl 



Driver, 7 Channel, CMOS/TTL Input (hammer, lamp, relay 
driver) XR2003M fExar (3199) 

XR2203 Exar (3200) 

9667 Fairchild 

(Continued) 



40 



Driver, 8 Channel, CMOS/TTL Input (hammer, lamp, relay 



50 



60 



70 



80 



90 



100 



driver) ULN2803 


Motorola 


NE5090 


Signetics 


SE5090 


Signetics 


ULN-2803A 


Spragua (2843) 


ULN-2805A 


Sprague (2843) 


ULN-2813A 


Sprague (2843) 


ULN-2815A 


Sprague (2843) 


ULN-2823A 


Sprague (2843) 


ULN-2825A 


Spragua (2843) 


ULS-2803H 


tSprague 


ULS-2805H 


t Sprague 


ULS-2813H 


tSprague 


ULS-2815H 


t Sprague 


ULS-2823H 


t Sprague 


ULS-2825H 


t Sprague 


Driver, 8 Channel, CMOS/TTL Input (lamps, relay driver) 


UDN-2981A 


Sprague (2843) 


UDN-2983A 


Spragua (2843) 


UDS-2981H 


t Sprague 


UDS-2983H 


t Sprague 


Driver, 8 Channel, MOS/TTL Input (hammer, lamp, relay 


driver) ULN2801 


Motorola 


ULN-2B01A 


Spragua (2843) 


ULN-2811A 


Sprague (2843) 


ULN-2821A 


Sprague (2843) 


ULS-2801H 


t Sprague 


ULS-2811H 


t Sprague 


ULS-2821H 


t Sprague 


Driver, 8 Channel, PMOS Input (hammer, lamp, relay 


driver) ULN2802 


Motorola 


ULN-2802A 


Sprague (2843) 


ULN-Z812A 


Sprague (2843) 


ULN-2822A 


Sprague (2843) 


ULS-2802H 


t Sprague 


. ULS-2812H 


t Sprague 


ULS-2822H 


t Sprague 


Driver, 8-Channel Current-Sink Driver 


UDN-2595A 


Sprague (2843) 


Driver, 10-Bit, High-Voltage, High-Current 


S4534 


AMI 


Driver, 32-Bit for Displays, Relays, Solenoids, Print Heads 


and Motors S4521 


AMI 


S4535 


AMI 


Dynamic RAM Controller 




TMS4500A 


Tl ' (3960) 


WD8207 


Western (3996) 


Dynamic RAM Controller/Driver 




DP8408 


MM! (727) 


SN74S408 


MMI (727) 


SN74S408-3 


MM! (727.727) 


Gated Decoder, for SS1 104/5 




SS1 106 


Silicon Sys 


Hammer Driver (to 6 A-pulsed output; 




DH0028C 


National (3344) 


High Current Switch Driver (to drive high power, high 


speed NPN switching transistors) 




SG1629 


t Silicon G 


SG3629 


Silicon G 


High-Voltage Source Drivers 




U0N-6510A 


Sprague (2843) 


UDN-6S14A 


Spragua (2843) 


Memory Driver Dual, 400 mA Sink/Source, Decode (for 


magnetic memories) 




DS3629 


National 



Memory Driver, Dual 600 mA Sink/Source 



110 



MC55325 
MC75325 
DS55325 
DS75325 
SG55325 



t Motorola 

Motorola 
t National 

National 
t Silicon G 

(Continued) 



120 



130 




■*—• 



140 



150 



160 



t Military Temperature Range ( - 55° to 125°C) 



IC MASTER 1983 



* Typical Value 

Bold face indicates additional data is provided on the page noted. 



2481 



IC MASTER 



INTERFACE-Memory and Peripheral Drivers (Cont'd) 



Function Device 


Source 


Dual ECL tom/MOS Driver 




SN75441 


Tl 


Dual Inverter, to 40 V, 2 A 




LPD4105 


Lambda 


Dual Memory Driver, 400 mA Sink (for magnetic memories) 


MC4043 


Motorola 


Dual MOS Clock Driver 




0026 


Fairchild 


MMH0026 


t Motorola 


MMM0026C 


Motorola 


DS0025 


t National 


DS0025C 


National 


DS0026 


t National 


DS0026C 


National 


DS0056 


t National 


DS0056C 


National 


MH0009 


t National 


MMOOOgC 


National 


MH0013 


t National 


MH0013C 


National 


SN55369 


tTI 


SN75369 


Tl 


Dual MOS Clock Driver, Bootstrapped for Single Supply 


Systems DS1642 


National 


DS1671 


National 


DS1672 


National 


Dual NAND Driver, HNIL, 250 mA, Open Collector 


392A/C 


Teledyne S 


Dual NOR Driver, HNIL, 250 mA, Open Collector 


394A/C 


Teledyne S 


Dual OR Driver, HNIL, 250 mA, Open Collector 


393A/C 


Teledyne S 


Dual Peripheral AND Driver 




55450B 


t Fairchild 


75450B 


Fairchild 


75451A 


Fairchild 


7545 1B 


Fairchild 


75461 


Fairchild 


75471 


Fairchild 


HD75450A 


Hitachi 


HD75451A 


Hitachi 


MC75450 


Motorola 


MC75451 


Motorola 


MC75461 


Motorola 


SN75451B 


Motorola 


DS55450 


t National 


DS55451 


t National 


DS55461 


t National 


DS75450 


National 


DS75451 


National 


DS75461 


National 


PBD3513 


RIFA 


SG55450. 


t Silicon G 


SG55450B 


t Silicon G 


SG55451 


t Silicon G 


SG55460 


t Silicon G 


SG55460B 


t Silicon G 


SG55461 


t Silicon G 


SG75450 


Silicon G 


SG75450B 


Silicon G 


SG75451 


Silicon G 


SG75460 


Silicon G 


SG75460B 


Silicon G 


SG75461 


Silicon G 


SN55450B 


tTI 


SN55451B 


tTI 


SN55460 


tTI 


SN55461 


tTI 


SN55470 


tTI 


SN55471 


tTI 


SN75401 


Tl 


SN75411 


Tl 



Memory & Peripheral Drivers 

(Cont'd) 



Memory Driver, Dual 600 mA Sink/Source 



(Cont'd) 



SG75325 
SN55325 
SN75325 



Silicon G 
tTI 
Tl 



Memory Driver, Quad, 600 mA Sink 

SG55326 t Silicone 

SG55327 t Silicone 

SG75326 Silicon G 

SG75327 Silicon G 

SN55326 tTI 

SN55327 tTI 

SN75326 Tl 

SN75327 Tl 



Memory Sv/itch, Quad, 600 mA Sink/Source 
SN75328 Tl 



Modified Frequency Modulation Decoder Data Separator 



DP8460 



National (2766) 



MOS Clock Driver 



MH0007 
MH0007C 
MH0012 
MH0012C 



t National 
National 

t National 
National 



MOS Dynamic Memory, Address Refresh Logic Circuitry 
MC8505 Motorola 



MOS Dynamic Memory Interface, Microprocessor to 16 K 
RAM MC3480 Motorola 



MOS Dynamic Memory, 4 K Address Multiplexer and 

Refresh Counter 

96LS32 t Fairchild 

96LS32C Fairchild 
MC3232A Motorola 



MOS Dynamic Memory, 16 K Address Multiplexer and 

Refresh Counter 

96LS42C Fairchild 
96LS42M t Fairchild 

MC3242A Motorola 



Motor Controller (intelligent) for 4-Phase Stepper Motors 
CY500 Cybernetic 
CY512 Cybernetic 



Multi-Mode Dynamic RAM Controller/Driver 

DP8408 National 
DP8409 National (2765) 



Power Peripheral Driver, CMOS/TTL Input (to 150 V, 

versions: 0.01 to 16 A) 

VF-01 Supertex 

VF-02 Supertex 

VF-03 Supertex 

VF-12 Supertex 

VF-13 Supertex 



Power Peripheral Drivers 
VN10KE 
VN10KM 
VN46AF 
VN64GA 
VN66AF 
VN88AF 



Siliconix 
Siliconix 
Siliconix 
Siliconix 
Siliconix 
Siliconix 



Printer Controller, for 5x7 Dot Matrix Printers 

CY480 Cybernetic 



Printer Driver, 5 Channel 
HD2919 



Hitachi 



Printer Solenoid Driver 
DS3654 



National 



Printing Calculator Circuits 
DS8654 
DS8656 
DS8692 



National 
National 
National 

(Continued) 



20 



30 



40 



Printing Calculator Circuits 

DS8693 
DS8694 



(Cont'd) 



National 
National 



Relay Driver, to 65 V, Sinks 300 mA, OR Input for 48 V 

Telephone Relays 

DS1686 t National 

DS1687 t National 

DS3686 National 
DS3687 National 



Relay Driver, to 70 V, 500 mA 




CSR301 


Teledyne C 


Relay Driver, 5 Channel, to 65 V, 70 mA 




in7163 


in 


in7164 


in 


Solenoid Driver MC3484V2 


Tl 


MC3484V4 


Tl 


Thermal Print Head Driver 




SN75270 


Tl 


SN75490 


Tl 


SN75590 


Tl 


m to MOS Shifter 


Winchester Disc Memory Fault Detector 


SS1 103 


Silicon Sys 


Winchester Disc Memory Head Read/Write Circuit, for thin 


film heads SS1 114 


Silicon Sys 


Winchester Disc Memory Head Selector 




SS1 102 


Silicon Sys 


'Winchester Disc Memory Read/Write Circuit 


SS1 104 


Silicon Sys 


Winchester Disc Memory Video Amplifier, for Magnetic 


Servo Head SS1 101 A 


Silicon Sys 


Winchester Disc Memory Video Amplifier, for Thin Film 


Magnetic Heads 




SS1 116 


Silicon Sys 



Winchester Disk Memory Read/Write Circuit 

MB4111 Fujitsu 

MB4112 Fujitsu 

SS1 105 Silicon Sys 

SS1 108 Silicon Sys 

551 114 Silicon Sys 

551 115 Silicon Sys 



Winchester Read/Write Circuit, 6-Channel 

SS1 117 Silicon Sys 



Dual AND Driver, HNIL, 250 mA, Open Collector 

391A/C Teledyne S 



Dual AND TTL to MOS Driver (NMOS memory interface) 
9643 Fairchild 
SN55363 t Tl 

SN75322 Tl 
SN75363 Tl 



Dual Buffer, to 40 V, 2 A 
LPD4106 



Lambda 



Dual CCD Memory Driver, with Enable Inputs 
SN75430 Tl 



Dual CCD Memory Driver, with Enable Inputs and Protect 
SN75431 Tl 



Dual Channel ECL to MOS Driver (MOS memory interface 
MC75358 Motorola 
MC75368 Motorola 



Dual Channel TTL to MOS Memory Interface (for TMS4062, 
AMS6002, etc.) 

SN75370 Tl 



Dual CMOS or TTL Driver/Translator, up to 30 V 
IH6201C Intersil 
IH6201M t Intersil 



Dual Darlington Switch, to 80 V, 1.5 A 

ULN-Z061M SpraguB (2843) 

ULN-2062M Spragus (2843) 



50 



60 



70 



80 



(Continued) 



90 



100 



110 



120 



130 



140 



150 



t Military Temperature Range (-55° to 125°C) 



2482 



* Typical Value 

Bold face Indlcatas additional data Is provldad on lha paga noted. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Memory and Peripheral Drivers (Cont'd) 



Function Device 


Source 




Dual Peripheral NOR Driver 






75474 B 


rairchiiQ 












IVIUIUI Uld 






IVIULUi Ula 




oil 1 OnOnD 


Motorola 




r\<Z^^A^A 


National 




n^^^ARA 


"I* National 




D^l^ARA 
UOl u*t3T 


lidlluilal 






National 






+ Cilirnn R 






1 OIIIUUII u 






OINIjUII u 






Cjlipnn (1 
OIIIUUll U 






+ Tl 
T 1 ' 




oil J J'tU*t 


+ Tl 




SN55474 


f Tl 




SN75404 


Tl 




SN7S407 


Tl 


(2855) 


SN75414 


Tl 




SN75434 


Tl 




SN75449 


Tl 




SN75454B 


Tl 




SN75464 


Tl 




SN75474 


Tl 




SN75479 


Tl 




Dual Peripheral NOR Driver, for CMOS 






DS1634 


t National 




DS3634 


National 




Dual Peripheral NOR Driver, to 30 V, 300 mA 




SN75479 


Tl 




Dual Peripheral NOR Driver, to 30 V, 500 mA 




SN75419 


Tl 




Dual Peripheral NOR Driver, to 80 V, 300 mA 




DS1614 


t National 




DS3614 


National 




UDN-3614M 


Spragua 


(2843) 


UDN-5714M 


Spragua 


(2843) 


UDS-3614H 


tSprague 




UDS-5714H 


t Sprague 




Dual Peripheral OR Driver 






75453A/B 


Fairchlld 




HD75453 


Hitachi 




MC75453 


Motorola 




MC75463 


Motorola 




SN75453B 


Motorola 




DS55453 


t National 




DS55463 


t National 




DS75453 


National 




DS75463 


National 




SG55453 


Silicon G 




SG55463 


Silicon G 




SG75453 


Silicon G 




SG75463 


Silicon G 




SN55453B 


tTI 




SN55463 


tTI 




SN55473 


tTI 




SN75403 


Tl 




SN75408 


Tl 


(2855) 


SN75413 


Tl 




SN75433 


Tl 




SN75448 


Tl 




SN75453B 


Tl 




SN75463 


Tl 




SN75473 


Tl 




SN75478 


Tl 




Dual Peripheral OR Driver, ECL Input 






SN75441 


Tl 




Dual Peripheral OR Driver, for CIWOS 






DS1633 


t National 




DS3633 


National 





Function Device 


Source 




Dual Peripheral OR Driver, to 30 V, 300 mA 




SN75478 


Tl 




Dual Peripheral OR Driver, to 30 V, 500 mA 




SN75418 


Tl 




Dual Peripheral OR Driver, to 80 V, 300 mA 




DS1613 


t National 




DS3613 


National 




UDN-3613M 


Spragua 


(2843) 


UDN-5713M 


Spragua 


(2843) 


UDS-3613H 


t Sprague 




UDS-5713H 


t Sprague 




Dual Power MOSFET Driver 






TSC450C 


TaladynaS (2845) 


TSC450M 


t Taladyna S (2845) 


Dual TTL to MOS Driver (MOS memory interface) 




DS75361 


National 




DS75362 


National 




MH8805 


National 




SN75350 


Tl 




SN75361A 


Tl 




Dual 2-lnput AND Power Driver (40 V, 2 A) • 




LPD4101 


Lambda 




Dual 2-lnput NAND Power Driver (40 V, 2 A) 




LPD4102 


Lambda 




Dual 2-lnput NOR Power Driver (40 V, 2 A) 




LPD4103 


Lambda 




Dual 2-lnput OR Power Driver (40 V, 2 A) 




LPD4104 


Lambda 




Dual 4-lnput AND Driver, HNIL 250 mA Open Collector 


390A/G 


Teledyne S 




Dual 4-lnput NAND Driver, HNIL, 250 mA Open Collector 


395A/C 


Teledyne S 




Quad Darlington Switch, to 50 V, 1.5 A 




SN75064 


Tl 




SN75066 


Tl 




SN75068 


Tl 




Quad Darlington Switch, to 80 V, 


1.5 A 




SG2064 


Silicon G 




SG2065 


Silicon G 




SG2066 


Silicon G 




SG2067 


Silicon G 




SG2068 


Silicon G 




SG2069 


Silicon G 




SG2070 


Silicon G 




SG2071 


Silicon G 




SG2072 


Silicon G 




SG2073 


Silicon G 




SG2074 


Silicon G 




SG2075 


Silicon G 




SG2076 


Silicon G 




SG2077 


Silicon G 




ULN-2064B 


Spragua 


(2843) 


ULN-2065B 


Spragua 


(2843) 


ULN-2066B 


Spragua 


(2843) 


ULN-2067B 


Sprague 


(2843) 


ULN-2068B 


Spragua 


(2843) 


ULN-2069B 


Sprague 


(2843) 


ULN-2070B 


Sprague 


(2843) 


ULN-2071B 


Spragua 


(2843) 


ULN-Z074B 


Sprague 


(2843) 


ULN-2075B 


Spragua 


(2843) 


ULN-2076B 


Sprague 


(2843) 


ULN-2077B 


Spragua 


(2843) 


ULS-2064H 


t Sprague 




ULS-2065H 


t Sprague 




ULS-2066H 


t Sprague 




ULS-2067H 


t Sprague 




ULS-2068H 


t Sprague 




ULS-2069H 


tSprague 




ULS-2070H 


t Sprague 




ULS-2071H 


t Sprague 






(Continued) 



Memory & Peripheral Drivers 






(Cont'd) 


Dual Peripheral AND Driver 










(uoni u; 


SN75450B 


Tl 




SN75451B 


Tl 




SN75460 


Tl 




SN75461 


Tl 




SN75466 


Tl 




SN75470 


Tl 




SN75471 


Tl 




SN75476 


Tl 




Dual Peripheral AND Driver, for CMOS 




DS1631 


t National 




DS3631 


National 




Dual Peripheral AND Driver, to 70 V 300 mA 




SN75446 


Tl 




Dual Peripheral AND Driver, to 70 V 500 mA 




SN75416 


Tl 




Dual Peripheral AND Driver, to 80 V 300 mA 




DS1611 


t National 




DS3611 


National 




UDN-3611M 


Sprague 


(2843) 


UBN-5711M 


Sprague 


(2843) 


UDS-3611H 


t Sprague 




UDS-5711H 


t Sprague 




Dual Peripheral NAND Driver 






55452B 


t Fairchlld 




75452A 


Fairchild 




75452B 


Fairchlld 




75462 


Fairchild 




75472 


Fairchild 




HD75452 


Hitachi 




MC75452 


Motorola 




MC75462 


Motorola 




SN75452B 


Motorola 




DS55452 


t National 




DS55462 


t National 




DS75452 


National 




DS75462 


National 




SG55452 


t Silicon G 




SG55462 


t Silicon G 




SG75452 


Silicon G 




SG75462 


Silicon G 




SN55452B 


tTI 




SN55462 


tTI 




SN55472 


tTI 




SN75402 


Tl 




SN75407 


Tl 




SN75412 


Tl 




SN75432 


Tl 




SN75447 


Tl 




SN75452B . 


Tl 




SN75462 


Tl 




SN75472 


Tl 




Dual Peripheral NAND Driver, for CMOS 




DS1632 


t National 




DS3632 


National 




Dual Peripheral NAND Driver, to 70 V, 300 mA 




MC1472 


Motorola 




UDN-5722M 


Sprague 




SN75477 


Tl 




Dual Peripheral NAND Driver, to 70 V, 500 mA 




SN75417 


Tl 




Dual Peripheral NAND Driver, to 80 V, 300 mA 




DS1612 


t National 




DS3612 


National 




UDN-3612M 


Sprague 


(2843) 


UBN-5712M 


Spragua 


(2843) 


UDS-3612H 


t Sprague 




UDS-5712H 


t Sprague 





30 



40 



50 



60 



90 



100 



110 



120 



130 



;a 

"zj 

O 

c 
o 

o 


CO 

i_ 

s 

00 
CO 



140 



150 



160 



170 



t Military Temperature Range (-55° to 125°C) 



IC MASTER 1983 



* Typical Value 

Bold face indicates additional data is provided on tiie page noted. 



2483 



IC MASTER 



INTERFACE-Memory and Peripheral Drivers (Cont'd) 



Memory & Peripheral Drivers 






(Cont'd) 


Quad Darlington Switch, to 80 V, 1.5 A 








(Cont'd) 


ULS-2074H 


t Sprague 




ULS-2075H 


t Sprague 




ULS-2076H- 


t Sprague 




ULS-2077H 


Sprague 




SN75065 


Tt 




SN75067 


Tl 




SN75069 


Tl 




ULN2064 


Tl 




ULN2065 


Tl 




ULN2066 


Tl 




ULN2067 


Tl 




ULN2068 


Tl 




ULN2069 


Tl 




ULN2074 


Tl 




ULN2075 


Tl 




Quad Darlington Switch, to -50 V, 1.75 A 




SG2841 


Silicon G 




Quad ECL to MOS Clock Driver 






HD2922 


Hitachi 




Quad High Current Peripheral Driver 






DS3658 


Nallonil 


(2769) 


SN75436 


n 


(2856) 


SN75437A 


Tl 


(2856) 


SN75438 


Tl 


(2856) 


Quad Latch/Driver 






IWD121 


Analog Sys 


UCN-4401A 


Spragui 


(2843) 


UGS-4401H 


t Sprague 




Quad MOS Clock Driver 






DS3245 


National 




Quad, MOS Memory Decoder/Clock Driver 




DS36143 


National 




Quad MOS Memory I/O Register 






DS16147 


t National 




DS16177 


t National 




DS1647 


t National 




DS1677 


t National 




DS36147 


National 




DS36177 


National 




DS3647 


National 




DS3677 


National 




Quad Multiplexer/Driver, for MOS Systems 




DS1648 


t National 




DS1678 


t National 




DS3648 


National 




DS3678 


National 




Quad NAND TTL to MOS Driver (MOS memory interface- 


clock driver) HD2912 


Hitachi 




HD2916 


Hitachi 




MC75365 


Motorola 




DS75365 


National 




3207A 


Signetics 




3207A-1 


Signetics 




SN55355 


tTI 




SN55365 


tTI 




SN75365 


Tl 




SN75375 


Tl 




Quad Negative Voltage Relay Driver 






DS3680 


National 




DS3680 


Tl 




Quad NMOS Memory Driver 






MC3459 


Motorola 




MC3460 


Motorola 




DS1644 


t National 




DS1674 


t National 




DS36144 


National 






(Continued) 



Device 



Source 




"D 

*I3 

CD 

c 
o 

o 

Q) 
<D 
CO 

w_ 

CD 

03 



Quad NMOS Memory Driver 

DS3644 
DS3674 



(Cont'd) 



National 
National 



Quad PIN Diode Driver (also see: 
UDS-57gOH 
UDS-5791H 



linear-other devices) 
t Sprague (2843) 
t Sprague (2843) 



Quad Port Driver, for 5270 RAM 

DS1640 t National 

DS1670 t National 



Quad Power Driver, with Enable, 
UDN-2540B 



Sinks 500 mA 

Sprague (2843) 



20 



Quad Power Peripheral Driver 
VN2410 
VN3500 
VN3501 
VN4000 
VQ1000 
VQ1001 
V01004 
V01006 
VQ2001 
VQ2004 
VQ2006 
VQ3001 
VQ7254 
VC01 
VC02 
VC13 
VQ1000 



Siliconix 
Siiiconix 
Siliconix 
Siiiconix 

Siliconix (2835) 

Siiiconix 

Siliconix (2837) 
Siliconix (2837) 

Siiiconix 
Siiiconix 

Siliconix (2839) 
Siliconix (2841) 

Siiiconix 
Supertex 
Supertex 
Supertex 
Supertex 



Quad Predriver, Open Collector, 50 mA Sink (for magnetic 
memories) MC4042 Motorola 



Quad TTL to MOS Driver, Three-State 
SN75367 



Tl 



Quad TTL to NMOS Memory Driver (for 2105, 2107, etc.) 
3245 Fairchild 
9645 Fairchild 
3245 Intel 



30 



Quad TTL to NMOS Memory Driver (for 7001, etc.) 

MC3466 Motorola 



Quad 2-lnput AND Driver (to 70 V, sinks 300 mA) 
UDN-57G6A Spragua 

UDS-5706H t Sprague 



(2843) 



Quad 2-lnput AND Power Driver, Open Collector (to 100 V, 
sinks 500 mA) 



40 



UHC/D-400 

UHC/D-406 

UHC/D-500 

UHC/D-506 

UHP-400 

UHP-406 

UHP-500 

UHP-506 



t Sprague 
t Sprague 

Sprague 

Sprague 

Sprague (2843) 
Spragua (2843) 
Sprague (2843) 
Spragua (2843) 



Quad 2-lnput NAND Driver (for 70 V, sinks 300 mA) 

UDN-5707A Spragua (2843) 

UDS-5707H t Sprague 



Quad 2-tnput NAND Driver, to 30 V, sinks 250 mA 
MC693 Motorola 



50 



Quad 2-lnput NAND Power Driver, Open Collector, to 100 
V, Sinks 500 mA 

UHC/D-407 t Sprague 

UHC/D-408 t Sprague 

UHC/D-507 t Sprague 

UHC/D-508 t Sprague 
UHP-407 Spragua (2843) 

UHP-408 Spragua (2843) 

UHP-507 Spragua (2843) 

UHP-508 Sprague (2843) 



Quad 2-lnput NOR Driver, to 70 V, Sinks 300 mA 

UDN-5733A Spragua (2843) 

UDN-5733M Spragua (2843) 

UDS-5733H f Sprague 



Quad 2-input NOR Power Driver, Open Collector, to 100 V, 



60 



Sinks 500 mA UHC/D-432 
UHC/D-433 
UHC/D-532 
UHC/D-533 
UHP-432 
UHP-433 
UHP-532 
UHP-533 



t Sprague 

t Sprague 

t Sprague 

t Sprague 
Sprague (2843) 
Spragua (2843) 
Spragua (2843) 
Spragua (2843) 



Quad 2-lnput OR Driver, to 70 V, Sinks 300 mA 
UDN-5703A Spragua 

UDS-5703H t Sprague 



(2843) 



Quad 2-input OR Power Driver, Open Collector, to 100 V, 



70 



Sinks 500 mA UHC/D-402 
UHC/D-403 
UHC/D-502 
UHC/D-503 
UHP-402 
UHP-403 
UHP-S02 
UHP-503 



t Sprague 
t Sprague 

Sprague 

Sprague 

Spragua (2843) 
Spragua (2843) 
Spragua (2843) 
Spragua (2843) 



Hex Driver, CMOS/TTL (line, LED, Relay Driver) 

MD-210 Analog Sys 



Hex inverter/MOS Driver, Disable Causes Logic 1 State 



80 



DS16149 

DS16179 

DS36149 

DS36179 

SN54S436 

SN54S437 

SN74S436 

SN74S437 



t National 
t National 

National 

National 
tTI 
tTI 

Tl 

Tl 



(947) 
(947) 
(947) 
(947) 



Hex Inverter/MOS Driver, Three-State 

DS1649 t National 

DS1679 t National 

DS3649 National 
DS3679 National 



Hex Latch/Driver, for MOS Memories 

DS1645 t National 

DS1675 t National 

DS3645 National 

DS3675 National 



Hex Universal Driver (400 mA) 
NE582-1 



Signetics 



90 



Octal Dynamic Memory Driver, Three-State 
AM2965C AMD 
AM^gSSM t AMD 

AM2966C AMD 
AM2966M f AMD 



Octal Dynamic RAM Driver, Three-State 



SN54S700 
SH54S730 
SN54S731 
SN54S734 
SN74S7G0 
SN74S730 
SN74S731 
SN74S734 



tMMI 
tMMI 
t MMI 
tMMI 
MMI 
MMI 
MMI 
MMI 



(728) 
(728) 
(728) 
(728) 
(728) 
(728) 
(728) 
(728) 



100 



Octal High-Voitage Driver for Electrostatic Printers 
DH0069 National 



(3344) 



Octal Latched Peripheral Driver 

DP7310 National 

DP7311 National 

DP8310 National 

DP8311 National 



110 



120 



130 



140 



150 



160 



t Military Temperature Range (-55° to 125°C) 



2484 



* Typical Value 

Bold face Indlcalas additional data Is provided oh the paga noted. 



IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Memory and Peripheral Drivers (Cont'd) 



Memory & Peripheral Drivers 

(Cont'd) 



Octal MOS Driver, Three-State 
0P84240 
DP84244 

DS1628 
DS3628 



National (2767) 
National (2767) 

t National 
National 



Two Phase Osciilator/Clock Driver (for MOS systems) 
DS7803 t National 

DS7807 t National 

DS8803 National 
DS8807 , National 



Eight Latch/Drivers 

UCN-4801A Spraguo 

UCS4801H t Sprague 



(2843) 



4-lnput AND Current Driver (45 V, to 1.5 A peak) 

DH0006 t National (3344) 

DH0006C National (3344) 



4-lnput AND High Voltage-High Current Driver (4.5 V, to 3 
Apeak) DH0008 f National (3344) 

DH0008C National (3344) 



4-lnput NAND High Voltage, High Current Drivers (40 V, 
0.15 to 0.25 A) 

DH0011 t National (3344) 
DH0011C National (3344) 



4-lnput NAND High Voltage, High Current Drivers (50, 70 
or 100 V, 0.25 to 0.5 A) 



DHOOnC 


National 


(3344) 


DH0018C 


National 


(3344) 


6-Bit MOS Refresh Counter/Driver 






DS1646 


t National 




OS 1676 


t National 




8-Bit Serial input, Latched Sink Driver 




UCN-4821A 


Spriguo 


(2843) 


UCN-4822A 


Spraguo 


(2843) 


UCN-4823A 


Sprague 


(2843) 


UCS-4821H 


t Sprague 




UCS-4822H 


t Sprague 




UCS-4823H 


t Sprague 





■g 
"3 

O 

c 
o 

o 

Q) 
Q) 
CO 

1_ 


■+— ' 

CO 



t Military Temperature Range (-55° to 125°C) 

®IC MASTER 1983 



* Typical Value 

Bold face Indicates additional data is provided on tiie page noted. 



2485 



IC MASTER 



INTERFACE-Sense Amplifiers 



Sense Amplifiers 



MOS to TTL Level Converter, High Speed, Three-State 

MC4000 Motorola (729) 

MC4300 t Motorola (729) 



Translators: See also Digltal-TTL (Translators) 



Dual Core Memory Sense Amplifier, Complementary 

Output, Latch Capability 

55S20 Fairchild 

75S20 t Fairchild 

SG5520 t Silicon G 

SG5521 t Silicon G 

SG7520 Silicon G 

SG7521 Silicon G 

SN5520 tTI 



Dual Core Memory Sense Amplifier/Data Register 
SG55236 t Silicon G 

SG75236 Silicon G 

SN55236 t Tl 

SN55237 tTI 



Dual Core Memory Sense Amplifier, Separate Inverted 
Outputs 55S234 Fairchild 
75S234 t Fairchild 

SN55234 tTI 
SN75234 Tl 



Dual Core Memory Sense Amplifier, Separate Inverted 
Outputs, Test Points 

75239 Fairchild 



Dual Core Memory Sense Amplifier, Separate Open 

Collector Outputs 

SG5534 t Silicon G 

SG5535 t Silicon G 

SG7534 Silicon G 

SG7535 Silicon G 

SN55232 t Tl 



Dual Core Memory Sense Amplifier, Separate Open 

Collector Outputs, Test Points 

SG5538 t Silicon G 

SG5539 t Silicon G 

SG7538 , Silicon G 

SG7539 Silicon 6 



Dual Core Memory Sense Amplifier, 
55S24 
75S24 
. HA1902 
SG5524 
SG5525 
SG7524 
SG7525 
SN5524 



Separate Outputs 
Fairchild 

t Fairchild 
Hitachi 

t Silicon G 

t Silicon G 
Silicon G 
Silicon G 

tTI 



Dual Core Memory Sense Amplifier, 
Points SG5528 
SG5529 
SG7528 
SG7529 
SN5528 



Separate Outputs, Test 
t Silicon G 
t Silicon G 

Silicon G 

Silicon G 
tTI 



Dual Core Memory Sense Amplifier, 
Output SG5522 

SG5523 

SG7522 

SG7523 

SN5522 



Single Open Collector 
t Silicon G 

Silicon G 

Silicon G 

Silicon G 
tTI 



Dual Formatter/Sense Amplifier for 
7242 



Bubble Memories 
Intel 



Dual MOS to TTL Level Converter, Latch, Three-State 
(Sense Amp) MC4068 , Motorola 

MC4368 t Motorola 

MC54468 t Motorola 

MC74468 Motorola 
N8T25 Silicon G 



20 



30 



40 



50 



Function Device 


Source 


Dual Sense Amplifier (for MOS memory or line receiver) 


DS75207 


National 


DS75208 


National 


SN75207 


Tl 


SN75208 


Tl 


DS3604 


National 


DS1603 


t National 


DS3603 


National 


Dual Sense Amplifier (NMOS memories to ECL 10K) 


HD103461 


Hitachi 


MC3461 


Motorola 


Quad Sense Ampllfer, Three-State 




MC3430 


Motorola 


MC3431 


Motorola 


MC3432 


Motorola 


MC3433 


Motorola 


DS1651 


t National 


DS1653 


t National 


DS3651 


National 


DS3653 


National 


Hex MOS Sense Amplifier (MOS to TTL Converter) Three- 


State DS3605 


National 


DS3606 


National 


DS3607 


National 


DS3608 


National 



Octal Core Memory Driver 
SN55329 



tTI 



4-lnput Sense Amplifier (for plated wire or thick/thin film 
memories) MC1444 Motorola 
MC1544 t Motorola 



70 



t Military Temperature Range (-55° to 125°C) 

2486 



* Typical Value 

Bold fico Indlcilts iddlllonal data Is provided on the pago noted. 



® IC MASTER 1983 



MASTER SELECTION GUIDE 



INTERFACE-Transmitters-Receivers 



Max Serial 


Supply 








Data Rate 


Voltage, 








Function in kHz 


V 


Device . 


Source 




Line 


Baud Rate Generator (programmable divider), Dual 










1000 


5 






(Cont'd) 








C0M8136T 


SMC 










WD1945 


Western 


(2874) 






12,5 


COM5016 


SMC 










COM5016T 


SMC 










C0M5036 


SMC 










C0M5036T 


SMC 






BOART (Bus Orientated Programmable Asynchronous 










Receiver/Transmitter 9.6 


5 


TR1983 


Western 






Bus Interface Circuit (MIL-STD1553B) 












5000 


5 


HS3273 


t Harris 




fin 

DU 


Command/Response Manchester II Converter (MIL-STD- 










1553B) 1000 


5 


BLIS-8937 


tDDC 










SSM-2012 


SSM 






Digital Modern (Modulation, demodulation and 










supervisory control, up to 600 BPS.) 












0.6 


5 




Motorola 












(1351.3298) 




DUART (Dual Universal Asynchronous Receiver and 










Transmitter). Two-channel UART, baud-rate generator, 










16-Bit couuter/timer, I/O ports. 












1000 


5 


26810 


Signetics 










26814 


Signetics 










26818 


Signetics 










68681 


Signetics 






EPCI (Enchanced Programmable Communications 










Interface) Serial/Parallel receiver/transmitter- 










Synchronous and asynchronous with baud rate 










generator. 




MC2261A 


Motorola 










MC2261B 


Motorola 










MC2261C 


Motorola 




70 


1 Kb/s 


5 


MC68661A 


Motorola 


(1360) 




15.6 Kb/s 


5 


MC68661C 


Motorola 


(1360) 




62.5 Kb/s 


5 


MC68661B 


Motorola 


(1360) 




1000 b/s 


5 


SCN2661A 


Signetics 


(1521) 








SCN2661B 


Signetics 


(1521) 








SCN2661C 


SIgnBtlcs 


(1521) 




IBM 3274/3276 Compatible COAX Receiver/Transmitter 










2358 


5 


COM9004 


SMC 






Link Controller, X.25 level 2 100 


5,12 


WD2501-01 


Wastern 


(2869) 








WD2511-01 


Western 


(2869) 




500 


5,12 




Western 


(2869) 


80 






WD2511-05 


Western 


(2869) 




1000 


.5,12 


uin9i;fii.ii 


Western 


(2869) 








uinoci 111 


Wastern 


(2869) 




Manchester Encoder-Decoder. 












1000 


5 


HD6409-2 


t Harris 












(669,680,1333) 








HD640g-g 


Harris 












(669,680,1333) 








nS15330RH 


t Harris 






1250 


5 


HD15530-Z 


t Harris 












(669.688.1333) 








HD1aa30-9 


Harris 












(669,688,1333) 








UniRRQI 9 


t Harris 












(669,693,1333) 








uniBEQi n 
nu 1 OwO 1 '9 


Harris 












(669,693.1333) 


90 


2500 


5 


HD1S531A 


Harris 












(669.693.1333) 




MPCC (multi-protocol communications controller) Bit 










and Byte Oriented 1 Mb/s 


5 


SCN2652A 


Signetics 






2Ub/s 


5 


MCZ6S2 


Motorola 


(1359) 








MC2652-2 


Motorola 


(13S9) 








MC68652 


Motorola 


(1359) 








MC68652-2 


Motorola 


(1359) 








MPD7201 


NEC-Electron 










(Continued) 





Max Serial 
Data Rate 
in kHz 



Supply 
Voltage, 
V 



Serial Transmitters- Receivers 



(ACIA) Asynchronous Communications Interface 
Adapter (Links 8-Bit bidirectional data bus to serial 
asynchronous data communications, including to' 
6860) 50 5 



Advanced Data Link Controller 



2 Mb/s 



ARINC-429 Receiver/Transmitter 

100 5 



ASTRO (asynchronous/synchronous receiver/ 
transmitter) to Interface Serial Communications 
Channel with a Parallel Digital System (i.e. 
microprocessors) 1000 12,5 

12,±5 



Asynchronous Addressable Receiver/Transmitter 

4.75-11.5 
4.8 3-18 



Asynchronous Coiinmunications Element 

56 5 



Asynchronous Serial Manchester Adapter 

1000 5 



Baud Rate Generator (programmable divider) 
1000 



Baud Rate Generator (programmable divider), Dual 
307/19.2 5 



12,5 



614/19.2 5 

12.5 



1000 



S6551 

S68051 

S6850 

F6850 

MC6850 



AMI (1249) 

AMI (1249) 

AMI 

Falrchlld (1280) 

Motorola (1351) 



MC854 



Motorola 



HS3282 
WD1993-01 
W01 993-02 
WD1 993-03 



t Harris 

Western (2877) 

Western (2877) 

Wastern (2877) 



WD 1931 
COM 1671 
UC1671 



Western 
SMC 

Western (2871) 



MM54240 
MC 14469 



National 
Motorola 



WD8250 



Western (2873) 



HD6408 



Harris 

(669.675.1333) 



5 


COM8046 


SMC 




C0M8046T 


SMC 




C0M8126 


SMC 




C0M8126T 


SMC 




C0M8146 


SMC 




C0M8146T 


SMC 


12,5 


COM5026 


SMC 




C0M5026T 


SMC 




COM5046 


SMC 




C0M5046T 


SMC 


12, ±5 


F4702BC 


Fairchild 




F4702BM 


t Fairchild 




HD4702-2 


t Harris (669.1333) 




HD4702-9 


Harris (669.1333) 




IM4702 


Intersil 




IM4703 


Intersil 




MC14411 


Motorola (3298) 




MM5307 


National 



WD1 943-00 
WD1 943-02 
WD1 943-05 



Western (2874) 
Western (2874) 
Wsstarn (2874) 



BR1941-00 
6Rig41-02 
BRig41-05 



Western 
Western 
Western 



WD1943-04 
WD1943-06 



Western (2874) 
Western (2874) 



BR1941-04 
BRig41-06 



Western 
Western 



AY-5-8136 

AY-5-8136T 

AY-5-8816 

AY-5-8816T 

C0M8116 

C0M8116T 

C0M8136 



Gl 
Gl 
Gl 
Gl 

SMC 
SMC 
SMC 



(Continued) 



20 



30 



40 



50 



(D 

■4— < 

CO 
03 



t Military Temperature Range ( - 55° to 125°C) 

® IC MASTER 1983 



Bold 



* Typical Value 
face Indicates additional data is provided on the page noted. 



2487 



IC MASTER 



INTERFACE-Transmitters-Receivers (Cont'd) 



Max Serial Supply 








Data Rate Voltage, 








Function in kHz V 


Device 


Source 




Line 


UART (Universal Asynchronous Receiver-Transmitter) 










(complete serial to parallel and parallel to serial 










interface) 60 5 






(Cont'd) 






TR1 865-00 


Western 


(2872) 




100 5 


HCMP1854C t Hughes 








l*nni DC J Bf^ 
bUP1804Ab 


tRCA 


(1476) 




125 5 


HD6402C-9 


Harris 










(669.672,1333) 




ISU D 


TR1 863-02 


Western 


(2872) 


40 




TR1 865-02 


Western 


(2872) 




200 5 


HD6402-2 


t Harris 










(669.672.1333) 






HD6402-9 


Harris 










(669.672.1333) 








Intersil 








IU6402M 


t Intersil 








IM6403 


Intersil 








IM6403M 


t Intersil 








CDP640ZD 


tRCA 


(1476) 






CDP6402E 


RCA 


(1476) 






TR1 863-04 


Western 


(2872) 


50 




TR1 865-04 


Western 


(2872) 




375 5 


HD640ZA-2 


t Harris 










(669.672.1333) 






HD6402A-9 


Harris 










(669.672.1333) 




400 3-12 


HCMP1854 


t Hughes 








C0P1854 


tRCA 


(1476) 




5 


HD6403A-2 


t Harris 








HD6403A-9 


Harris 






800 5 


S1602 


AMI 








MB8868A 


Fujitsu 






UART (Universal Asynchronous Receiver-Transmitter) 










complete serial to parallel and parallel to serial 










interface. 1.2 -12,5 


10371 


Rockwell 




60 


, 20 -12,5 


TR1402 


Western 








TR1602 


Western 






30 5 




Gl 






- 12,5 


MM5303 


National 






40 5 


vum luuo 


SMC 








LQMoOl? 


SMC 








COM8018 


SMC 










SMC 






-12,5 


C0M2017 


SMC 








COM2017H 


SMC 




70 




COM2502 


SMC 








COM2502H 


SMC 






56 5 


INS8250 


National 






Universal Communications Interface (Receives or 










transmits data to serial data bus when addressed and 










commanded by bus. Links the bus to serial or parallel 










I/O devices.) 500 - 10,5 


UMC-16 


Trans-Data 




USRT (universal synchronous receiver-transmitter) 










Complete serial to parallel and parallel to serial 










Interface. 250 - 12.5 


COM2601 


SMC 






500 5 


S2350 


AMI 






USYNRT (universal synchronous receiver/transmitter) 










Multi-Protocol, Bit and Byte Oriented 










1500 5,12 


SND5025 


SSS 








C0M5025 


SMC 






Dual Channel Asynchronous Serial Interface Circuit 












MC68681 


Metorole 


(1360) 





Max Serial Supply 
Data Rate Voltage, 
In kHz V Device 



Serial Transmitters- Receivers 



MPCC (multi-protocol communications controller) Bit 
and Byte Oriented 2 Mb/s 5 



Parallel to Serial Interface — 



5V 



PCI (Programmable Communications Interface) Serial/ 
parallel receiver/transmitter— synchronous and 
asynchronous with baud rate generator. 

1000 b/s 5 



PKCC (Programmable Keyboard and Communications 
Controller) UART, baud rate generator and keyboard 
encoder 1000 b/s 5 



PSAR (Programmable Synchronous-Asynchronous 
Receiver) Synchronous/ Asynchronous serial to parallel 
converter with programmable character length and 
programmable serial data rate. 

100 -12,5 
640 - 12,5 

-12,±5 



PSART (Programmable Synchronous-Asynchronous 
Receiver-Transmitter) Serial to parallel and parallel to 
serial converter that can operate in Full Duplex Mode. 

50 5 



PSAT (Programmable Synchronous-Asynchronous 
Transmitter) Synchronous/Asynchronous parallel to 
serial converter that has programmable character 
length and programmable serial data rate. 

100 - 12,5 

200 -12, ±5 



640 



-12,5 



Receiver/Decoder (Bi-Phase) 3500 



Receiver/Decoder (Bi-Phase, IBM 3270) 



SDLC/HDLC/ADCCP Controller 



500 
1000 



1500 



2000 



SPCC (Sync-Protocol Communications Controller) Bit 
and Byte Oriented 1000 5 



Synchronous Receiver/Transmitter (Bi-Sync/SDLC) 
800 ±5,12 



Synchronous Serial Data Adaptor 

2 Mb/s 5 



Transceiver, MIL-STD-1553A/B 

1000 



:12 

:15/±12 



:15,5 



Transmitter/Decoder (Bi-Phase, IBM 3270) 



Transmitter/Encoder (Bi-Phase) 

3500 5 



UART, MIL-STD-1553A 



1000 



UART (Universal Asynchronous Receiver-Transmitter) 
(complete serial to parallel and parallel to serial 
interface) 56 5 

60 5 



(Cont'd) 



(Cont'd) 

SCN2652A SIgnetlcs (1520) 



CY232 Cybernetic 



SCN2651C SIgnetlcs (1520) 



SC2671ACS Silicon G 



PT1472B Western 
PT1472B-01 Western 
NC225g Nitron 



8251 
/XPD8251 



Intel 

NEC-Micro 



PT1482B Western 
NC2257 Nitron 
NC2260 Nitron 



PT1482B-01 Western 



DP8343 



National (2762) 



DP8341 



National (2762) 



WD193X-00/ 

10 Western 
WD193X-01/ 

11 Western 



WD193X-02/ 

12 Western 



WD193X-03/ 

13 Western 



F3846 
F6856 



Fairchild 

Falrchllil (1277) 



nPD379 



NEC-Micro 



MC6852 



Motorola (1351) 



BUS-8557 t DDC 
BUS-63105 fODC 



BUS-8553 t DDC 
BUS-8554 t DDC 
BUS-8555/56 1 DDC 
BUS-8559 t DDC 



0P8340 



National (2762) 



DP8342 



National (2762) 



C0M1553A tSMC 
C0M1553B SMC 



WDZ123 Western (2875) 
TR1 863-00 Western (2872) 

' (Continued) 



20 



30 



t Military Temperature Range (-55° to 125°C) 

2488 



* Typical Value 

Raid face Indicates additional data Is provided on the page noted. 

Last Page This Section. Next Page 2601. 



IC MASTER 1983 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 



DISTINCTIVE CHARACTERISTICS 

• Standard I/O pin-out organization 

• 48mA Commercial Iql 

• 32mA Mil loL 

• Standard clock and output enable pin-outs 

• 24-pin slim 0.3 inch wide DIP package 

• IMOX Speed 

- 7.5ns typical CP to Y for registers 

- 4.0ns typical D to Y tor buffers 

• Wide data paths and flexible control 

- 10 bits for video or wide addresses 

- 9 bits for byte plus parity buses 

- 8-bit with multiple enables 

• 100% Product assurance screening to MIL-STD-883 
requirements 



PHYSICAL DIMENSIONS 
Dual-ln-Line 



D-24-SLIM 



'-nr^nr-ir-innm^n'-nn 




HERMETIC DUAL IN-LINE PACKAGE 



AMD Pkg 


D-24-Sllm 


Common 
Name 


SLIM 
CERDIP 


38510 

Appendix C 




Parameters 


Min 


Max 


A 


.140 


.220 


b 


.016 


.020 


bi 


.045 


.065 


c 


.009 


.011 


D 


1.230 


1.285 


E 


.245 


.285 


El 


.290 


.320 


a 


.090 


.110 


L 


.120 


.150 


Q 


.015 


.060 


Si 


.010 




a 


3° 


13° 



FUNCTIONAL DESCRIPTION - 

The Am29800 Family provides a completely standardized func- 
tional family of registers, latches, buffers, transceivers and parity 
check-and-regenerate functions optimized for bus interface ap- 
plications. Each is packaged in the standard 24-pin x 0.3" wide 
DIP package to allow LSI functionality in the minimum board area. 
Board layout is eased by the standardization of inputs on the left 
and outputs on the right, directly across from each other. Output 
drive levels are standardized at 48mA Commercial and 32mA 
Military. 

All functions are implemented in AMD's new proprietary IMOX™ 
(Implanted Micro OXide) process to provide the optimum in 
speed power product. Typical benchmark speeds are 7.5ns typi- 
cal CP-to-Y for registers, and 4.0ns typical D-to-Y for buffers. 

The basic 29800 Family functions are available in 1 0-bit, 9-bit and 
8-bit configurations with broad control flexibility aimed at 
minimizing the SSI/MSI content of LSI systems. The 10-bit de- 
vices make it easy to interface data plus controls or for 2 parts to 
interface 20-bit address lines. The 9 bits function are ideal for 
byte plus parity bus structures. The parity check-and-regenerate 
functions are designed for interfacing non-parity peripherals to 
parity organized buses. 

All of the functional types have the pin-out format shown below. 



STANDARDIZED PIN-OUTS 
FOR EASY BOARD LAYOUT 



STANDARD 
INPUTS 



I 



D(R) 



GND [H 12 



Vcc 



I 

Z] 

I] 

Z] 
Z] 
Z! 
Zl 
□ 
Z] 

zi; 

Zl- 



Y(T) 



STANDARD 
OUTPUTS 



STANDARD 
CONTROLS 



BLI-224 



■D 

CD 
O 
C 
(0 

> 

< 



® IC MASTER 1983 



2601 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 




O 
C 
(0 

> 
•o 

< 



Ani29821/822/823/824/825/826 

• High-speed parallel registers with positive edge-triggered 
D-type flip-flops 

- Noninverting CP-Y tpQ 7.5ns typ 

- Inverting CP-Y tpo - 7.5ns typ 

• Buffered common Clock Enable (EN) 

• Buffered common asynchronous Clear input (CLR) 

• Three-state outputs glitch free during power-up and down 

• Outputs have Schottky clamp to ground 

• 48mA Commercial Iql. 32mA MIL Iql 

• High capacitance load capability 

• Low capacitance inputs and outputs 

• Iqh specified 2.0V and 2.4V 

• 24-pin 0.3" space saving package 



FUNCTIONAL DESCRIPTION 

The Am29820 Series bus interface registers are designed to 
eliminate the extra packages required to buffer existing registers 
and provide extra data width for wider address/data paths or 
buses carrying parity. The Am29821 and Am29822 are buffered, 
10-bit wide version of the popular '374 function. The Am29823 
and Am29824 ar e 9-bi t wide buffered registers with Clock Enable 
(EN) and Clear (CLR) - ideal for parity bus interfacing in high 
performance microprogrammed systems. The Am29825 and 
Am29826 are 8-bit buffered registers with all the '823/4 controls 
plus multiple enables (OE^, OE2, OE3) to allow multiuser control 
of the interface, e.g., CS, DMA, and RD/WR. They are ideal for 
use as an output port requiring high Iol/'oh- 

All of the Am29800 high performance interface family are de- 
signed for high capacitance load drive capability while providing 
low capacitance bus loading at both inputs and outputs. All inputs 
are Schottky diode inputs, and all outputs are designed for low 
capacitance bus loading in the high impedance state. 





Device 


10-Blt 


9-Bit 


8 Bit 


Noninverting 
Inverting 


Am29821 
Am29822 


Am29823 


Am29825 


Ani29824 


Am29826 



Am29821/Am29822 
10-BIT REGISTERS 



BLI-225 





1 


24 


PVcc 


Do C 


2 


23 


□ Vo 


Dl[Z 


3 


22 


□ v, 


D2 [— 


4 


21 


□ ^2 


D3 cz 


5 


20 


ZIV3 


D4 [I 


6 


19 


Z|V4 






18 


Z]V5 




8 




ZjYe 


D7C 


9 


16 


Z]V7 




10 


15 


Z1V8 


D9 [Z 


11 


14 


Z3Y9 


GND 1 


12 


13 


1 CP 



BLI-226 



2602 



® 1C MASTER 1983 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 



Am29823/Am2g824 
9-BIT REGISTERS 



BLI-227 





1 


24 


Zl Vcc 




Do C 


2 


23 


Z]vo 






3 


22 


Z]vi 




D2 


4 


21 


Z|V2 


D 




5 


20 


Z]Y3 






6 


19 


ZIY4 








18 


Z]Y5 


CP 




8 






EN 


^[Z 


9 


16 


ZIV7 


CLR 


Da d 


10 


15 


Z] V8 


OE 


CLR d 


11 


14 


1 EN 




GND 1 


12 


13 


Z2 CP 





D^ 



CP EN CLR 

~T5 — cr 



Q — 



BLl-228 



(0 


o 

'> 

<D 

Q 
o 



0) 
O 

c 
CO 
> 

< 



Am29825/Am29826 
8-BIT REGISTERS 



BLI-229 



or, c 


1 


24 


Z] Vcc 






2 


23 


□ 0E"3 





Do IZ 


3 


22 


□ ^0 




DlC 


4 


21 


□ v, 




D2CI 


5 


20 


ZY2 




D3CZ 


6 


19 


ZV3 


CP 


D4[Z 




18 




EN 


D5CI 


8 


17 




CLR 




9 


16 


□ V6 


or, 




10 


15 


Z]Y7 


Ol'2 


CLR Z 


11 


14 


□ IN 


OE3 


GNO 1 


12 


13 


□ CP 





D^ 



D 






CP 


EN 


CLR° 



BLI-230 



® IC MASTER 1983 



2603 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 



T3 

O 
C 
CO 

> 

< 



Am29827/828, 
Am29861/862/863/864 

• High-speed symmetrical bidirectional transceivers 

- Noninverting tpQ = 4.5ns typ 

- Inverting tpo = 3.0ns typ 

• High speed buffers and inverters 

- Noninverting tpQ = 4.5ns typ 

- Inverting tpo = 3.0ns typ 

• 200mV minimum input hysteresis on input data ports 

• Three-state outputs glitch-free during power-up and down 

• Outputs have Schottky clamp to ground 

• 48mA Commercial Iql- 32mA MIL Iql 

• High capacitance load capability 

• Low capacitance inputs and outputs 

• Iqh specified 2.0V and 2.4V 

• 24-pin 0.3" space saving package 



FUNCTIONAL DESCRIPTION 

The Am29827 and Am29828 10-bit bus buffers and Am29860 
Series bus transceivers provide high performance bus interface 
buffering for wide data/address paths or buses carrying parity. 
The 10-bit buffers and 9-bit transceivers have NOR-ed output 
enables for maximum control flexibility. All buffer and transceiver 
data inputs have 200mV minimum input hysteresis to provide 
improved noise rejection. 

All of the Am29800 high performance interface family are de- 
signed for high capacitance load drive capability while providing 
low capacitance bus loading at both inputs and outputs. All inputs 
are Schottky diode inputs, and all outputs are designed for low 
capacitance bus loading in the high impedance state. 





Device 


10-Bit 
Buffers 


10-Bit 
Transceivers 


9-Bit 
Transceivers 


Noninverting 


Am29827 


Am29861 


Ann29863 


Inverting 


Am29828 


Am29862 


Am29864 



Am2g827/Am29828 
10-BIT BUS DRIVERS 



oEin:: 


1 


24 


Zlvcc 




2 


23 




Did 


3 


22 






4 


21 


□ V2 




5 


SO 


ZIV3 




6 


19 


Z]V4 


05 IZ 




18 


□ Vs 


D6C 


8 




Z|ve 


O7IZ 


9 


16 


□ v. 


De C 


10 


15 


Z]Y8 




11 


14 


ZIY9 


GND 1 


12 


13 


Z10E2 




BLI-238 



2604 



® IC MASTER 1983 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 



Am29861/Am29862 
10-BIT TRANSCEIVERS 



BLI-239 



oer| 


1 


24 


□ Vcc 


RoCZ 


2 


23 




Rid 


3 


22 


□ t, 


R2IZ 


4 


21 


Z]T2 


"sCZ 


S 


20 


□ T3 


n4CZ 


6 


19 


Z]T4 


"sIZ 


7 


18 


ZITs 


"6 CI 


8 


17 


□ T6 


n/CZ 


9 


16 


□ T7 


RslZ 


10 


15 


□ Ts 


R9CI 


11 


14 


□ T9 


GND 1 


12 


13 


Z OET 



10 



-tx. 



10 



T3 

O 

c 

CO 

> 

< 



BLI-240 



Am29863/Am29864 
9-BIT TRANSCEIVERS 



BLI-241 



OER,|^ 


1 


24 


Zl Vcc 


Rod 


2 


23 


□ To 


Ri[Z 


3 


22 


Zt, 


R2C: 


4 


21 


ZT2 


R3[Z 


5 


20 


Z]T3 


R4CZ 


6 


19 


ZT4 


RslZ 


7 


18 


ZTs 


Red 


8 


17 


ZT6 


R7d 


9 


16 


□ T7 


Rsd 


10 


IS 


ZTs 


OERzd 


11 


14 


□ OET2 


gndI 


12 


13 


□ OET1 




BLI-242 



© IC MASTER 1983 



2605 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 



(0 
(D 
O 

*> 

(D 

o 

O 

o 



T3 
(D 
O 
C 
CO 

> 

< 



Am29843/Am2g844 
9-BIT LATCHES 



BLI-233 





1 


24 


□ Vcc 




Do C 


2 


23 


□ Vo 






3 


22 


□ ^1 




D2 C 


4 


21 




D 


D3 m 


S 


20 


Z]V3 






6 


19 










18 




LE 


DeC 


B 


17 




PRE 




9 


16 


ZIV7 


CLR 


De C 


10 


15 


Z] vs 


OE 


CLB d 


11 


14 


1 PRE 




GND d 


12 


13 







LE PRE CLR 
"5 ^ 



Q ;>— No-^ 



BLI-234 



Am29845/Am29846 
8-BIT LATCHES 



BLI-235 





1 


24 


ID Vcc 




OEid 


2 


23 






DoCZ 


3 


22 


Z|Vo 





Old 


4 


21 


ZiVl 




D2 C 


5 


20 


Z]V2 




03 d 


6 


19 


Z]Y3 


LE 


04 d 




18 


Z]V4 


PRE 


05 d 


8 


17 




CLR 


06 d 


9 


16 


□ ^6 


OE", 


D7d 


10 


15 






CLR 1 


11 


14 


1 PRE 


oii 


GNod 


12 


13 


□ le 





LE PRE CLR 



O >- 



BLI-236 



2606 



®1C MASTER 1983 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 



Am29833/834 

• High speed bidrectional transceivers for 8-blt non-parity to 
9-bit with parity ports 

- Noninverting data tpp = 6.0ns typ 

- Inverting data tpQ = 6.0ns typ 

- Parity generate tpQ = 9.0ns typ 

• High speed parity generation for Transmit mode 

• High speed parity fault detection for Receive mode 

• Clearable, open-collector output, Fault Flag register 

• 200mV minimum input hysteresis 

• Three-state outputs glitch-free during power-up and down 

• Outputs have Schottky clamp to ground 

• 48mA Commercial Iql. 32mA MIL Iql 

• High capacitance load capability 

• Low capacitance inputs and outputs 

• Iqh specified 2.0V and 2.4\/ 

• 24-pin 0.3" space saving package 



FUNCTIONAL DESCRIPTION 

The Am29833 and Am29834 bidirectional transceivers are de- 
signed to interface an 8-bit data path without parity to a byte- 
parity 9-bit data path. All outputs - R|, Tj and PARITY - have 
high Iql drive capability and are ideal for device-to-bus or 
bus-to-bus interfacing. 

The internal FAULT flag register is configured as a "one's 
catcher" to capture and hold any odd-parity fau lt occur ring at 
the rising edge of the clock, CP. A regi stered F AULT output 
remains LOW until cleared. Also, the FAULT output is an 
open-collector output for wired-OR configurations where byte- 
parity is used for 16-bit or wider data fuses or where multiple 
port flags are wired-OR tied together. 

All of the Am29800 high performance interface familiy are de- 
signed for high capacitance load drive capability while provid- 
ing low capacitance bus loading at both inputs and outputs. All 
inputs are Schottky diode inputs, and all outputs are designed 
for low capacitance bus loading in the high impedance state. 



T3 
(D 
O 
C 

CO 
> 

•D 

< 





Device 


Noninverting 


Am29833 


Inverting 


Am29834 



Am29833/Am29834 
8-BIT TO 9-BIT PARITY TRANSCEIVERS 



— >o-j 



BLI-243 



OER 1 


• V 

1 


24 


Z3 Vcc 




2 


23 


ID To 




3 


22 


I]T, 




4 


21 


11^2 


"3 CI 


5 


20 


13^3 


R4IZ 


6 


19 




"sEZ 


7 


18 


I]T5 




8 


17 




"7C 


9 


16 


□ t, 


faUEt CZ 


10 


15 


1 PARITY 


CLR IZl 


11 


14 


H OET 


GND [Zl 


12 


13 


^ CP 



R 

4 



HIGH 
SPEED 
PARITY 

TREE 



FAULT 
FLAG 
REGISTER 

CP 



t-o<J— 
L->o 



BLI-244 



® IC MASTER 1983 



2607 




Advanced Micro Devices 



BIPOLAR LSI AND SUPPORT PRODUCTS 
High Performance Bus Interface Circuits 
The Am29800 Family 



Am29841/842/843/844/845/846 

• High-speed parallel latches 

- Noninverting transparent tpQ = 4.5ns typ 

- Inverting transparent tpo = 6.0ns typ 

• Buffered common latch enable input 

• Buffered common clear input 

• Buffered common preset input 

• Three-state outputs glitch-free during power-up and down 

• Outputs have Schottky clamp to ground 

• 48mA Commercial Iql. 32mA MIL Iql 

• High capacitance load capability 

• Low capacitance inputs and outputs 

• Iqh specified 2.0V and 2.4V 

• 24-pln 0.3" space saving package 



FUNCTIONAL DESCRIPTION 

The Am29840 Series bus interface latches are designed to elimi- 
nate the extra packages required to buffer existing latches and 
provide extra data width for wider address/data paths or buses 
carrying parity. The Am29841 and Am29842 are buffered, 10-bit 
wide version of the popular '373 function. The Am29843 and 
Am29 844 a re 9-bit wide buffered latches with Preset (PRE) and 
Clear (CLR) - ideal for parity bus interfacing in high performance 
systems. The Am29845 and Am29846 are 8-bit buffered latches 
with all the '843/4 controls plus multiple enables (OEj , OE2, OE3) 
to allow multiuser control of the interface, e.g., CS, DMA, and 
RD/WR. They are ideal for use as an output port requiring high 
'ol/'oh- 

All of the Am29800 high performance interface family are de- 
signed for high capacitance load drive capability while providing 
low capacitance bus loading at both inputs and outputs. All inputs 
are Schottky diode inputs, and all outputs are designed for low 
capacitance bus loading in the high impedance state. 





Device 


10-Bit 


9-Bit 


8-Bit 


Noninverting 


Am29841 


Anfi29843 


Am29845 


Inverting 


Am29842 


Am29844 


Ani29846 



Am29841/Am29842 
10-BIT LATCHES 



BLI-231 





1 


24 


□ Vcc 


Do C 


2 


23 


□ Yo 




3 


22 


Zlv, 


D2 [z 


4 


21 


□ V2 




5 


20 


□ V3 




6 


19 


ZIY4 


DsC 


7 


18 


□ Vs 


Ded 


8 


17 


Z]Y6 




9 


16 


□ v. 




10 


IS 


Z]V8 


D9 □ 


11 


14 


ZIV9 


GND [Z 


12 


13 







D 












LE 


Q 


LE 









BLI-232 



2608 



® IC MASTER 1983 



AMI 



AMERICAN MICROSYSTEMS, INC 




S4535 



32 BIT, HIGH VOLTAGE DRIVER 



Features: 

□ High Voltage Outputs Capable of 60 Volt Swing 

□ Drives Up to 32 Devices 

□ Cascadable 

□ Requires Only 4 Control Lines 
Applications: 

□ Vacuum Fluorescent Displays 

□ LED and Incandescent Displays 

□ Solenoids 

□ Print Head Drives 

□ DC and Stepping Motors 

□ Relays 



General Description 

The AMI S4535 is a high voltage MOS/LSI circuit that 
drives a variety of output devices, usually under micro- 
processor control, by converting low level signals such as 
TTL, and CMOS to high voltage, high current drive sig- 
nals. This device requires only four control lines due to its 
serial input construction. It latches the data to be output, 
or it may be used to bring data directly to the driver. The 
part acts as a versatile peripheral to drive displays, 
motors, relays and solenoids within its output limitations 
of a 60 volt swing and 25mA per drive. It is especially well 
suited to drive vacuum fluorescent displays due to its 
high voltage output capability. One circuit will drive up to 
32 devices and more can be driven by cascading several 
drivers together. 



o 
c 

(0 

E 

Q) 
w-* 
(0 
>» 
CO 

o 
o 



c 
ca 
o 



E 
< 



Functional Block Diagram 

CLOCK I > ''^^^ 



32 STAGE 
SHIFT REGISTER 



I I I I 



LATCHES 

I . l_ 



Output Buffer (Functional Diagram) 



LATCH 
OUTPUT 








OUTPUT 
ENABLE 








OUTPUT 
BUFFERS 



I OUTPUT 



Pin Configuration 



Vbb C 

DO □ 

032 C 

031 C 

030 C 
029 C 
028 C 
027 C 

OztC 

025 C 
024 C 
023 C 
O22 C 

O21 c 
O20 c 

0l9 C 

Q18 C 

0l7 C 

oeC 
Vss C 



S4535 



□ Voo 

□ W 

□ O1 

□ O2 

□ O3 

304 

□ 05 

□ 0, 

□ 07 

□ o. 

□ Os 

□ O10 

□ o„ 

□ 0,2 

□ Qi3 

□ 0,4 

□ 0,5 

□ 016 

□ STR 

□ CLK 



© 10 MASTER 1983 



2609 



AMI 




S4521 



32 BIT DRIVER 



O 
_C 

(0 

E 

(D 
■f-* 
(0 

(0 

o 
o 



c 

CO 
C5 



E 
< 



Features: 

□ Drives Up to 32 Devices 

□ Cascadable 

□ On Chip Oscillator 

□ Requires Only 3 Control Lines 

□ CMOS Construction For: 
Wide Supply Range 
High Noise Immunity 
Wide Temperature Range 

Applications: 

□ Liquid Crystal Displays 

□ LED and Incandescent Displays 

□ Solenoids 

□ Print Head Drives 

n DC and Stepping Motors 
r'l Relays 



General Description 

The AMI S4521 is a MOS/LSI circuit that drives a var- 
iety of output devices, usually under microprocessor con- 
trol. This device requires only three control lines due to its 
serial input construction. It latches the data to be output, 
relieving the microprocessor from the task of generating 
the required waveform, or it may be used to bring data 
directly to the driver. The part acts as a versatile peri- 
pheral to drive displays, motors, relays and solenoids 
within its output limitations. It is especially well suited to 
drive liquid crystal displays as a backplane A.C. signal 
option is provided. The A.C. frequency of the backplane 
output can be user supplied or generated by attaching a 
capacitor and resistor to the LCD<t> input, which controls 
the frequency of the internal oscillator. One circuit will 
drive up to 32 devices and more can be driven by 
cascading several drivers together. 



Functional Block Diagram 



CLOCK I > - 



DATA IN I > ■ 



LOAD I > - 



Vpol > 
LCD* 



32 STAGE 
SHIFT REGISTER 



I — r 
LATCHES 



OUTPUT BUFFERS 



0, Oj 



032 



■<^BP 



Pin Configuration 



+voo[: 

LOAD □ 

Q32 c 
Q31 c 
O30 c 

029 C 
028 C 

Q27 c 

026 C 
025 II 

OuC 

Q23C 
022 C 

O21 c 
Q20 c 
019II 

On C 

Ol7 □ 

016 

0l5 



S4521 



40 
39 
38 
37 
36 
35 
34 
33 
32 
31 
30 
29 
28 
27 
26 
25 
24 
23 
22 
21 



□ CLOCK 

□ O1 

□ O2 

□ O2 

□ Vss 

□ DATA OUT 

□ DATA IN 

□ O4 

□ O5 

□ LCD.f 

□ BP 

□ 06 

□ O7 

□ Oa 

□ O9 

□ 0,0 

□ On 

□ O12 

□ Oi3 

□ 0,4 



2610 



© 10 MASTER 1983 



AMI 



AMERICAN MICROSYSTEMS, INC 




S4534 



10 BIT, HIGH VOLTAGE, 
HIGH CURRENT DRIVER 



Features: 

□ Outputs Capable of 60 Volt Swings at 25mA 

□ Drives Up to 10 Devices 

□ Cascadable 

□ Requires Only 4 Control Lines 
Applications: 

□ Vacuum Fluorescent Displays 

□ LED and Incandescent Displays 

□ Solenoids 

□ Print Head Drives 

□ DC and Stepping Motors 

□ Relays 



General Description 

The AMI S4534 is a high voltage, high current MOS/LSI 
circuit that drives a variety of output devices, usually 
under microprocessor control, by converting low level 
signals such as TTL, and CMOS to high voltage, high cur- 
rent drive signals. This device requires only four control 
lines due to its serial input construction. It latches the 
data to be output, or it may be used to bring data directly 
to the driver. The part acts as a versatile peripheral to 
drive displays, motors, relays and solenoids within its 
output limitations of a 60 volt swing and 25mA per drive. 
It is especially well suited to drive vacuum fluorescent 
displays due to its high voltage output capability. One cir- 
cuit will drive up to 10 devices and more can be driven by 
cascading several drivers together. 



o 
c 

co" 
E 

(D 

-4—' 

(0 

>% 

(0 

o 
o 



c 
o 

(D 

E 
< 



Functional Block Diagram 

CLOCK I ^ ^ 



10 STAKE 
SMFT REGISnil 



I ' I ' I ' I ' I 



LATCHES 

■ . I 



vpol > 



Output Buffer (Functional Diagram) 



LATCH 
OUTPUT 








OUTPUT 
ENABLE 







iSERUL 
1 OUTPUT 




OUTPUT 
BUFFERS 



- < 1 "«» 



4> 



i-vW t » < I OUTPUT 

<ioaK 



Pin Configuration 



0.C 

CLKC 
VssC 
VdoC 
STRC 

05 C 
04 C 



5 S4534 14 

6 13 

7 12 

8 11 

9 10 



□ 0. 

□ 0,0 

□ DO 

□ V„ 

□ W 

□ 00 

□ Oi 

□ Or 

□ 03 



® 10 MASTER 1983 



2611 



/ABBREVIATIONS 

OF 

COMPANY 
NAMES 



Action Ins 

AD 

ADT 

Adapt Sci 

Advent 

Alphatron 

AMA 

AMD 

AMI 

Amperex 

Analogic 

Analog Sys 

APC 

Apex 

APM 

AppI Sys 

APT 

Aptek 

Array Tech 

AWI 



Bedford 
Burr-Brown 

CAE 

Cal Devices 

Cent Data 

Cermetek 

CGRS 

Cherry 

CIC 

Citel 

Comlinear 

CMA 

Comark 

Comdial 

Comp Auto 

Compas 

Cent Logic 

Control Sys 

CreMicro 

Cromemco 

CSG 

Cubit 

Curtis 

Cybernetic 

Cybersys 

Cybertek 

Data General 

Data I/O 

Data Trans 

Datel 

Datricon 

DDC 

DEC 

Deico 

DGM 

Digelec 

Digitek 

Dionics 

Dist Comp 

Divers Tech 



E-HI 
Elind 
EL Instr 
EMM 
Emulogic 
Epson 
ETi Micro 
Exar 



Fairchild 
FerrantI 
Fujitsu A 
Fujitsu 

2612 



Action Instruments 
Analog Devices 
Advanced Digital Technology 
Adaptive Science Corp. 
Advent Products, Inc. 
Alphatron 

American Automation 
Advanced Micro Devices 
American Microsystems, Inc. 
Amperex Electronic Corp. 
Analogic 
Analog Systems 
Applied Micro Circuits 
Apex Microtechnology 
Applied Microsystems Corp. 
Applied Systems Corp. 
Applied Microtechnology 
Aptek Microsystems 
Array Technology 
Analog West 



Bedford Computer Systems Inc. 
Burr-Brown Research 



Computer Aided Engineering 
California Devices 
Central Data Corp. 
Cermetek 

CGRS Microtech Inc. 
Cherry Semiconductor 
Custom Integrated Circuits 
Citel, Inc. 

Comlinear Corporation 

Custom MOS Arrays 

Comark Corp. 

Comdial Semiconductor 

Computer Automation 

Compas Microsystems 

Control Logic Inc. 

Control Systems Microsystems Div. 

Creative Micro Systems 

Cromemco, Inc. 

Commodore Semiconductor Group 
Cubit Inc. 

Curtis Electro Devices, Inc. 
Cybernetic Micro Systems 
Cybersystems 
Cybertek Inc. 

Data General 

Data I/O 

Data Translation 

Datel-lntersil 

Datricon Corporation 

Data Devices Corporation 

Digital Equipment Corporation 

DeIco Electronics 

Digital Microsystems 

Digelec Corp. 

Digitek, Inc. 

Dionics Inc. 

Distributed Computer Systems 
Diversified Technology 

E-H International, Inc. 
Elind Elettronica Industriale 
E & L Instruments 
EMM 

Emulogic. Inc. 
Epson America, Inc. 
ETI Micro 

Exar Integrated Systems 



Fairchild 

FerrantI Electric 

Fujitsu America 

Fujitsu Microelectronics, Inc. 



Gl 


General Instrument 


GMS 


General Microsystems 


GTE Micro 


GTE Microcircuits 


Harris 


Harris Semiconductor 


Heurikon 


Heurikon Corp. 


Hilevel 


Hilevel Technology, Inc. 


Hitachi 


Hitachi America, Ltd. 


Holt 


Holt Inc. 


HP 


Hewlett-Packard 


Hughes 


Hughes Aircraft, Solid State 


r 1 uuulf Id 


Hybrid Sys 


Hybrid Systems 


Hycom 


Hycom Incorporated 


IDT 


Integrated Device Technology 


IMI 


International Microcircuits, Inc. 


IMP 


International 




Microelectronic Products 


IMS 


Industrial Micro-systems Inc. 


Inconix 


Inconix Corporation 


InH Taf^h 

inu iccn 


InHllptiifo Tof^hnnlnfTU 

iiiuuuiivc icunfiuiUBy 


1 nmnc 
iniTlDS 


Inrtmc 

inmos 


inibircng 


IntaffratoH Pirmiit Pnalnoorincr 
inicgidlcQ UllCUlL Cllglllcci lllg 




Infpor^tpH nirpiiit ^vctPiriQ 
iMicgidicu viiuuiL ojroLciiid 


inibuinpoys 


Infranr^tarl Pnwnlltor Qv/ctorirle 

inicgidicQ uompuicr oysicnis 


InfPvhor 


unci lldllUlldi uyuclilcLllfO 


in\ IVilCIO 


illlcllldllUlldl IVllUi Udyalclllo 


Int Tpph 


IntpQratpH Tprhnnlfiorv Pnrn 


iniecn/ rmi 


Intech/Function Modules Inc. 


III icl 


Intol 


1 n^Brrlocifrn 

inicrQcSign 


Interdesign 


llllcfoll 




illllUIIIUd 




IPI 


inicgidieQ rnoiomdirix ino. 


ITT 
1 1 1 


ITT Semiconductors 


Kinetic Sys 


Kinetic Systems 


Kontron 


Kontron Electronics 


Lambda 


Lambda Semiconductor 


Laserdyne 


Laserdyne 


LSI Comp 


LSI Computer Systems 


LSI Logic 


LSI Logic Corporation 


Master Logic 


Master Logic Corporation 


Matrix 


Matrix Corp. 


Matrox 


Matrox Electronic Systems 


MCC 


Microcomputer Control 


Micrel 


Micrel 


Micro Eng 


Micro Circuit Engineering 


Micro innov 


Micro Innovators 


Micropac 


Micropac Industries 


Micro Net 


Micro Networks 


Micro Pwr 


Micro Power Systems 


Micro Sci 


Micro Sciences Corp. 


Micro Tech 


Microcircuits Technology 


Micro-Link 


Micro-Link Corporation 


Micron 


Micron Technology 


MilerTron 


MilerTronics 


Miller 


Miller Technology 


Mitel 


Mitel Semiconductor 


Mitsubishi 


Mitsubishi Electronics 


MMI 


Monolithic Memories, Inc. 


Monosil 


Monosil 


MonSys 


Monolithic Systems Corp. 


Mostek 


Mostek 


Motorola 


Motorola Semiconductor 


MRC 


MRC Systems 


Murray 


Murray Consulting 


National 


National Semiconductor 


NCR 


NCR Corp., Microelectronics 




Division 


NEC-EA 


NEC/ Electronic Arrays Division 


NEC Electron 


NEC/ Electron Division 


NEC Micro 


NEC/Microcomputer Division 


Nitron 


Nitron 


Nortek 


Nortek 



CAE 


Oliver Advanced Engineering 


Octagon 


Octagon Systems Corp. 


OEI 


Optical Electronics Inc. 


Ohio Sci 


Ohio Scientific 


UIVI 


Ur\i oemiconuuuior 


nmnihvtp 


Omnihvtp Pnrn 


Oscar 


1. S. Oscar Assoc. 


Panasonic 


Panasonic 


PC/M 


Pacific/ Cyber Metrix 


Percom 


Percom Data Co. 


Phoenix 


Phoenix Digital Corp. 


Pico Design 


Pico Design 


Polycore 


Polycore Electronics 


Plessey 


Plessy Semiconductors 


PMI 


Precision Monolithics, Inc. 


PragDes 


Pragmatic Design Inc. 


PREMA 


PREMA GmbH 


Pro-Log 


Pro-Log Corp. 


uuay 




Raytheon 


Raytheon Semiconductor 


RCA 


RCA Solid State Division 


RCI Data 


RCI Data 


RELMS 


Relational Memory Systems 


Reticon 


Reticon 


RIFA 


RFIA 


Rockwpll 


Rnrkwpil MirrnRlprtrnnip Dpvirp^ 


RTC 


RiphI Timp PnrnnrAtinn 
rxiciii 1 line uui |jui d iiuii 


Sanken 


Sanken Electric 


Sanyo 


Sanyo 


SEEQ 


SEEQ Technology, Inc. 


Semi Proc 


Semi Processes 


Siemens 


Siemens 


Signetics 


Signetics 


SGS 


SGS-ATES Semiconductor 


Sharp 


Sharp 


Silicon G 


Silicon General 


Siliconix 


Siliconix 


Silicon Sys 


Silicon Systems Inc. 


Siltronics 


Siltronics 


SMC 


Standard Microsystems Corp. 


Solarise 


Solarise Enterprises 


Solitron 


Solitron Devices 


Sprague 


Sprague Electric Company 


SSM 


Solid State Micro Technology 




for Music 


SSS 


Solid State Scientific 


Stag 


Stag Microsystems 


Struc. Des. 


Structured Design Inc. 


Stynetic 


Stynetic Systems 


Sunrise 


Sunrise Electronics 


Sunshine 


Sunshine Semiconductor 


Supertex 


Supertex Inc. 


Symtek 


Symtek Corp. 




Synapse Corp. 


Cunartolr 


oyiici iciv 


^VQ Innnv 

IIIIIUW 


^VQtpm^ Innnu/itinnc 
ojroiciiio 1 1 iiiu VP iiuiid 


Tau Zero 


Tau Zero Inc. 


Tektronix 


Tektronix 


Telaris 


(See Laserdyne) 


Teledyne C 


Teledyne Crystalonics 


Teledyne P 


Teledyne Philbrick 


Teledyne S 


Teledyne Semiconductor 


Telefunken 


Telefunken 


Telephonies 


Telephonies LSI 


Telmos 


Telmos 


Teltone 


Teltone Corporation 


Tl 


Texas Instruments 


Thomson-CSF 


Thompson-CSF Components Corp. 


TMX 


TMX 


Topanga 


Topanga Data Systems 


Toshiba 


Toshiba America 


Trans-Data 


Trans-Data 


TDUf 

1 KW 


TD\Af 1 CI Drr\Attr^ie- 

IKW-Lol rrOuUClS 


Unitrode 


Unitrode 


Universal 


Universal Semiconductor, Inc. 


Vantage 


Vantage Data Products 


VTI 


VLSI Technology, Inc. 


Votrax 


Votrax 


Weitek 


Weitek Corporation 


Western 


Western Digital 


Wintek 


Wintek Corp. 


Xicor 


Xicor, Inc. 


Xycom 


Xycom 


Zendex 


Zendex Corp. 


Zilog 


Zilog 


Zymos 


Zymos Corporation 



® IC MASTER 1983 




Datel-lntersil is located in Mansfield. Massachusetts, 
approxinnately 35 miles from Boston. The modem. 
120.000-square-foot fiacility houses our administrative 
offices, our components and systems engineering groups, 
modular and systems production facilities, and the most 
modem thin-film-hybrid production facility in the industry 

Datel-lntersil offers one of the broadest lines of data- 
conversion products in the industry Included are A/D and 
D/A converters, sample-and-holds. operational and 
instrumentation amplifiers, and data-acquisition systems 
— all packaged using the latest in thin-film, hybrid- 
microelectronic-circuit manufacturing technologies. 



Datel-lntersil also offers fast delivery. On stan- 
dard products, delivery typically runs from stock to 
four weeks and from six to eight weeks for full 
military-grade products with Class 883B screening. 

Datel-lntersil is dedicated to maintaining its 
position as an intemational leader in data-conversion 
technology. Vbu can depend on Datel-lntersil for a steady 
flow of new products to meet the growing demand for 
high-performance data-acquisition products. 



)* BE AN EXPERT 
ON DATA ACQUISITION 
REQUEST ORDERING 
DETAILS 



Printed in U.S.A. Copyright © 1982 Datel-lntersil, Inc. All rights reserved. 



C^^rrTl^STriSn 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (61 7)339-9341 /TWX 71 0-346-1 953/TLX 951340 
I ^ 11*— 'r^=CU i '=Tl'-i • Santa Ana, CA (714)835-2751 • Sunnyvale, OA (408)733-2424 • Los Angeles, OA (213)933-7256 
I A niMnnClo'^^nn OVERSEAS: INTERSIL DATEL (UK) LTD-TEL BASINGSTOKE (0256) 57361 • INTERSIL DATEL SARL-TEL. 602 57 11 
Ll^Ulf^lllSirS)UIL* INTERSIL DATELGmbH-TEL. (089)530741 • DATELKKTOKYO-TEL. 793-1031 

PRICES AND SPECIFICATIONS SUBJECT TO CHANGE WITHOUT NOTICE 

© IC MASTER 1983 2613 



New Products from 
Datel Intersil 



(0 
1_ 



•+-> 

c 

CO 

O 




AM-542, AM-543 programmable gain instrumentation 
amplifiers feature digital gain selection 

The AM-542 and AM-543 are high-performance, digitally- 
controlled, programmable-gain instrumentation amplifiers. The 
AM-542 permits selection of gains from 1 to 1024 in 11 binary 
weighted steps; the AM-543 permits selection of gains from 1 
to 128 in 8 binary weighted steps. Gain selection is ac- 
complished through the input of a 4-bit word. The AM-542 is 
optimized for low-drift, low-noise performance while the 
AM-543 is tailored for high-speed applications. 




SHM-7 new video speed sample-hold features ultra-high 
speed and dual outputs 

DATEL-INTERSIL's SHM-7 is an ultra-fast sample-hold 
amplifier designed for high-speed signal processing applica- 
tions. The SHM-7 acquires a 2V input change to 0.1% in only 
40 ns and the hold mode settling time is only 20 ns; making 
possible sampling rates of up to 17MHz. A unique feature of 
the SHM-7 is its dual outputs, each with a ± 5V output voltage 
range at 30 mA and an output impedance of 13Q. The outputs 
may be tied together to increase the output current and 
decrease the output impedance. 




SHM-9 fast sample-hold features high performance at low 
cost 

The SHM-9 is a complete, self-contained sample-hold 
amplifier that combines high perfonnance versatility with low 
cost ($39.00, 1-24 qty). The SHM-9 includes a bipolar input 
amplifier, a low-leakage electronic switch, a FET output 
amplifier, a preciston 1000 pF hold capacitor and logic control 
circuitry. The internal control circuitry allows the SHM-9 to be 
interfaced with virtually any A/D converter using the 
converter's Start/Convert and E.O.C. (status) signals. Active 
laser trimming of highly stable thin-film resistor networks 
minimizes offset and sample-to-hold offset errors, eliminating 
the need for external adjustment circuits. 



2614 



DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (617) 339-9341ATWX 71 0-346-1 953/TLX 951340 

© 10 MASTER 1983 





DAC-72 industry standard, high resoiution microeiectronic 
D/A converter 

The DAC-72 series is a comprehensive family of high perfor- 
mance 16-bit D/A converters offering voltage or current out- 
puts with either complementary binary or 4-digit BCD, TTL 
compatible, input coding. Linearity error is ± 0.003% FSR 
maximum and settling time for an output voltage step of 20V 
to ±0.003% is only 10 ^ts. Current output settling time, 2 mA 
to ± 0.003%, is only 1 /is. All models are cased in a 
miniature, hermetically sealed, 24-pin package and are com- 
pletely pin and function compatible with industry standard 
DAC-72 converters. 



CD 
■+— > 

Q 




DAC-UP10B new 10-bit D/A with input registers 

The DAC-UP10B is a low cost, monolithic, 10-bit D/A con- 
verter with internal registers. The device also includes a high- 
speed output amplifier, stable internal reference, and an input 
buffer amplifier. Low loading latches, adjustable logic 
thresholds and addressing capability allow the DAC-UP10B to 
directly interface with many microprocessor and logic controll- 
ed systems. The output voltage range is to + 10V for 
unipolar mode, ± 5V for bipolar. A full scale output change 
settles to within 0.05% FSR in 5 /iS. 




ADC-833 6-bit A/D features video speed at low power 

The ADC-833 is a low-power, video-speed, 6-bit flash A/D 
manufactured with CMOS/SOS technology. The device is 
capable of digitizing an analog input signal at conversion rates 
up to 15MHz while its power consumption is only 200mW. 
The analog input voltage range is +2.5V to + 10V, and 
typical differential linearity error is only ± Vz LSB. Outputs are 
buffered three-state and include an overflow output which 
allows the user to cascade two units to achieve 7-bit resolu- 
tion. 




ADC-830 microprocessor compatible 8-bit A/D converter 

DATEL-INTERSIL's ADC-830 is a low-cost, monolithic 8-bit 
A/D converter designed to operate directly with the 8080A 
control bus via three-state outputs. The device appears as a 
memory location or I/O port to the microprocessor and thus 
does not require interfacing logic. Using the successive ap- 
proximation technique and a modified potentiometric resistor 
ladder, the ADC-830 achieves an 8-bit conversion in 100 /is 
with a maximum total adjusted error of only ± Vz LSB. Its 
combination of low cost, small size, and interface versatility 
mal^e the ADC-830 an ideal choice for many process control 
and instrumentation applications. 



DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (617) 339-9341/TWX 71 0-346-1 953/TLX 951340 
© IC MASTER 1983 2615 




ADO5101 high speed, 8-bit A/D offers high temperature 
operation at iow cost 

The ADC-5101 is a high speed, adjustment-free, 8-bit A/D 
converter. Pin compatible with standard ADC-5101 converters, 
these devices offer high accuracy and high speed over the full 
military operating temperature range of -55°C to + 125°C. 
Designed for operation without external adjustment circuits, 
the ADC-5101 accomplishes an 8-bit conversion in only 900 
ns maximum. Models are available subjected to 100% screen- 
ing to MIL-STD-883 Class B. 



ADC-5210 series adjustment-free 12-bit A/D features high 
accuracy over miiitary temperature range 

The ADC-5210 series are high performance, 12-bit successive 
approximation A/D converters. Completely pin and function 
compatible with standard ADC-5210 devices, these models of- 
fer significantly improved high-temperature operation at lower 
cost. Full scale absolute accuracy error is a maximum of 
±0.05% FSR at +25''C and only ±0.2% FSR over the full 
military operating temperature range of -55°C to + 125°C; 
an improvement of 10 LSBs over the error specified on com- 
peting devices. MIL-STD-883 screening is available. 




ADC-84, 85, 87 new, industry standard military and 
industriai 12-bit A/D converters 

DATEL-INTERSIL's ADC-84, ADC-85, and ADC-87 series 
devices are high-performance, low-cost 10 and 12-bit suc- 
cessive approximation analog to digital converters. Direct 
replacements for industry standard APC-84/85/87 converters, 
these devices offer improved performance and reliability. Each 
converter is available in two performance grades; 12 bits of 
resolution at a maximum conversion speed of 10 /is, or 10 bits 
of resolution at a conversion speed of 6 ^ maximum. The 
ADC-87 is specified for operation over the full military 
operating temperature range of -55°C to + 125°C. Versions 
of this model are availabel screened to MIL-STD-883B. 




DAC-85, DAC-87 new, industry standard miiitary and 
industrial 12-bit D/A converter 

The DAC-85 and DAC-87 are DATEL-INTERSIL's new high- 
performance, 12-bit D/A converters. This comprehensive line 
of D/As allows a choice of voltage or current output models 
with either 12-bit binary or 3-digit BCD coding. The DAC-87 is 
specified for operation over the -55°C to + 125**C military 
temperature range, and is available with 100% screening in 
accordance with MIL-STD-883B. This family of units has been 
specifically designed to be pin and function compatible with 
industry standard DAC-85/87 converters while offering 
substantially improved performance. 



DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL (617) 339-9341/TWX 71 0-346-1 953/TLX 951340 
2616 © IC MASTER 1983 



MUnHHtSB 




llll§|^sp|||iiii|^ 



ll||M||P^p| 




Datel'Intersil 
delivers fast. . . 

Industry standard products . . . 

You can get delivery on data cxjnver- 
sion hybrids screened to MIL-STD- 
8838 class B from stock to six weeks. 
And we mean production quantities — 
not just samples — (of proprietary and 
second-source industry standard de 
vices). For example, the DAC-87 offers 
a full range of current or voltage out- 
put models with either binary or BCD 
coding. 

Built by the book. . . 

Fast turnaround on mil-spec and hi-rel 
hybrids is easier for us than for others 
because Datel-Intersil has one of the 
largest, most completely automated 
hybrid production facilities in the in- 
dustry And, our entire hybrid op)era- 
tion, including lot control, quality 
control, calibration control, manufac- 
turing and testing facilities has been 
designed to comply with MIL-M- 
38510. 

Proven in the field . . . 

Datel-lntersil delivers on performance. 
Our hybrids are proving their reliability 
in many of todays most demanding 
military applications — the F-18, F-16 
and XM-1 tank, to name just a few. 
And, if you hapF)en to need screen- 
ing beyond 883B class B, such as 
class S, we are ready to meet your re- 
quirements. 

To meet your needs . . . 

If you're fed up with trade-offs — in per- 
formance, delivery and price — come 
to Datel-Intersil. We're your dq^endable 
source for data conversion hybrids , . . 
made to the industry's highest quality 
and reliability standards . . . delivered 
when you need them ... at prices that 
make them the industry's best value. 



Want to know more? contact: 




© IC MASTER 1983 



Primed in U.S.A. Copyright © 1982 Datel-Intersil. Inc. 
All rights reserved. 

11 CABOT BOULEVARD, iVIANSFIELD, MA 02048/TEL. 
(617)339-9341 /TWX 710-346-1953/TLX 951340 
• Santa Ana, CA (714)835-2751 • Sunnyvale, CA 
(408)733-2424 • Los Angeles. CA (213)933- 
7256 • OVERSEAS: INTERSIL DATEL (UK) LTD-TEL. 
BASINGSTOKE (0256) 57361 • INTERSIL DATEL SARL- 
TEL. 602 57 11 • INTERSIL DATEL GmbH-TEL. 
(089)530741 • DATEL KK TOKYO-TEL. 793-1031 

PRICES AND SPECIFICATIONS SUBJECT TO CHANGE 
WITHOUT NOTICE 



2617 



(O 




CO 

Q 



Hybrid military products 



>_ 

(D 
-♦— ' 

C 



Datel-lntersil is a recognized industry leader in the design and 
manufacture of thin film hybrid data conversion products which 
meet the most demanding reliability requirements for military 
and aerospace applications per MIL-specifications. Datel- 
Intersil's data conversion products are currently used in a wide 
number of military and aerospace flight systems and in high reli- 
ability ground support and test systems. Datel-lntersil's modern 
120,000 square foot manufacturing facility in Mansfield, Massa- 
chusetts includes the most automated and advanced manufac- 
turing, test and calibration equipment available in the industry 
This capability, supported by a Quality Assurance Program with 
full emphasis on product quality assurance and reliability, pro- 
vides an experienced and reliable source for data converter prod- 
ucts to the screening and qualification requirements of Methods 
5004, 5005, and 5008 of MIL-STD-883B in compliance with MIL-M- 
38510 (specified by Datel-lntersil as "Q.L" devices). 



The Quality Assurance operation at Datel-lntersil monitors all 
areas of manufacturing and test, controls manufacturing and 
screening standards, maintains lot traceability procedures, and 
sets material standards to assure product quality All purchased 
and internally manufactured components are procured or manu- 
factured to precise specification control drawings. All compo- 
nents are 100% electrically tested and 100% visually inspected 
either by the vendors or internally within Datel-lntersil's facilities. 
Assembly and test processes and work stations are carefully 
monitored by Quality Assurance using fully documented proce- 
dures to guarantee high standards of workmanship and quality in 
all of Datel-lntersil's products. 

Datel-lntersil products with the suffix "Q.L." are fully screened In 
accordance with Methods 5004 and 5008 of MIL-STD-883B as 
amended by MIL-M-38510. The following list briefly summarizes 
Datel-lntersil's hybrid military products. 



(D 
-t— • 

Q 



ANALOQ-TO-DIQITAL CONVERTERS 









CONVERSION 




OPERATING 




MODEL NO. 


RESOLUTION 


TIME 


LINEARITY 


TEMR RANGE (° 




ADC-HC12BMM 


12 bits 


300 /isec 


± Vz LSB 


-55 to -1-125 




AnC-Hni?BMM-OL 

rWJ\J Vt\^ I^DlVIIVl VjCI— 




0\J\J /Xoc(/ 


J. 1/. I QP 


— 00 lO +l^O 








9 fisec 


± 72 LOD 


— 00 TO + lUU 






19 hitQ 


o /XocC 


J. 1/, 1 en 


cc f— 1 inn 
— 00 lO -r 1 UU 




ADC-HX12BMM 


19 hitQ 




X /2 LOD 


— 00 lO -1- lUU 




ADC-HX12BMM-QL 


12 bits 


20 fisec 


± V2 LSB 


-55 to -1-100 






19 hitc 
\c. UllS 


8 nSBC 


J. 1/ 1 CD 
± 72 LOD 


— 00 to + 100 




ADC-H712BMM-OL 


19 hitQ 

Ic. UllO 


8 /xsec 


± 72 LOD 


cc 4^ I i r\A 

— 00 to + 100 


NEW 


ADC-ftT-IO 

ry\J\j Ol - IV/ 


in hitc 
lU UllO 


6 /xsec 


J. 1A 1 CD 
± 72 LOD 


cc , i oc 
— 00 10 1 ^0 


NEW 


ADC.87-10-OL 


in hitc 
lU UllO 


6 /isec 


± 72 LOD 


cc tn _l_ IOC 

— 00 to -1- 1 *:0 


NEW 


ADC-87-12 


12 bits 


10/xsec 


± V2 LSB 


-55 to ■H25 


NEW 


ADC-87-12-OI 


19 hitc 
1^ UllO 




J. 1/, 1 OR 
i 72 LOD 


cc ir\ _l_ IOC 

— 00 to -i- 1 ^0 




ADC-81'iMM 


R hitc 
O UllO 


fVu ns6C 


a. 1A 1 CD 
± 72 LOD 


cc fz-k _i_ iOC 

— 00 to + 




ADC-ai'iMM-OL 


R hitQ 

O UllO 


f\j\j ns6C 


■4- 1A 1 QP 
± 72 LOD 


cc in _L iOC 

— 00 to -t- 1« 




ADC-816MM 


in hitc 
lu UllO 


OUU llbc^o 


-•- 1A 1 QP 
± /2 LOD 


cc _i_ iOC 
— 00 to + 1^0 




ADC-816MM-QL 


10 bits 


800 nsec 


± Vi LSB 


-55 to -1-125 




ADC-817MM 


12 bits 


2 /isec 


± Vz LSB 


-55 to -H25 




ADC-817MM-QL 


12 bits 


2 /isec 


± Vz LSB 


-55 to -H25 




ADC-825MM 


8 bits 


1 (isec 


± Vz LSB 


-55 to -1-125 




ADC-825MM-QL 


8 bits 


1 usee 


± Vz LSB 


-55 to -H25 




ADC-826MM 


10 bits 


1.4 fisec 


± Vz LSB 


-55 to -H25 




ADC-826MM-QL 


10 bits 


1.4 fiSec 


± y2 LSB 


-55 to -1-125 




ADC-827MM 


12 bits 


3 ^sec 


± Vz LSB 


-55 to -t-125 




ADC-827MM'QL 


12 bits 


3 usee 


± V2 LSB 


-55 to -H25 


NEW 


ADC-5101H 


8 bits 


900 nsec 


± Vz LSB 


-55to-H25 


NEW 


ADC-5101H-QL 


8 bits 


900 nsec 


± Vz LSB 


-55to-H25 


NEW 


ADC-5210H 


12 bits 


13/isec 


± V2 LSB 


-55 to -I-125 


NEW 


ADC-5210H-QL 


12 bits 


13 fisec 


± V2 LSB 


-55 to ■♦-125 


NEW 


ADC-5211H 


12 bits 


13/xsec 


± y2 LSB 


-55 to -H25 


NEW 


ADC-5211H-QL 


12 bits 


13 usec 


± 1/2 LSB 


-55 to -H25 


NEW 


ADC-5212H 


12 bits 


13/isec 


± Vz LSB 


-55 to -H25 


NEW 


ADC-5212H-QL 


12 bits 


13 usee 


± V2 LSB 


-55 to -1-125 


NEW 


ADC-5213H 


12 bits 


13 usee 


± Vz LSB 


-55 to +125 


NEW 


ADC-5213H-QL 


12 bits 


13 usee 


± V2 LSB 


-55 to -»-125 


NEW 


ADC-5214H 


12 bits 


13 usee 


± Vz LSB 


-55 to -1-125 


NEW 


ADC-5214H-QL 


12 bits 


13 usee 


± Vz LSB 


-55 to -^125 


NEW 


ADC-5215H 


12 bits 


13/isec 


± V2 LSB 


-55 to -H25 


NEW 


ADC-5215H-QL 


12 bits 


13 usee 


± Vz LSB 


-55 to +125 


NEW 


ADC-5216H 


12 bits 


13 usee 


± y2 LSB 


-55 to +125 


NEW 


ADC-5216H-QL 


12 bits 


13 /isec 


± Vz LSB 


-55 to +125 



DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (617) 339-9341/TWX 710-346-1953/TLX 951340 
2618 © IC MASTER 1983 



Commercial and Industrial 
Products 



For less demanding commercial/industrial requirements, 
Datel-lntersil offers a comprehensive selection of high 
quality data acquisition products. Included are A/D and 
D/A Converters, Sample and Holds, Operational and Instru- 
mentation Amplifiers and Data Acquisition Subsystems. 

Advanced manufacturing techniques, measurement and 
test equipment, combined with definitive quality as- 
surancy procedures guarantee that all of DateMntersil's 
products meet or exceed the most exacting standards of 
workmanship. The following list briefly summarizes the 
commercial and industrial products offered by Datel- 
lntersil. 




ANALOG TO DIGITAL CONVERTERS 









CONVERSION 




OPERATING 




MODEL NO. 


RESOLUTION 


TIME 


LINEARITY 


TEMR RANGE (0 




ADC-EK8B 


8 bits 


1.8 msec 


± V2 LSB 


to + 70 






10 bits 


6 msGC 




— <:0 to + OD 




ADC-EK12B 


12 bits 


24 msec 


± V2 LSB 


- 25 to + 85 




ADC-ET8BC 


_ 8 bits 


1.8 msec 


± V2 LSB 


to +70 




ADC-ET8BM 


8 bits 


1.8 msec 


± V2 LSB 


-55 to -H25 




ADC-ET10BC 


10 bits 


6 msec 


± Vz LSB 


to -1- 70 




AUU-b 1 lUbM 


10 bits 


6 msec 


± Vz LSB 


— 55 to + 125 




ADC-ET12BC 


12 bits 


24 msec 


± Vz LSB 


to -t- 70 




ADC-ET12BR 


12 bits 


24 msec 


± Vz LSB 


- 25 to -1- 85 




ADC-ET12BM 


12 bits 


24 msec 


± Vz LSB 


-55 to -H25 




ADC-HC12BMC 


12 bits 


300/xsec 


± Vz LSB 


to +70 




ADC-HC12BMR 


12 bits 


300 fxsec 


± Vz LSB 


- 25 to -t- 85 




ADC-HS12BMC 


. 12 bits 


9 ixsec 


± Vz LSB 


^0 +70 




ADC-HS12BMR 


12 bits 


9 fisec 


± Vz LSB 


-25 to +85 




ADC-HU3BMC 


3 bits 


20 nsec 


0.1% of FSR 


to + 70 




ADC-HU3BMR 


3 bits 


20 nsec 


0.1% of FSR 


- 25 to + 85 




ADC-HU3BMM 


3 bits 


20 nsec 


0.1% of FSR 


-55 to +125 




ADC-HX12BGC 


12 bits 


20 usec 


± Vz LSB 


to + 70 




ADC-HX12BMC 


12 bits 


20 Aisec 


± Vz LSB 


to +70 




ADC-HX12BMR 


12 bits 


20 /xsec 


± Vz LSB 


- 25 to + 85 




ADC-HZ12BGC 


12 bits 


8 /tsec 


± Vz LSB 


to + 70 




ADC-HZ12BMC 


12 bits 


8 /xsec 


± Vz LSB 


to + 70 




ADC-HZ12BMR 


12 bits 


8 fisec 


± Vz LSB 


- 25 to + 85 




ADC-MC8BC 


8 bits 


500 usec 


± Vz LSB 


to +70 




ADC-MC8BM 


8 bits 


500 fisec 


± Vz LSB 


-55 to +125 


NEW 


ADC-84-10 


10 bits 


6/iSec 


± Vz LSB 


to +70 


NEW 


ADC-84-12 


12 bits 


10 fisec 


± Vz LSB 


to +70 


NEW 


ADC-85C-10 


10 bits 


6 fisec 


± Vz LSB 


to + 70 


NEW 


ADC-85C-12 


12 bits 


10 /isec 


± Vz LSB 


to +70 


NEW 


ADC-85-10 


10 bits 


6/isec 


± Vz LSB 


- 25 to + 85 


NEW 


ADC-85-12 


12 bits 


10/isec 


± Vz LSB 


- 25 to + 85 




ADC-815MC 


8 bits 


700 nsec 


± Vz LSB 


Oto +70 




ADC-815MR 


8 bits 


700 nsec 


± Vz LSB 


- 25 to + 85 




ADC-816MC 


10 bits 


800 nsec 


± Vz LSB 


to + 70 




ADC-816MR 


10 bits 


800 nsec 


'±Vz LSB 


-25 to +85 




ADC-817MC 


12 bits 


2 /xsec 


± Vz LSB 


to +70 




ADC-817MR 


12 bits 


2 fisec 


± Vz LSB 


- 25 to + 85 




ADC-825MC 


8 bits 


1 fisec 


± Vz LSB 


to +70 




ADC-825MR 


8 bits 


1 lisec 


± Vz LSB 


- 25 to + 85 




ADC-826MC 


10 bits 


1.4 pisec 


± Vz LSB 


to +70 



V) 
\— 

(D 

•4-* 

c 

I 

0) 
CO 

O 



DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, f^A 02048/TEL. (617) 339-9341/TWX 710-346-1953/TLX 951340 
© IC MASTER 1983 2619 



DIQITAL-TO-ANALOQ CONVERTERS 



NEW 
NEW 

NEW 
NEW 







OUTPUT 




OPERATING 


MODEL NO. 


RESOLUTION 


SETTLING 


LINEARITY 


TEMP. RANGE («C) 






TIME 




DAC-HA10BM 


10 bits 


1.3/iSec 


± V2 LSB 


-55 to +125 


DAC-HA10BMQL 


10 bits 


1.3 usee 


± Vz LSB 


-55 to +125 


DAC-HA12BM 


12 bits 


5 ;tsec 


± Vi LSB 


-55 to +125 


DAC-HA12BMQL 


12 bits 


5 /isec 


± Vz LSB 


-55 to +125 


DAC-HA14BM 


14 bits 


7 fisec 


±1 LSB 


-55 to +125 


DAC-HA14BM-QL 


14 bits 


7 usee 


±1 LSB 


-55 to +125 


DAC-HF8BMM 


8 bits 


25 nsec 


± Vz LSB 


-55 to +125 


DAC-HF8BMM-QL 


8 bits 


25 nsec 


± Vi LSB 


-55 to +125 


DAC-HF10BMM 


10 bits 


25 nsec 


± V2 LSB 


-55 to +125 


DAC-HF10BMM-QL 


10 bits 


25 nsec 


± Vz LSB 


-55 to +125 


DAC-HF12BMM 


12 bits 


50 nsec 


± Vz LSB 


-55 to +125 


DAC-HF12BMM-QL 


12 bits 


50 nsec 


± Vz LSB 


-55 to +125 


DAC-HK12BMM 


12 bits 


3 fisec 


± Vz LSB 


-55 to +125 


DAC-HK12BMM-QL 


12 bits 


3 /xsec 


± Vz LSB 


-5510+125 


DAC-HP16BMM 


16 bits 


15 /isec 


±2 LSB 


-55 to +125 


DAC-HP16BMM-QL 


16 bits 


15 (tsec 


±2 LSB 


-55 to +125 


DAC-HZ12BMM 


12 bits 


3 /xsec 


± Vz LSB 


-55 to +125 


DAC-HZ12BMM-QL 


12 bits 


3 usec 


± Vz LSB 


-55 to +125 


DAC-87-CBI-I 


12 bits 


300 nsec 


± Vz LSB 


-55 to +125 


DAC-87-CBI-I-QL 


12 bits 


300 nsec 


± Vz LSB 


-55 to +125 


DAC-87-CBI-V 


12 bits 


3 ^lsec 


± Vz LSB 


-55 to +125 


DAC-87-CBI-V-QL 


12 bits 


3 ixsec 


± Vz LSB 


-55 to +125 



SAMPLE-HOLD AMPLIFIERS 



MODEL NO. 

SHM-6MM 
SHM-6MM-QL 
SHM-HUMM 
SHM-HUMM-QL 



ACCURACY 

0.01 % 
0.01% 
0.1% 
0.1% 



ACQUISITION 
TIME 

1 fiSec 
1 fisec 
25 nsec 
25 nsec 



HOLD MODE 
DROOP 

10/iV//xsec 
10/xV//iSec 
50/x\///isec 

50/iV/;iSeC 



OPERATING 
TEMR RANGE (*»C) 

- 55 to + 1p5 
-55 to +125 
-55 to +125 
-55 to +125 



OPERATIONAL AMPLIFIERS 

INPUT GAIN OPERATING 

MODEL NO. OFFSET VOLTAGE BANDWIDTH OUTPUT TEMP. RANGE (»C) 

AM-500MM 3mV 130 MHz ± 10V @ 50 mA -55 to +125 

AM-500MM-QL 3 mV 130 MHz ± 10V @ 50 mA -55 to +125 



DIGITALLY PROGRAMMABLE INSTRUMENTATION AMPLIFIERS 

OPERATING 

MODEL NO. GAIN RANGE SETTLING TIME OUTPUT TEMR RANGE (°C) 

NEW AM-542MM 1 to 1024 150,xsec ± 10.5V @ 5 mA -55 to +125 

NEW AM-542MM-QL 1 to 1024 150/xsec ± 10.5V @ 5 mA -55 to +125 



DATA ACQUISITION SUBSYSTEMS 



MODEL NO. 

HDAS-8MM 
HDAS-8MM-QL 
HDAS-16MM 
HDAS-16MM-QL 



RESOLUTION INPUT CHANNELS 



12 bits 
12 bits 
12 bits 
12 bits 



8 Differential 
8 Differential 
16 Single-Ended 
16 Single-Ended 



THROUGHPUT 
RATE 

50 kHz 
50 kHz 
50 kHz 
50 kHz 



OPERATING 
TEMR RANGE ("C) 

-55 to +125 
-55 to +125 
-55 to +125 
-55 to +125 



DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (617) 339-9341/TWX 710-346-1953/TLX 951340 

© 10 MASTER 1983 



ANALOG TO DIGITAL CONVERTERS 









CONVERSION 




OPERATING 




MODEL NO. 


RESOLUTION 


TIME 


LINEARITY 


TEMP. RANGE (**( 




ADC-826MR 


10 bits 


1.4 fisec 


± V2 LSB 


-25 to +85 




ADC-827MC 


12 bits 


3 usec 


± Vi LSB 


Oto +70 




ADC-827MR 


12 bits 


3 /isec 


± V2 LSB 


- 25 to +85 


NEW 


ADC-830C 


8 bits 


100 /xsec 


± Vz LSB 


Oto +70 


NEW 


ADC-833R 


6 bits 


66 nsec 


± Vi LSB 


-25 to +85 




ADC-856C 


10 bits 


l/iSec/LSB 


± Vi LSB 


Oto +70 




ADC-856M 


10 bits 


1/xsec/LSB 


± y2 LSB 


-55 to +125 


NEW 


ADC-5101 


8 bits 


900 nsec 


± Vi LSB 


Oto +70 


NEW 


ADC-5101E 


8 bits 


900 nsec 


± Vi LSB 


-25 to +85 


NEW 


ADC-5210 


12 bits 


13 ftsec 


± Vi LSB 


Oto +70 


NEW 


ADC-5210E 


12 bits 


^3^lsec 


± Vz LSB 


-25 to +85 


NEW 


ADC-5211 


12 bits 


13 usee 


± Vi LSB 


Oto +70 


NEW 


ADC-5211E 


12 bits 


13 /isec 


± LSB 


- 25 to +85 


NEW 


ADC-5212 


12 bits 


13 /xsec 


± Vz LSB 


Oto +70 


NEW 


ADC-5212E 


12 bits 


13;isec 


± V2 LSB 


- 25 to +85 


NEW 


ADC-5213 


12 bits 


13 usec 


± Vi LSB 


to + 70 


NEW 


ADC-5213E 


12 bits 


13 fisec 


± Vi LSB 


-25 to +85 


NEW 


ADC-5214 


12 bits 


13 ^sec 


± Vj LSB 


Oto +70 


NEW 




10 hitc 
1^ UllS . 


13 ^sec 


-t- V-> 1 

X /2 L.OD 


_ OK to 4- fl.S 


NEW 


ADC-5215 


12 bits 


13 /isec 


± V2 LSB 


Oto +70 


NEW 


ADC-5215E 


12 bits 


13/iSec 


± V2 LSB 


- 25 to + 85 


NEW 


ADC-5216 


12 bits 


13 /isec 


± V2 LSB 


Oto +70 


NEW 


A r\r* co-i 


12 bits 


13/iSec 


± V2 LSB 


0*» ir\ J. 






DIGITAL TO ANALOG CONVERTERS 










OUTPUT SETTLING 




OPERATING 




MODEL NO. 


RESOLUTION 


TIME 


LINEARITY 


TEMR RANGE (»( 




DAC-HA10BC 


10 bits 


1 .3 fxsec 


■t. 1A 1 CO 
± /2 Lots 


to + 70 




DAC-HA10BR 


10 bits 


1 .3 ^sec 


-b 1/« 1 CP 
Z 72 Lots 


-25 to +85 




DAC-HA12BC 


12 bits 


5 /xsec 


.^1/. t CD 
± 72 Loo 


Oto +70 




DAC-HA12BR 


12 bits 


5/iSec 


+ 72 LSB 


-25 to +85 




DAC-HA14BC 


14 bits 


7 /tsec 


± Vi LSB 


Oto +70 




DAC-HA14BR 


14 bits 


7 fxsec 


± 72 LOD 


-25 to +85 




DAC-HF8BMC 


8 bits 


25 nsec 


± 72 LoD 


Oto +70 




DAC-HF8BMR 


8 bits 


25 nsec 


_i_ 1/ 1 CD 
± 72 LoD 


- 25 to + 85 




DAC-HF10BMC 


10 bits 




± V2 LSB 


Oto +70 




DAC-HF10BMR 


10 bits 


25 nsec 


± Vz LSB 


- 25 to + 85 




DAC-HF12BMC 


12 bits 


50 nsec 


± y2 LSB 


Oto +70 




DAC-HF12BMR 


12 bits 


50 nsec 


± V2 LSB 


-25 to +85 




DAC-HK12BGC 


12 bits 


3 /xsec 


A V2 LSB 


Oto +70 




DAC-HK12BMC 


12 bits 


3 fisec 


± V2 LSB 


Oto +70 




DAC-HK12BMR 


12 bits 


3 usec 


± V2 LSB 


-25 to +85 




DAC-HP16BGC 


16 bits 


15/isec 


± V2 LSB 


Oto +70 




DAC-HP16BMC 


16 bits 


15 /xsec 


± Vz LSB 


Oto +70 




DAC-HP16BMR 


16 bits 


15 fisec 


± 72 LSB 


-25 to +85 




DAC-HZ12BGC 


12 bits 


3/iSec 


± V2 LSB 


to +70 




DAC-HZ12BMC 


12 bits 


3/iSec 


± Vz LSB 


Oto +70 




DAC-HZ12BMR 


12 bits 


3/xsec 


± ^/i LSB 


-25 to +85 




DAC-IC8BC 


8 bits 


300 nsec 


± Vz LSB 


Oto +70 




DAC-IC8BM 


8 bits 


300 nsec 


± V2 LSB 


-55 to +125 




DAC-IC10BC 


10 bits 


250 nsec 


±1 LSB 


Oto +70 




DAC-IC10B 


10 bits 


250 nsec 


± Vz LSB 


Oto +70 




DAC-IC10BM 


10 bits 


250 nsec 


± Vz LSB 


-55 to +125 




DAC-UP8BC 


8 bits 


2fisec 


± Vz LSB 


Oto +70 




DAC-UP8BM 


8 bits 


2 fisec 


± y2 LSB 


-55 to +125 


NEW 


DAC-UP10BC 


10 bits 


5 usee 


± Vz LSB 


Oto +70 




DAC-08BC 


8 bits 


2 usee 


± y2 LSB 


Oto +70 




DAC-08BM 


8 bits 


2 Atsec 


± Vz LSB 


-55 to +125 


NEW 


DAC-85C-CBI-I 


12 bits 


300 nsec 


± Vz LSB 


Oto +70 


NEW 


DAC-85C-CBI-V 


12 bits 


Zfisec 


±y2 LSB 


Oto +70 


NEW 


DAC-85-CBI-I 


12 bits 


300 nsec 


± Vz LSB 


-25 to +85 


NEW 


DAC-85-CBI-V 


12 bits 


3 usee 


± V2 LSB 


-25 to +85 


NEW 


DAC-562C 


12 bits 


400 nsec 


± Vz LSB 


to + 70 


NEW 


DAC-562M 


12 bits 


400 nsec 


± V2 LSB 


-55 to +125 


NEW 


DAC-608 


8 bits 


1 pisee 


± V2 LSB 


to + 70 


NEW 


DAC-610 


10 bits 


500 nsec 


± Vz LSB 


to + 70 


NEW 


DAC-612 


12 bits 


1 usee 


± V2 LSB 


-25 to +85 



DATEL-INTERSIL. INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (61 7) 339-9341/TWX 710-346-1953/TLX 951340 
© 10 MASTER 1983 2621 



SAMPLE-HOLD AMPLIFIERS 







APmilQITIOM 




OPPRATINfi 


MrtrtPi MO 




TIMP 
1 llmC 


DROOP 


TPMP RANAP/^O 


SHM-IC-1 


0.01% 




50/xV/msec 


OtO +70 


onM-IO-lM 


U.U 1 vo 


5 fiSQC 


50/iV/msec 


EC tn J. 1 0K 


CUM 1 M O 


U.Ul vo 


6 ^S6C 


<fuu/^ v/mscc 


n tn J. 7n 
U lO + lU 


CUM 1 M OM 


o m OA 

U.U 1 /o 


6 liSGC 


luu/iV/mscc 


OO lO + 1 fcO 


CUIkil Ul 


n 1 0/ 
U. 1 /o 


25 ns6C 


50/xV//xSec 


U lO + lU 


SHM-HUMR 


0.1% 


25 nsec 


50/tVVsec 


-25 to +85 


SHM-6MC 


0.01 % 


1 f*sec 


lO/iVZ/iSec 


to + 70 


SHM-6MR 


0.01% 


1 /xsec 


10/iV//iSec 


- 25 to + 85 


SHM-7MC 


0.1% 


40 nsec 


lOOmV/msec 


to + 70 


SHM-7MR 


0.1% 


40 nsec 


lOOmV/msec 


-25 to +85 







ANALOG MULTIPLEXERS 








INPUT 




ACCESS 




CHANNEL 


OPERATING 


MODEL NO. 


CHANNELS 




TIME 


ON RESISTANCE 


TEMP. RANGE (°i 


MV-808 


8 Single-Ended 




350 nsec 






to + 70 


MV-808M 


8 Single-Ended 








250n 


-55 to +125 


MV-1606 


16 Single-Ended 




300 nsec 




270fi 


to + 70 


MV-1606M 


16 Single-Ended 




'^00 n<ipr 




270n 


-55 to +125 


MVD-409 


4 Differential 




350 nsec 




^ouw 


to + 70 


MVD-409M 


4 Differential 




350 nsec 




250Q 


-55 to +125 


MVD-807 


8 Differential 




inn neon 




270n 


to +70 


MVD-807M 


8 Differential 




300 nsec 




2700 


-55 to +125 


MX-808 


8 Single-Ended 




500 nsec 




1.5 kn 


to + 70 


MX-808M 


8 Single-Ended 




500 nsec 




1.5 kn 


-55 to +125 


MX-818C 


8 Single Ended or 




125 nsec 




750n 


n tn- A. 7n 

U lO "T #u 




4 Differential 












MX-818M 


8 Single-Ended or 




125 nsec 




750n 


OD lU -r 1 ^O 




4 Differential 












MX-1606 


16 Single-Ended 




500 nsec 




1.5 kfi 


U lO -1- f u 


MX-1606M 


16 Single-Ended 




500 nsec 




1.5 kn 


— OO lO T l£0 


MX-1616C 


16 Single-Ended or 




150 nsec 




750n 


n in _i_ 7n 
U TO + f u 




8 Differential 












MX-1616M 


16 Single-Ended or 




150 nsec 




750n 


— 00 10 + 1^0 




8 Differential 










MXD-409 


4 Dir rrential 




500 nsec 




1.5 kn 


n in _l_ 7rt 

U lO + f u 


MXD-409M 


4 Differential 




500 nsec 




1.5 kn 


— 00 lO + 1 <£0 


MXD-807 


8 Differential 




500 nsec 




1.5 kn 


C\ in J. 7n 
U 10 + lU 


MXD-807M 


8 Differential 




500 nsec 




1.5 kn 


CC in _i_ IOC 
— OO lO -r ItO 






OPERATIONAL AMPLIFIERS 








INPUT OFFSET 










OPERATING 


MODEL NO. 


VOLTAGE GAIN BANDWIDTH 


OUTPUT 


TEMR RANGE ("O 


AM-410-2C 


1.5 mV 


18 MHz 




±11V (g 


) 8 mA 


Oto +70 


AM-410-2M 


1 mV 


18 MHz 




±12V @ 


) 10 mA 


-55 to +125 


AM-411-2C 


1.5 mV 


50 MHz 




±11V (g 


» 8 mA 


to + 70 


AM-411-2M 


1 mV 


60 MHz 




+ 12V (g 


) 10 mA 


-55 to +125 


AM-427-A 


100 ,xV 


5 MHz 




± 11.5V 


@ 5.75 mA 


- 25 to + 85 


AM-427-B 


25 tiW 


5 MHz 




±12V (g 


) 6 mA 


- 25 to + 85 


AM-427-M 


100 /iV 


5 MHz 




+ 11.5V 


@ 5.75 mA 


-55 to +125 


AM-430A 


75 /xV 


2.5 MHz 




±10V (g 


) 25 mA 


to +70 


AM-430B 


25 mV 


2.5 MHz 




±10V @ 


) 25 mA 


to +70 


AM-430M 


75 


2.5 MHz 




±10V s 


) 25 mA 


-55 to +125 


AM-450-2 


8mV 


12 MHz 




±10V @ 


) 10 mA 


to + 70 


AM-450-2M 


8 mV 


12 MHz 




±10V (g 


) 10 mA 


-55 to +125 


AM-452-2 


5 mV 


20 MHz 




±10V @ 


) 10 mA 


Oto +70 


AM-452-2M 


5mV 


20 MHz 




±10V (g 


} 10 mA 


-55 to +125 


AM-453-2 


4 mV 


10 MHz 




±12V (g 


) 20 mA 


to +70 


AM-453-2M 


4nnV 


10 MHz 




±12V (g 


) 20 mA 


-55 to +125 


AM-460-2 


5mV 


12 MHz 




±10V (g 


) 10 mA 


to + 70 


AM-460-2M 


5 mV 


12 MHz 




±10V (g 


) 10 mA 


-55 to +125 


AM-462-2 


3mV 


100 MHz 




±10V (g 


) 10 mA 


to +70 


AM-462-2M 


3mV 


100 MHz 




±10V (g 


) 10 mA 


-55 to +125 


AM-464-2 


6mV 


4 MHz 




±35V (g 


) 10 mA 


Oto +70 


DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (617) 339-934 1/TWX 710-346-1953/TLX 951340 



© 10 MASTER 1983 



OPERATIONAL AMPLIFIERS 



MODEL NO. 



INPUT OFFSET 
VOLTAGE 



GAIN BANDWIDTH 



OUTPUT 



OPERATING 
TEMP. RANGE (^C) 



AM-464-2M 


4 mV 


4 MHz 


±35V a 


5 12 mA 


-55 to +125 


AM-470-2C 


5mV 


1 MHz 


±12V (J 


|) 10 mA 


Oto +70 


AM-470-2M 


3mV 


1 MHz 


±12V a 


|) 10 mA 


-55 to +125 


AM-490-2A 


20 /iV 


3 MHz 


±12V i 


i 10 mA 


to + 70 


AM-490-2B 


20 /iV 


3 MHz 


±12V a 


i 10 mA 


to +70 


AM-490-2C 


20 


3 MHz 


±i2v a 


J 10 mA 


Oto +70 


AM-490-2M 


20 fiV 


3 MHz 


±12V (? 


i 10 mA 


-55 to +125 


AM-500GC 


3mV 


130 MHz 


±iov a 


^ 50 mA 


to + 70 


AM-500MC 


3mV 


130 MHz 


±iov a 


^ 50 mA 


Oto +70 


AM-500MR 


3mV 


130 MHz 


±10V (? 


i 50 mA 


- 25 to + 85 



MODEL NO. 

AM-542MC 
AM-542MR 
AM-543MC 
AM-543MR 



DIGITALLY PROGRAMMABLE INSTRUMENTATION AMPLIFIERS 

SETTLING 

GAIN RANGE TIME OUTPUT 



1 to 1024 
1 to 1024 
1 to 128 
1 to 128 



150 ^isec 
150 /xsec 
6 usec 
6 usec 



± 10.5V @ 5 mA 
± 10.5V @ 5 mA 
±11V @ 1 mA 
±11V @ 1 mA 



OPERATING 
TEMR RANGE ("C) 

to + 70 

- 25 to + 85 

to + 70 

- 25 to + 85 



(0 
lb- 
CD 
•*-> 

C 
I 

CD 

■4— ' 

CO 

o 



MODEL NO. 

DAS-952R 

HDAS-8MC 

HDAS-8MR 

HDAS-16MC 

HDAS-16MR 



DATA ACQUISITION SUBSYSTEMS 

RESOLUTION INPUT CHANNELS 



8 bits 
12 bits 
12 bits 
12 bits 
12 bits 



16 Single-Ended 
8 Differential 
8 Differential 
16 Differential 
16 Differential 



THROUGHPUT 
RATE 



17 kHz 
50 kHz 
50 kHz 
50 kHz 
50 kHz 



OPERATING 
TEMR RANGE CO 

- 25 to + 85 

to + 70 

- 25 to + 85 

to + 70 
-25 to +85 



VOLTAGE TO FREQUENCY CONVERTERS 

OUTPUT GAIN OPERATING 

MODEL NO. LINEARITY RANGE TEMPCO TEMR RANGE ("C) 

VFQ-1C 0.05% 10 kHz to 100 kHz 40 ppm/°C Oto +70 

VFQ-1R 0.05% 10 kHz to 100 kHz 40 ppm/°C -25 to +85 

VFQ-2C 0.01 % 10 kHz to 100 kHz 40 ppm/°C to + 70 

VFQ-3C 0.25% 10 kHz to 100 kHz 40 ppm/°C to +70 



ACTIVE FILTERS 

FREQUENCY Fo OPERATING 

MODEL NO. RANGE ACCURACY RANGE TEMR RANGE («»C) 

FLT-U2 0.001 Hz to 200 kHz ± 5% 0.1 to 1000 to + 70 

NEW FLT-U2-M 0.001 Hz to 200 kHz ±5% 0.1 to 1000 -55 to +125 



DATEL-INTERSIL, INC., 11 CABOT BOULEVARD, MANSFIELD, MA 02048/TEL. (617) 339-9341/TWX 71 0-346-1 953/TLX 951340 
© 10 MASTER 1983 2623 




HI-200 

Dual SPST CMOS Analog Switch 



FEATURES 



DESCRIPTION 



ANALOG VOLTAGE RANGE 
ANALOG CURRENT RANGE 
TURN-ON TIME 
LOW Ron 

LOW POWER DISSIPATION 
TTL/CMOS COMPATIBLE 



+15V 
80mA 
240ns 

15mW 



APPLICATIONS 



• HIGH FREQUENCY ANALOG SWITCHING 

• SAMPLE AND HOLD CIRCUITS 

• DIGITAL FILTERS 

• OP AMP GAIN SWITCHING NETWORKS 



HI-200 Is a monolithic device comprising two independently 
selectable SPST switches which feature fast switching speeds 
(290ns) combined with low power dissipation (ISmWat 250C). 
Each switch provides low "ON" resistance operation for input 
signal voltages up to the supply rails and for signal currents 
up to 80mA. Employing Dielectric Isolation and CMOS process- 
ing, HI-200 operates without any applications problems in- 
duced by latch-up or SCR mode phenomena. 

All devices provide break-before-make switching and are TTL 
and CMOS compatible for maximum application versatility. 
HI-200 is an ideal component for use in high frequency analog 
switching. Typical applications include signal path switching, 
sample and hold circuit, digital filterS/and op amp gain switching 
networks. 

HI-200 is available in DIP and metal (TO-100) cans. H 1-200-2 
is specified from -550C to +1250C while H 1-200-5 operates 
from OOC to +750C. HI-200 is functionally and pin compatible 
with other available "200 series" switches. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 1 1 for Packaging 




IN 2 — ■5-cx' Oj|0 Ip-iO — IN 1 
OUT 2 — -6 " 9 — OUT 1 



— vref 




vref 



AiO 



SWITCH OPEN 
FOR LOGIC HIGH 



-O 'N1 



OUT 2 



A2O — 



[> 



OUT 1 



-O IN 2 



-O OUT 2 



2624 



© IC MASTER 1983 



ABSOLUTE MAXIIViUIVl RATINGS 








Supply Voltage 


44V (±22) 


Total Power Dissipation* 


450mW 


Vref to Ground 


+20V,-5V 


Operating Temperature 




Digital Input Voltags: 


+vSupply +4V 


ui onn 
nl-zUU-^ 


-bo"U to + 1 Zb"L 




-VSupply -4V 


H 1-200-4 


-20OC to +850C 


MlldlUg IlipUl VUlldyt; \Ulit; OWIlLli/ 


+\/o 1 +9 n\/ 
^VSupply +^.uv 


n i-zuu-o 


nor tn +7iiOP 




-VSupply -2.0V 


, Storage Temperature 


-65OCto+150oC 






*Derate 6mW/0C Above Ta = 


750c 



SPECIFICATIONS 



33 



ELECTRICAL CHARACTERISTICS 

Unless Otherwise Specified 

Supplies = +15V, -15V; Vref " Open; VAH(Logic Level High) =2.4V VAL(Logic Level Low) = +0.8V 
For Test Conditions, consult Performance Characteristics 

HI -200-2 HI -200-5 









-55°C to+125°C 


0°C to +75OC 






PARAMETER 


TEMP. 


MIN. 


TYP. 


MAX. 


MIN. 


TYP. 


MAX. 


UNITS 


ANALOG SWITCH CHARACTEHIb 1 IL5> 


















Vs, Analog Signal Range 


Full 


- 10 




J. 1 c 
+ 10 


1 c 
- ID 




+ 10 


V 


RqN, On Resistance (Note 1) 


Full 




55 
80 


70 
100 




55 
72 


80 
100 


n 


'S(OFF)' l^iput Leakage Current 
(Note 6) 


+250C 

Full 




1 

100 


500 




1 

10 


500 


nA 
nA 


'□(OFF). Output Leakage Current 
(Note 6) 


+25°C 
Full 




1 

100 


500 




1 

10 


500 


nA 
nA 


'O(ON)' Leakage Current (Note 6) 


+25°C 
run 




.02 
6 


500 




.02 
6 


500 


nA 

nA 


DIGITAL INPUT CHARACTERISTICS 


















VaL. '"P"t Low Threshold 
VaH> Input High Threshold 


Full 
Full 


2.4 




0.8 


2.4 




0.8 


v 

V 


Ia, Input Leakage Current (High or Low) (Note 2) 


Full 






1.0 






1.0 


^A 


SWITCHING CHARACTERISTICS 


















tOPEN' Break - Before Make Delay (Note 3) 


+25°C 




60 






60 




ns 


tgn, Switch on Time 


+25°C 




240 


500 




240 




ns 


tpff, Switch off Time 


+25OC 




330 


500 




500 




ns 


"Off Isolation" (Note 4) 


+25°C 




70 






70 




dB 


(OFF). Input Switch Capacitance 


+25°C 




5.5 






5.5 




pF 


Cd (OFF). 




+25°C 




5.5 






5.5 




pF 


Cd(ON), 


Output Switch Capacitance 


+25°C 




11 






11 




pF 


Ca. Digital Input Capacitance 


+25°C 




5 






5 




pF 


Cos (OFF). Drain-To-Source Capacitance 


+25°C 




0.5 






0.5 




pF 


POWER REQUIREMENTS (Note 5) 


+25°C 




15 






15 




mW 


Pq, Power Dissipation 
I"*", Current 
r, Current 


Full 
+25°C 

Full 
+25°C 

Full 




0.5 
0.5 


60 
2.0 
2.0 




0.5 
0.5 


60 
2.0 
2.0 


mW 

mA 
mA 
mA 
mA 


NOTES: 


2. Digital Inputs Are MOS Gates - Typical Leakage is 


f = 


= +5V, R 
lOOkHz 


L - IKfl, Cl = lOpF, Vg - 3VRMS, 



Less Than 1 nA 



3. Vah=40V 



5. = +3V or = OV For Both Switches 

6. Refer to leakage current measurement diagram 
on page (3-8) 

Note: HI-200-4 has same specifications as HI-200-5 over the temperature range -20°C to +850C. 



© IC MASTER 1983 



2625 




HI-201 



Quad SPST CMOS 
Analog Switch 



FEA TUBES 



DESCRIPTION 



o 

3 
T3 
C 

o 
o 

E 

(D 
CO 
w 

*^ 

CO 

X 



ANALOG VOLTAGE RANGE 


+15V 


ANALOG CURRENT RANGE 


80mA 


TURN-ON TIME 


185ns 


LOW Ron 


5512 


LOW POWER DISSIPATION 


15mW 


TTL/CMOS COMPATIBLE 





APPLICATIONS 



• HIGH FREQUENCY ANALOG SWITCHING 

• SAMPLE AND HOLD CIRCUITS 

• DIGITAL FILTERS 

• OP AMP GAIN SWITCHING NETWORKS 



HI-201 is a monolithic device comprising four independently 
selectable SPST switches which feature fast switching speeds 
(185ns) combined with low power dissipation (15mW at 25°C). 
Each switch provides low "ON" resistance operation for input 
signal voltages up to the supply rails and for signal currents up 
to 80mA. Employing Dielectric Isolation and CMOS processing, 
HI-201 operates without any applications problems induced 
by latch-up or SCR-mode phenomena. 

Ail devices provide break-before-make switching and are TTL 
and CMOS compatible for maximum application versatility. 
HI-201 is an ideal component for use in high frequency analog 
switching. Typical applications include signal path switching, 
sample and hold circuit, digital filters,and op amp gain switching 
networks. 



HI-201 is available in a 16 lead dual-in-line package. HI-201-2 
is specified from -550C to +1250C while HI-201-5 operates 
from O^C to +750C. HI-201 is functionally and pin compatible 
with other available "200 series" switches. 



PIN OUT 



FUNCTIONAL DIAGRAM 



Section 1 1 for Packaging 



Top View 



0UT1 2- 
IN 1 3- 



V- 4 — 

GND 5 — 

IN 4 6 

0UT4 7 



|-0>|-16 A2 

15 OUT 2 
14 IN 2 



— o 1 <i^^o— — 



A4 8 {>-! '^Cj- — 9 A3 



TYPICAL SWITCH 



— 13 V+ 

-12 Vref 

11 IN3 

10 OUTS 




SWITCH OPEN 
FOR LOGIC HIGH 



2626 



© IC MASTER 1983 



AR<;r)LUTE MAXIMUM RATING*? 






Supply Voltage Between Pins 4 and 13 


44V (+22) 


Total Power Dissipation* 750mW 


VreF to Ground 


+20V,-5V 


Operating Temperature 


Digital Input Voltage: 


VCiinnlw(+) +4V 

' ouppiy < ' ^ • 


HI-201-2 -550c to+125oC 




VSupply(-) -4V 


HI-201-4 -20OCto+85OC 


Analog Input Voltage (One Switch) 


+VSunnlv +2.0V 


HI-201-5 0OCto+75OC 




-VSupply -2.0V 


Storage Temperature -650C to +1 50^0 






♦Derate 8mW/0C Above Ta = +750C 


ELECTRICAL CHARACTERISTICS 






Unless Otherwise Specified 






Supplies = +15V, -15V; Vp^p = Open; V/^^ 


(Logic Level High) = 


2.4V V^L 'Logic Level Low) = +0.8V 



SPECIFICATIONS 



8Q 



For Test Conditions, consult Performance Characteristics 









HI-201-2 




HI-201-5 


»» 










-03 


0Ct0+1250C 


u 


L. to + / a 


C 






PARAMETER 


TEMP. 


•MIN. 


TYP. 


MAX. 


WIN. 


TYP. 


MAX. 


UNITS 


ANALOG SWITCH CHARACTERISTICS 
V3, Analog Signal Range 


Full 


-15 




+ 15 


-15 




+ 15 


V 


Ron. 0" Resistance (Note 1) 


+25OC 
Full 




55 
80 


70 
too 




55 

75 


80 
100 


n 


'S(OFF). Off Input Leakage Current 
(Note 6) 


+25°C 
Full 




2 


500 




2 


250 


nA 
nA 


'D(0FF)> Off Output Leakage Current 
(Note 6) 


+25OC 
Full 




2 


500 




2 


250 


nA 
nA 


'd(ON)' Leakage Current (Note 6) 


+25°C 
Full 




2 


500 




2 


250 


nA 
nA 


DIGITAL INPUT CHARACTERISTICS 
V/\L, Input Low Threshold 
V/\H, Input High Threshold 


Full 
run 






0.8 






0.8 


V 
V 


l/\, Input Leakage Current (High or Low) (Note 2) 


Full 






1.0 






1.0 




SWITCHING CHARACTERISTICS 


















tQPEN' Break - Before Make Delay (Note 3) 


+25°C 




30 






30 




ns 


ton , Switch ON Time 


+25OC 




185 


500 




185 




ns 


toff , Switch OFF Time 


+25OC 




220 


500 




220 




ns 


"Off Isolation" (Note 4) 


+25OC 




80 






80 




dB 


^S (OFF). Input Switch Capacitance 


+25°C 




5.5 






5.5 




pF 


Cd (OFF). 
Cd(ON) 


Output Switch Capacitance 


+25OC 
+ 25OC 




5.5 
11 






5.5 
11 




pF 
pF 


Ca, Digital Input Capacitance 


+25OC 




5 






5 




pF 


Cqs(OFF)' Drain-To-Source Capacitance 


+25OC 




0.5 






0.5 




pF 


POWER REQUIREMENTS (Note 5) 
Pq, Power Dissipation 

I+, Current (Pin 13) 

1- Current (Pin 4) 


+25OC 
Full 

+25°C 
Full 

+25OC 
Full 




15 

0.5 
0.5 


60 
2.0 
2.0 




15 

0.5 
0.5 


60 
2.0 
2.0 


mW 
mW 
mA 
mA 
mA 
mA 



NOTES: 



1' VouT= *10V louT= 

2. Digital Inputs Are MOS Gates - Typical Leakage is 
Less Than 1 n A 

3. V^H = ^OV 



4. = 5V, Rl = IKfl, Cl = lOpF. Vg = 3VRMS,f = lOOKf 

5. = +3V or = OV For all Switches 

6. Refer to leakage current measurennent diagram 
on page (3-14) 



* • Note: HI-201-4 has same specifications as HI-201-5 over the temperature range -20°C to +85°C. 



© IC MASTER 1983 



2627 



® hiARFUS 


HI-201HS 




///^rA 5/»ee// Qi/a// SPST 


Prelimmary 


CMOS Analog Switch 



FEATURES 



DESCRIPTION 



• 


ANALOG VOLTAGE RANGE 


±15V 


• 


ANALOG CURRENT RANGE 


80mA 


• 


TURN-ON TIME 


30ns 


• 


LOW Ron 


30n 


• 


LOW POWER DISSIPATION 


120mW 


• 


TTL COMPATIBLE 




• 


LOW CHARGE INJECTION 


lOpC 



APPLICATIONS 



• HIGH FREQUENCY ANALOG SWITCHING 

• SAMPLE AND HOLD CIRCUITS 

• DIGITAL FILTERS 

• OP AMP GAIN SWITCHING NETWORKS 



The Harris HI-201HS Is a monolithic CMOS analog switch 
featuring very fast switching speeds and low ON resistance. 
The device consists of four independently selectable SPST 
switches and is identical in pin.out to the H 1-201 quad switch. 

Fabricated using the Harris dielectric isolation technology, this 
TTL compatible device offers improved performance over 
previously available CMOS analog switches. Featuring switching 
speeds of 50ns max., low ON resistance of 5012 max., and wide 
analog signal range of MbM , the H 1-201 HS is designed for any 
application where improved switching performance, particularly 
switching speed, is required. 

The HI-201HS is available in a 16 lead dual-in-line package. 
The H 1-201 HS-2 is specified for the temperature range of 
-550C to +1250C and the HI-201HS-5 operates from OOC to 
+750C. 



PIN OUT 



FUNCTIONAL DIAGRAM 



Top View 



'-H>! 

OUT! 2- 
IN 1 3- 



V- 4 — 

GND 5 — 

IN4 G 

0UT4 7 



— i^^o 



A4 8--<{>-! '-<}>- — 9 A3 



rO>|-16 A2 

15 OUT 2 

14 IN 2 

13 V+ 

— 12 NC 

11 IN3 

10 0UT3 



TYPICAL SWITCH 




SWITCH OPEN 
FOR LOGIC HIGH 



2628 



® IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 


(Nntp 1) 






Supply Voltage Between Pins 4 and 13 


+36V 


Total Power Dissipation* 


750mW 






Operating Temperature 




riinitnl Inniit i/nltano' 
Uiyilul ilipUl VUlldyC' 


''oupply* ' ^ ^ 


HI-9niH"?-7 

III ino £. 






VSupply(-) -4V 


HI-201HS-4 


-20OC to+850C 


Analog Input VoltagG (One Switch) 


+Vqiinnl\/ +2.0\/ 


HI-201HS-5 


OOC to +750C 




-VSupply -2.0V 


Storage Temperature 


-650C to+150OC 






*Derate8mW/0C Above Ta = 


+750C 



SPECIFICATIONS 



ELECTRICAL CHARACTERISTICS Unless Otherwise Specified, Supplies = +15V, -15V; Vah (Logic Level High) = 5.0V; 

Val (Logic Level Low) =+0.8V 







HI-201HS-2 
HI-201HS-5 




PARAMETER 


TEMP. 


MIN 
IVI 1 IM . 


TVP 
1 T r. 


MAY 
IVIM A. 


UNITS 


ANALOG SWITCH CHARACTERISTICS 












VS, Analog Signal Range 


Full 


-15 




+ 15 


V 


Ron. 0" Resistance (Note 2) 


+250C 
Full 




30 


50 
75 




IS(OFF), Of Input Leakage Current 


+250C 
Full 




.3 


10 
100 


nA 
nA 


'D(OFF). Off Output Leakage Current 


+250C 
Full 




.3 


10 
100 


nA 
nA 


'□(ON). On Leakage Current 


+250C 
Full 




.1 


10 
100 


nA 
nA 


DIGITAL INPUT CHARACTERISTICS 












Val, Input Low Threshold 


Full 






0.8 


V 


Vah. Input High Threshold 


+250C 
Full 


2.0 

2.4 






V 
V 


IAL. Input Leakage Current (Low) 


Full 






500 




IAH, Input Leakage Current (High) 


Full. 






40 




SWITCHING CHARACTERISTICS 












tON, Switch ON Time (Note 3) 


+250C 




30 


50 


ns 


tOFF, Switch OFF Time (Note 3) 


+250C 




40 


50 


ns 


"Off Isolation" (Note 4) 


+250C 




72 




dB 


Crosstalk (Note 5) 


+250C 




86 




dB 


Charge Injection (Note 6) 


+250C 




10 




pC 


CS(OFF), Input Switch Capacitance 


+250C 




10 




pF 


CD(OFF), Output Switch Capacitance 
CD(ON), 


+250C 
+250C 




10 
30 




pF 
pF 


Ca, Digital Input Capacitance 


+250C 




18 




pF 


CdS(OFF), Drain-to-Source Capacitance 


+250C 




.5 




pF 


POWER REQUIREMENTS (Note 7) 












Pq, Power Dissipation 


+250C 
Full 




120 


240 


mW 
mW 


I+, Current (Pin 13) 


+250C 
Full 




4.5 


10.0 


mA 
mA 


I-, Current (Pin 4) 


+250C 
Full 




3.5 


6 


mA 
mA 



NOTES: 



1 . Absolute maximum ratings are limiting values, 
applied individually, beyond which the service- 
ability of the circuit may be impaired. Functional 
operability under any of these conditions is not 
necessarily implied. 

2. VOUT = ±10V, loUT = 1mA 

3. RL = 1ki>,CL = 35pF, V|N = +10V, Va = +5V 



4. VA = 5V, RL = 1KS2,Cl = lOpF, VS = 3 VRMS, 
f = lOOkHz 

5. Va = 5V, Rl = 1kS2, f = 100kHz, V|N = 2Vp-p 

6. Cl = lOOOpF, V|N = OV, R|N = 0S2 
AQ = CLx -iVO 

7. Va = 5V or Va = for all switches. 



© IC MASTER 1983 



2629 




H 1-3 00 thru H 1-307 

CMOS Analog Switches 



FEATURES 


• 


ANALOG SIGNAL RANGE (+15V SUPPLIES) 


±15V 


• 


LOW LEAKAGE (TYP.@ 250C) 


40pA 


• 


LOW LEAKAGE (TYP.@ 1250C) 


InA 


• 


LOW ON RESISTANCE (TYP. @ 250C) 


35n 


• 


BREAK-BEFORE-MAKE DELAY (TYP.) 


60ns 


• 


CHARGE INJECTION 


30pC 


• 


TTL, CMOS COMPATIBLE 




• 


SYMETRICAL SWITCH ELEMENTS 




• 


LOW OPERATING POWER 


I.OmW 



APPUCA TIONS 



o 

3 
TJ 
C 

o 
o 

E 

(D 
CO 

£0 

*aZ 
i_ 

(0 

X 



SAMPLE AND HOLD i.e. LOW LEAKAGE SWITCHING 
OP AMP GAIN SWITCHING I.e. LOW ON RESISTANCE 
PORTABLE, BATTERY OPERATED CIRCUITS 
LOW LEVEL SWITCHING CIRCUITS 
DUAL OR SINGLE SUPPLY SYSTEMS 



(TYP. FOR HI-300 -303) 



FUNCTIONAL DIAGRAM 



DESCRIPTION 



-o s 



■O D 



TYPICAL SWITCH 300 SERIES 



The H 1-300 through H 1-307 series of switches are monolithic devices fab- 
ricated using CMOS technology and the Harris dielectric isolation process. 
These switches feature break-before-make switching, (HI-301, 303,305 
& 307 only) , low and nearly constant ON resistance over the full analog 
signal range, and low power dissipation, (a few milliwatts for the HI-300- 
303, a few hundred microwatts for the H 1-304-307). 

The HI-300-303 are TTL compatible and have a logic "0" condition with 
an Input less than 0.8V and a logic "1" condition with an input greater 
than 4.0V. The HI-304-307 switches are CMOS compatible and have a 
low state with an input less than 3.5V and a high state with an input 
greater than 11V. (Seepinoutsforswitchconditions with a logic "1 "input.) 

All the devices are available in a 14 pin epoxy or ceramic DIP. The HI-300, 
301,. 304 and 305 are also available in a 10 pin metal can. Each of the 
switch types are available in either the -550C to +1250C or O^C to +750C 
operating ranges. 



PIN OUTS (SWITCH STATES ARE FOR A LOGIC "1" INPUT) 



Section 1 1 for Packaging 



DUAL SPST HI-300 & HI -304 

(TOP VIEWS) 





LOGIC 


SWITCH 



1 


OFF 
ON 



♦The substrate and case are 
internally tied to V-. (The 
case should not be used as 
the V- connection, however.) 



SPOT HI-301 & H 1-305 

(TOP VIEWS) 





LOGIC 


SW1 


SW2 



1 


OFF 
ON 


ON 
OFF 





*The substrate and case are 
Internally tied to V-. (The 
case should not be used as 
the V- connection, however.) 



DUAL DPST HI-302 & HI-306 

(TOP VIEW) 



DUAL SPDT HI-303 & HI-307 

(TOP VIEW) 



NO 
S3 
D3 
Dl 
Si 
INi 
GND 



u] V+ 

I 1 I 1I1S4 

-O—roJ K>T-t>-i2]D4 

— ^ '— j To]S2 

kJijiNz 

¥]v- 



LOGIC 


SWITCH 



1 


OFF 

ON , 



NC [T 14] V+ 

S3|T 1 I 13]S4 

D3|T-0^ Io<^12]d4 
Dl[T-0-+*i |o4-i>- i7]d2 
Sl[T— LIL_{_^S2 
'Nl[I-t>' k3-9]lN2 

gnd[T Tjv- 



LOGIC 


SW 1 
SW2 


SW3 
SW4 



1 


OFF 
ON 


ON 
OFF 



2630 



© IC MASTER 1983 



SPECIFICATIONS H 1-3 00 - H 1-307 



ABSOLUTE MAXIMUM RATINGS (Note 1) 

Voltage Between Supplies 44\/ (i22V) 

Digital Input Voltage 



Analog Input Voltage 



V+ +4.0V 
V--4.0V 

V+ 1.5V 
V-1.5V 



Total Power Dissipation 

14 Pin Epoxy DIP 
14 Pin Ceramic DIP 
10 Pin Metal Can* 

*Derate 6.9mW/0OC Above Ta = 



70OC 



Operating Temperature 



HI-3XX-2 
HI-3XX-5 



526mW 
588mW 
435mW 



550Cto+1250C 
0OCto+75OC 



Storage Temperature 



-65OCto+150OC 



ELECTRICAL CHARACTERISTICS 



Unless otherwise specified; Supplies = +15V, -15V; V|n = Logic input. 
HI-300-303 : V|n - for Logic "1"= 4V, for Logic "0"= 0.8V 
HI-304-307 : V||\| - for Logic "1" = 1 1V, for Logic "0" = 3.5V 







-550Ct0 +1250C 


OOC to+750C 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


ANALOG SWITCH CHARACTERISTICS 


















Analog Signal Range 


Full 


-15 




+15 


-15 




+15 


V 


Ron Resistance (Note 2) 


+250C 
Full 




35 
40 


50 

/D 




35 

An 


50 




ISqFF OFP Input Leakage Current (Note 3) 


+250C 
Full 




0.04 
1 


1 

100 




0.04 
0.2 


5 

100 


nA 
nA 


IDqfF off Output Leakage Current (Note 3) 


+250C 
Full 




0.04 
1 


1 

100 




0.04 
0.2 


5 

100 


nA 
nA 


IDqn on Leakage Current (Note 4) 


+250C 
Full 




0.03 
0.5 


1 

100 




0.03 
0.2 


5 

100 


nA 
nA 


DIGITAL INPUT CHARACTERISTICS 


















ViML Input Low Level * 


Full 






0.8 






0.8 


V 


V|fjH Input High Level * 


Full 


4 






4 






V 


V|ML Input Low Level ** 


Full 






3.5 






3.5 


V 


ViMH Input High Level ** 


Full 


11 






11 






V 


llNL Input Leakage Current (Low) (Note 5) 


Full 






1 






1 


pA 


l||\IH Input Leakage Current (High) (Note 5) 


Full 






1 






1 


pA 


SWITCHING CHARACTERISTICS 


















'OPEN Break-Before-Make Delay *** 


+250C 




60 






60 




ns 


tQN Switch On Time * 


+250C 




210 


300 




210 


300 


ns 


tQFF Switch Off Time * 


+250C 




160 


250 




160 


250 


ns 


^ON Switch On Time ** 


+25''C 




160 


250 




160 


250 




tQFF Switch Off Time** 


+250C 




100 


150 




100 


150 


ns 


Off Isolation (Note 6) 


+250C 




60 






60 




dB 


Charge Injection (Note 7) 


+250C 




3 






3 




mV 


CSqfF Input Switch Capacitance 


+250C 




16 






16 




pF 


CDoFF Output Switch Capacitance 


+250C 




14 






14 




pF 


CDoi\| Output Switch Capacitance 


+250C 




35 






35 




pF 


C|M (High) Digital Input Capacitance 


+250C 




5 






5 




pF 


C||\| (Low) Digital Input Capacitance 


+250C 




5 






5 




pF 


POWER REQUIREMENTS 


















1+ Current* (Note 8) 


+250C 
Full 




0.09 


0.5 
1 




0.09 


0.5 
1 


mA 
mA 


1- Current* (Note 8) 


+250C 
Full 




0.01 


10 
100 




0.01 


100 


pA 
pA 


1+ Current* (Note 9) 


+250C 
Full 




0.01 


10 
100 




0.01 


100 


pA 
pA 


1- Current* (Note 9) 


+250C 
Full 




0.01 


10 
100 




0.01 


100 


pA 
pA 


1+ Current** (Note 10) 


+250C 
Full 




0.01 


10 
100 




0.01 


100 


pA 
pA 


1- Current** (Note 10) 


+250C 
Full 




0.01 


10 
100 




0.01 


100 


pA 


1+ Current** (Note 11) 


+250C 
Full 




0.01 


10 
100 




0.01 


100 


PA 
pA 


1- Current** (Note 11) 


+250C 
Full 




0.01 


10 
100 




0.01 


100 


pA 
pA 


* HI-300 thru HI-303 Only; ** HI-304 thru Hl-307 Only; *** 


HI-301, HI-303, HI-305, Hl-307 Only 









© IC MASTER 1983 



2631 



ELECTRICAL CHARACTERISTICS NOTES: 

1. As with all semiconductors, stresses listed under "Absolute 
Maximum Ratings" may be applied to devices (one at a time) 
without resulting in permanent damage. This is a stress rating 
only. Exposure to absolute maximum rating conditions for 
extended periods may affect device reliability. The conditions 
listed under "Electrical Characteristics" are the only conditions 
recommended for satisfactory operation. 

2. Vs = i 10V, Iqut = -10mA On resistance derived from the 
voltage measured across the switch under the above conditions. 

3. Vs = ±14V,Vd = + 14V. 

4. Vs = Vd=±14V. 

5. The digital inputs are diode protected MOS gates and typical 
leakages of InA or less can be expected. 



6. Vs= 1VRMS,f= 500kHz, Cl= 15pF,RL= Ik. 

Cl = CfixTURE + CPROBE, "Off Isolation" = 20logVS/VD . 

7. Vs = OV, Cl = lO.OOOpF, Logic Drive = 5V pulse. (HI-300 
-303) Switches are symmetrical; S and D may be interchanged. 
Logic Drive = 15V (HI-304-307) 

8. V|i\|=4V (one input) ( all other inputs = OV) 

9. V||\| = 0.8V (all inputs). 

10. V||\| = 15V (all inputs). 

11. V||\| = 0V (all inputs). 

12. To drive from DTL/TTL circuits, pull-up resistors to +5V 
supply are recommended. 



TEST CIRCUITS 



SWITCHING TEST CIRCUIT (tQN, tOFP) 



SWITCH TYPE 


V|NH 


HI-300 thru HI-303 
HI-304 thru HI-307 


4V 
15V 



BREAK-BEFORE-MAKE TEST CIRCUIT (tBBM) 



SWITCH TYPE 


V|NH 


H 1-301, HI-303 
HI-305, HI-307 


5V 
15V 




LOGIC 
INPUT 
OV - 



VS 



OV 



SWITCH 
OUTPUT 



LOGIC "1" = SWITCH ON 
VINH 



■■50% 



LOGIC 
INPUT 

OV • 



y|9o% i \lO% 



tOFF 



SWITCH 
OUTPUT 



LOGIC "1" = SWITCH ON 
V|NH 



"\J50%', 
OViN L 

■ I 

tBBM -*| p 



RLI = RL2 = 300n 
ClI =CL2 = 33pF 



OUT 1 
OUT 2 



50% 

— tBBM 



2632 



© 10 MASTER 1983 



TYPICAL PERFORMANCE CURVES 



Rds{on) vs.vd and 

TEMPERATURE 



RdS(ON) VS.VqAND 
POWER SUPPLY VOLTAGE 





Vo - DRAIN VOITAQE (VOUSI 



vd - dhain voltaoi (vomi 



DEVICE POWER DISSIPATION 
vs. SWITCHING FREQUENCY 
SINGLE LOGIC INPUT 




OFF ISOLATION 
VS. FREQUENCY 




i.maufNCYiHii 



1 10 too IK inC lOOK 
LOGIC (WITCHING FREQUENCY (Hi) 
m DUTY CYCLE 



'S(OFF) OR Id(OFF) 
VS. TEMPERATURE* 



'D(ON) vs. TEMPERATURE 




X < 




TEMPERATURE - °C 



T-TUHRATURtW) 



* The net leakage Into the source or drain Is the n-channel leakage minus the p-channel leakage. This difference can be positive, 
negative, or zero depending on the analog voltage and temperature, and will vary greatly from unit to unit. 



OUTPUT ON CAPACITANCE 
VS. DRAIN VOLTAGE 



DIGITAL INPUT CAPACITANCE 
VS. INPUT VOLTAGE 











1 

— c 


RANSITIO 
UETOAC 


N IINOETER 

TIVE iNnm 

1 1 
HI-300 


MHATE 



1 1 

t»iiHi.«a 

-.^ 




TRAN 

1 


1 HI-904 
ilTION 1 


lwwHI-307 

1 1 



Typical delay, rise, fall, settling times, and switching trans- 
ients in this circuit. 




Vlogic 



If RgEN> ''L °' ''L is increased, there will be proportional 
increases In rise and/or fall RC times. 



HI-300 tliniHI-3a3 



LOGIC INPUT 



HI-3l>4tliniHI-307 



o 

3 
T3 
C 

o 
o 

E 

(D 
CO 

CO 



to 
X 



~7 " ; fV •SEENOTI 

il/imii'iMiimi ^ ^ lit 



















































-i 














J, 




















V( 


EN 


• t^ 




































































































































J 














> 


'ge 


l-< 



















































































































































































f 




























1 1 1 













0.4 0.S 1.2 
t-Tim. (psl 



® IC MASTER 1983 



2633 



TYPICAL PERFORMANCE CURVES (Continued) 



GD 



o 

3 
X3 
C 

o 
o 

E 

(D 
CO 

CO 

Il- 
ea 
X 



SWITCHING TIME VS. 
TEMPERATURE 
HI-300 thru HI-303 




SWITCHING TIME AND BREAK 

BEFORE MAKE TIME VS. 
POSITIVE SUPPLY VOLTAGE 
HI-300 thru HI-303 




SWITCHING TIME VS. 
TEMPERATURE 
HI-304 thru H 1-307 




SWITCHING TIME VS. 
POSITIVE SUPPLY VOLTAGE 
HI-304 thru HI-307 





1.1 




1.6 


IME 


1.4 


O 


\3 


Z 




I 


1.0 


swn 


0.1 






o 


0.4 


z 
o 


0.2 




SWITCHING TIME VS. 
NEGATIVE SUPPLY VOLTAGE 
HI-300 thru HI-303 




V- NEGATIVE Sl*f LY (VOLTS) 



SWITCHING TIME VS. 
NEGATIVE SUPPLY VOLTAGE 
HI-304 thru HI-307 




V- NEGATIVE SUfPLV VOLTAGE (VI 



V» lOtlTIVE »OfrLY (V) 



V* POSITIVE SUTPLY VOLTAGE (VI 



INPUT SWITCHING THRESHOLD 
VS. POSITIVE SUPPLY VOLTAGE 
HI-300 thru HI-307 




V* POSITIVE SUPPLY VOLTAGE (VOLTS) 



2634 



© IC MASTER 1983 




Hl°381 / 384/ 
387/390 

CMOS Analog Switches 



FEATURES 



APPLICATIONS 



• 


ANALOG SIGNAL RANGE (±15V SUPPLIES) 


+15V 


• 


LOW LEAKAGE (TYP.@ 250C) 


40pA 


• 


LOW LEAKAGE (TYP@ 1250C) 


InA 


• 


LOW ON RESISTANCE (TYP. @ 250C) 


35n 


• 


BREAK-BEFORE-MAKE DELAY (TYP.) 


60ns 


• 


CHARGE INJECTION 


30pC 


• 


TTL COMPATIBLE 




• 


SYMMETRICAL SWITCH ELEMENTS 




• 


LOW OPERATING POWER (TYP.) 


I.OmW 



• SAMPLE AND HOLD Le. LOW LEAKAGE SWITCHING 

• OP AMP GAIN SWITCHING I.e. LOW ON RESISTANCE 

• PORTABLE BATTERY OPERATED CIRCUITS 

• LOW LEVEL SWITCHING CIRCUITS 

• DUAL OR SINGLE SUPPLY SYSTEMS 



FUNCTIONAL DIAGRAM 



DESCRIPTION 



IN 




O D 



TYPICAL SWITCH - 300 SERIES 



The HI-381 through HI-390 series of switches are monolithic 
devices fabricated using CMOS technology and the Harris di- 
electric isolation process. These devices are TTL compatible and 
are available in four switching configurations. (See device pinout 
for particular switching function with a logic "1" input.) 

These switches feature low leakage and supply currents, low and 
nearly constant ON resistance over the analog signal range, break- 
before-make switching and low power dissipation. 

The HI-381 and HI-387 switches are available in a 14 pin epoxy 
or ceramic DIP orlO pin metal can. The HI-384 and HI-390 
are available in a 16 pin epoxy or ceramic DIP. Each of the 
individual switch types are available in the -BS^C to +1250C 
and O^C to +750C operating ranges. 



PIN OUTS (SWITCH STATES ARE FOR A LOGIC "1" INPUT) 



Section 1 1 for Packaging 




DUALSPST HI-381 

(TOP VIEWS) 

S2 

Sv 




SW 1 
SW2 



*The substrate and case are 
internally tied to V-. (The 
case should not be used as 
the V- connection, however.) 




SPOT HI-387 

(TOP VIEWS) 
02 




METAL 
CAN 



*The substrate and case are 
internally tied to V-. (The 
case should not be used as 
the V- connection, however.) 




DUAL DPST HI-384 

(TOP VIEW) 





-O— -O 


16] Si 


NO [7 




ii]iNi 


03 [I 
S3[T 




14] V- 

13]gND 


S4|T 




12] NC 




f ^ 


lT] V+ 


NC|T 




10]lN2 


021^ 


-cr*-o 


J]S2 



DUAL SPDT HI-390 

(TOP VIEW) 



SW 1 

SW2 



SW3 
SW4 



© IC MASTER 1983 



2635 



ABSOLUTE MAXIMUM RATINGS (Note 1) 






Voltage Between Supplies 


44V (+22) 


Total Power Dissipation 








14 Pin Epoxy DIP 


526mW 


Digital Input Voltage 


V++4.0V 


14 Pin Ceramic DIP 


588mW 




16 Pin Epoxy DIP 


625mW 




V--4.0V 


16 Pin Ceramic DIP 


685mW 






10 Pin Metal Can* 


435mW 


Analog Input Voltage 




'Derate 6.9mW/0C above Ta = 


70OC 




V++1.5V 






V--1.5V 


Operating Temperature 








HI-3XX-2 


-550C to+1250C 


Storage Temperature Range 


-650C to+150OC 


HI-3XX-5 


QOCto +750C 



SPECIFICATIONS 



ELECTRICAL CHARACTERISITICS Unless otherwise specified; Supplies = +15V, -15V; VIN = Logic Input, 

VIN for logic "1" = 4V, for logic = .8V 



-550c to+1250C 



PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 




















Analog Signal Range 


FULL 


-15 




+ 15 


-15 




+ 15 


V 


Ron on Resistance (Note 2) 


+250C 




35 


50 




35 


50 


n 




FULL 




40 


75 




40 


75 




ISqfF off Input Leakage Current (Note 3) 


+250C 




.04 


1 




.04 


5 


nA 




FULL 




1 


100 




0.2 


100 


nA 


IDoFF OFF Output Leakage Current 


+250C 




.04 


1 




.04 


5 


nA 


(Note 3) 


FULL 




1 


100 




0.2 


100 


nA 


ON Leakage Current (Note 4) 


+250C. 




.03 


1 




.03 


5 


nA 




FULL 




0.5 


100 




0.2 


100 


nA 


DIGITAL INPUT CHARACTERISTICS 


















V|NL Input Low Level 


FULL 






.8 






..8 


V 


V|NH Input High Level 


FULL 


4 






4 






V 


l|NH Input Leak. Current (High) (Note 5) 


FULL 






1 






1 


ma 


l|NL Input Leak. Current (Low) (Note 5) 


FULL 






1 






1 


pA 


<;\A/iTruiMr; rHARAPTCRiQTirc 

oVV liunilvu l/riMnHUICnlollUo 


















(HI-387/ 


















tOPEN. Break-Before Make Delay 390 only) 


+250C 




60 






60 




ns 


tQN. Switch ON Time 


+250C 




210 


300 




210 


300 


ns 


tOFF. Switch OFF Time 


+250C 




160 


250 




160 


250 


ns 


OFF Isolation (Note 6) 


+250C 




60 






60 




dB 


Charge Injection (Note 7) 


+250C 




3 






3 




mV 


CSqff Input Switch Capacitance 


+250C 




16 






16 




pF 


CDqff Output Switch Capacitance 


+250C 




14 






14 




pF 


CDqn Output Switch Capacitance 


+250C 




35 






35 




pF 


Z\n (High) Digital Input Capacitance 


+250C 




5 






5 




pF 


C|N (Low) Digital Input Capacitance 


+250C 




5 






5 




pF 


POWER REQUIREMENTS 


















1+ Current (Note 8) 


+250C 




.09 


.5 




.09 


.5 


mA 




FULL 






1 






1 


mA 


1- Current (Note 8) 


+250C 




.01 


10 




.01 


100 


pA 




FULL 






100 








pA 


1+ Current (Note 9) 


+250C 




.01 


10 




.01 


100 


^x^ 




FULL 






100 








pA 


t- Current (Note 9) 


+250C 




.01 


10 




.01 


100 


pA 




FULL 






100 











0oCto+75OC 



2636 



© IC MASTER 1983 





ELECTRICAL CHARACTERISTICS NOTES : 






1. 


As with all semiconductors, stresses listed under "Absolute 

M riy imi 1 m Ratinn*:" maw Hp annlipH tn ripv/irpc /nnp at a timp^ 


5. 


The digital inputs are diode protected MOS gates and typical 
leakages of InA or less can be expected. 




without resulting in permanent damage. This is a stress rating 
only. Exposure to absolute maximum rating conditions for 
extended periods may affect device reliability. The conditions 


6. 


Vs = IVRMS.f = 5G0kHz,CL= 15pF, Rl= Ik, 

Cl = CpiXTURE + CpROBE, "off isolation" = 20log Vs/Vq. 




listed under "Electrical Characteristics" are the only conditions 
recommended for satisfactory operation. 


7. 


Vs = OV, Cl = 10,00GpF, Logic Drive = 5V pulse. Switches 
are symmetrical; S and D may be interchanged. 


2. 


Vs = i lOV, loUT " -10mA on resistance derived from the 
voltage measured across the switch under the above conditions. 


8. 


V||\| = 4V. (one input) (all other inputs = G) 


3. 


Vs=±14V, Vd = + 14V. 


9. 


V||\i = G.8V. (all inputs) 


4. 


Vs = Vd=±14V. 


10. 


To drive from DTL/TTL circuits, pull-up resistors to +5\/ 
Supply are recommended. 


TEST CIRCUITS 




SWITCHING TEST CIRCUIT (tQN, tOFP) 




BREAK-BEFORE-MAKE TEST CIRCUIT (tBBM) 



SWITCH TYPE 


V|NH 


HI-381 thru HI-390 


5V 



SWITCH TYPE 


V|NH 


Hl-387 and HI-390 


5V 



P+15V 

|v+ 



Vs = +3V O- 



LOGIC 
INPUT 




►3oon 



VO SWITCH 

O j-ii iTDI IT 



:cl 

33pF 



6-15V — — 



LOGIC 
INPUT 



SWITCH 
OUTPUT 



LOGIC "1" = SWITCH ON* 
V|NH 



V 



tOFF !- 



'Inverted logic for HI-381 



Vsi = +3V 
VS2 = +3V 



I 



+15V 



-O-f-0- 



LOGIC 
INPUT 




> 



^RL2 Cl2^^RL1 



-O OUT 1 



— O OUT 2 

cli 



LOGIC LOGIC "1" SWITCH ON 

INPUT ViNH 



RlI = RL2 = 300JJ 
Cli =CL2 = 33pF 



SWITCH 
OUTPUT 



1/ l\_ 



OUT 1 
OUT 2 



' 50% 
— tBBM 



© 10 MASTER 1983 



2637 



TYPICAL PERFORMANCE CURVES 



8S 



Rds(on) vs. Vd and 
temperature 




Vd - DRAIN VOLTAGE (VOLTS) 



DEVICE POWER DISSIPATION 
VS. SWITCHING FREQUENCY 
SINGLE LOGIC INPUT 



"dSION) VS.VD AND 
POWER SUPPLY VOLTAGE 




Vd - DRAIN VOLTAGE (VOLTSI 




1 10 100 IK lOK 100K 
LOGIC SWITCHING FREQUENCY <Hi) 
50% DUTY CYCLE 



OFF ISOLATION 
VS. FREQUENCY 




106 10? 
f - FREQUENCY (H 



ISoFF OR iDoFF VS. TEMPERATURE* 



•don vs. temperature' 



^1 



z < 
a < 
















Vt - 15V 
V- - -15V 










- |Vd| -|vsI- 


14V 



















































































T- TEMPERATURE -oc 



T- TEMPERATURE (ocl 



* The net leakage into the source or drain is the n-channel leakage minus the p-channel leakage. This difference can be positive, 
negative, or zero depending on the analog voltage and temperature, and will vary greatly from unit to unit. 



OUTPUT ON CAPACITANCE 
VS. DRAIN VOLTAGE 



DIGITAL INPUT CAPACITANCE 
VS. INPUT VOLTAGE 



TRANSITION (INDETERMINATE 
-DUE TO ACTIVE INPUT) — 

I I I I 
HI-381 thruHI-390 



2 4 6 8 10 12 14 16 
VD - DRAIN VOLTAGE (VOLTS) 



2 4 6 8 10 12 14 16 
ViN - INPUT VOLTAGE (VOLTS) 



2638 



© iC MASTER 1983 



TYPICAL PERFORMANCE CURVES (Continued) 



SWITCHING TIME VS. 
TEMPERATURE 
H 1-381 thru HI -390 




-55 -35 -15 5 25 45 65 85 105 125 
T- TEMPERATURE (OC) 



SWITCHING TIME VS. 
POSITIVE SUPPLY VOLTAGE 
HI-381 thru HI-390 




V* - POSITfVE SUPPLY (V) 



SWITCHING TIME VS. 
NEGATIVE SUPPLY VOLTAGE 
HI-381 thru HI-390 





















Vt-+15 

TA-25C 

ViNL-C 


tOFF 




V 

■4.0V 
V 





V- NEGATIVE SUPPLY VOLTAGE (VOLTS) 



INPUT SWITCHING THRESHOLD 
VS. POSITIVE SUPPLY VOLTAGE 
HI-381 thru HI-390 



1 

V---15V 




TA-2S0C 


























Hl-3ai 


thru HI-390 









M* POSITIVE SUPPLY VOLTAGE (VOLTS) 



Typical delay, rise, fall, settling times, and switching trans- 
ients in this circuit. 




If FIgEN' f^L or C|. is increased, there will be proportional 
increases in rise and/or fall RC times. 



i2 « 



Z 













Mill 

HI-384 thru HI-390 ~ 

Ul 1Q1 liUV/CDTCn 


























LO 


GIC 




























LO 


m 

ilC 


NPl 


T 








m 

































































































J 










•s 


EE N 


OTI 








QE 




OV: 


m 


m 












m 




m 








































































































































i 


















tttt 


Vg 


m 

IN " 


m 

5V 


m 










ntt 



























































































































Ji 




















V : 
























































































































































t 


+m 






tttt 










V 


'GEN - -SV : 


























































































































ttfi 








m 


m 


tm 




m 


m 




m 
































v< 


SEN 


- -1 


Dv ; 














MM 













0.4 0.8 1.2 1.6 

t-TIME(fis) 

* NOTE: The turn-off time is primarily limited 
here by the RC time constant (100ns) of the 
load. 



© IC MASTER 1983 



2639 



^ HARRIS 

SEMICONDUCTOR ANALOG PRODUCTS DIVISION 


HI-1800A 




Low Leakage 




Dual D PS T Ana Log Switch 



FEATURES 



DESCRIPTION 



o 

C 

o 
o 

E 

(D 
CO 
w 

X 



• LEAKAGE (TYP.) 

• SIGNAL RANGE 

• "ON" RESISTANCE (TYP.) 

• ACCESS TIME (TYP.) 

• DTL/TTL COMPATIBLE ADDRESS 



40nA 
il5V 
125f2 
500ns 



APPLICATIONS 



SIGNAL SELECTOR 
CHOPPER 

SAMPLE AND HOLD 
GAIN SWITCHING 



The HI-1800A is a general purpose analog switch which may 
be used as a signal selector, multiplexer, chopper, or cross- 
point switch for signals from D.C. to R.F. The configuration 
is two independent DPST switches with versatile TTL com- 
patibile addressing logic which allows connection as two 
SPOT, or as a single DPDT, SPOT, or SPST switch by con- 
nection of external jumpers. ON resistance decreases corre- 
spondingly when switching elements are connected in par- 
allel. The HI-1800A is fabricated on a single dielectrically 
isolated chip using complementary N and P channel MOS 
devices. This unique process produces exceptionally low 
leakage currents, constant ON resistance, low power dissipa- 
tion, and fast switching. The HI-1800A is available in a her- 
metic 16 pin dual-in-line package. 



PIN OUT 



FUNCTIONAL DIAGRAM 



ADDRESS 2 1 
+5.0V SUPPLY 2 — 



-1 




16 ADDRESS 1 

— 15 NEC. SUPPLY 
—14 POS, SUPPLY 

— 13 NX. 
12 IN 1 
11 OUT 1 
10 IN 2 
9 OUT 2 



TRUTH TABLE 



INPUT 
ADDRESS 


SWITCH 
CHANNELS 


Al 


A2 


A3 


EN 


1 


2 


3 


4 


L 


X 


X 




ON 


ON 






H 


X 


X 




OFF 


OFF 






X 


L 


X 








ON 


ON 


X 


X 


H 








ON 


ON 


X 


H 


L 








OFF 


OFF 


X 


X 


X 


H 


OFF 


OFF 


OFF 


OFF 



H>+4.0V 



A2O- 



Asa 




OIN 1 



O0UT1 
OIN 2 



O0UT2 
OIN 3 



O0UT3 
OIN 4 



O0UT4 



L<+0.4V 



2640 



©10 MASTER 1983^ 



SPECIFICATIONS 



8Q 



ABSOLUTE MAXIMUM RATINGS (Note i; 



Supply Voltage Between Pins 14 and 15 

Logic Supply Voltage, Pin 2 

Analog Input Voltage: V+Supp|y +2V 



40.0V 
30.0V 

"Supply -2V 



Digital Input Voltage 

Total Power Dissipation 
Storage Temperature Range 



V-Supply, V+Supply 
780 mW (Note 2) 
-65°Cto+150OC 



plies = +15V, -15V, +5.0V 




HI-1800A-5 
0°C to +75°C 




PARAMETER 


TEMP. 


MIN. 


T\/n 
TYr. 


MAX. 


UNITS 


ANALOG CHANNEL CHARACTERISTICS 












V||\|,Analog Signal Range 


Full 


-15 




+ 15 


V 


Ron, on Resistance (Note 3) 


+25OC 
Full 




125 


200 
250 


n 


Ic (OFF), Input Leakage Current 


Full 




40 


100 


nA 


Iq (OFF), Output Leakage Current 


Full 




40 


100 


nA 


Iq (ON), On Channel Leakage Current 


Full 




40 


100 


nA 


DIGITAL INPUT CHARACTERISTICS 
V| L, Input Low Threshold 


Full 






0.4 


V 


V|H, Input High Threshold (Note 4) 


Full 


4.0 






V 


l|N, Input Leakage Current 


Full 




.01 


1 


^^ 


SWITCHING CHARACTERISTICS 
Xf^, Access Time (Note 5) 


+25°C 




500 




ns 


Break-Before-Make Delay 


+25OC 




, 200 




ns 


C|N, Channel Input Capacitance 


+25OC 




8 




pF 


Cquj, Channel Output Capacitance 


+25OC 




8 




pF 


Cq, Digital Input Capacitance 


+25OC 




5 




pF 


POWER REQUIREMENTS 
Pq, Power Dissipation 


Full 




10 




mW 


PqS, Standby Power (Note 6) 


Full 




10 




mW 


I+, Current Pin 14 


Full 




0.001 


1 


mA 


l_. Current Pin 15 


Full 




0.5 


2 


mA 


IL, Current Pin 2 


Full 




0.5 


2 


mA 



NOTES: 1 . Voltage ratings apply when voltages at all other pins 
^ are within their nominal operating ranges. 
2. Derate 9.25 mW/°C above t^ =^ +75°C 
3- VouT = -10V louT = -100AtA. 
4. To drive from DTL/TTL circuits, 1 K pullup resistors 
to +5.0V supply are recommended. 



5. Time measured to 90% of final output level; 
Vq(j-p = -5.0V to +5.0V, Digital Inputs = 
0.4V to +4.0V. 

6. Voltage at Pin 3, ENABLE > +4.0V. 



© IC MASTER 1983 



2641 



PERFORMANCE CHARACTERISTICS 



GB 



ON RESISTANCE vs 
ANALOG SIGNAL LEVEL 



lOOixA 

4^ 



OUT 



Test Circuit 









































♦1250C 































































































-10 -8 -« 



-4-2 +2 ^4 +6 +8 +10 

V| -SIGNAL LEVEL (VOLTS) 



ON CHANNEL CURRENT 
vs VOLTAGE 



-<r»-o- 



-o'*N>- 



Test Circuit 



















































































♦ t25''C 






















»C 



















-3 -2 -1 +1 +2 +3 +4 +5 

VOLTAGE ACROSS SWITCH 



ON/OFF LEAKAGE CURRENTS vs 
TEMPERATURE 



ACCESS TIME 



OFF LEAKAGE 



ON LEAKAGE 



+5V DC O 



INI 



OUT 




-5V DC O 



INS 



-C-—0- 



OUT 



SCOPE 



A2 
+4V 



+4V I 1 

+0.4V ' L_ 



























A3 IN 


PUT 
















- 2 






• 


^ 












44-f4- 


-H4-f 






1 II 1 


MM 




■H-H- 


-l-hM- 


-N-H- 






-I-H+ 


• ou 


TPUT 
DIV. 




-H-K- 


























V 





































200ns/DIV. 



so 75 100 

TEMPERATURE -"C 



2642 



® IC MASTER 1983 




HI-5040 thru HI-5051 
HI-5046A and 
HI-5047A 

CMOS Analog Switches 



FEATURES 



DESCRIPTION 



WIDE ANALOG SIGNAL RANGE ±15V 
LOW "ON" RESISTANCE (TYP) 25^ 
HIGH CURRENT CAPABILITY (TYP) 80mA 
BREAK-BEFORE-MAKE SWITCHING 

TURN-ON TIME (TYP) 370ns 
TURN-OFF TIME (TYP) 280ns 
NO LATCH-UP 

INPUT MOS GATES ARE PROTECTED FROM ELEC- 
TROSTATIC DISCHARGE 
DTL, TTL, CMOS, PMOS COMPATIBLE 



APPLICATIONS 



• HIGH FREQUENCY SWITCHING 

• SAMPLE AND HOLD 

• DIGITAL FILTERS 

• OP AMP GAIN SWITCHING 



This family of CMOS analog switches offers low-resistance 
switching performance for analog voltages up to the supply 
rails and for signal currents up to 80mA. "ON" resistance is low 
and stays reasonably constant over the full range of operating 
signal voltage and current. Rqm remains exceptionally constant 
for input voltages between +5V and -5V and currents up to 
50mA. Switch impedance also changes very little over temp- 
erature, particularly between O^C and +750C. Rgfj is nomin- 
ally 25 ohms for HI-5048 through HI-5051 and HI-5046A/ 
5047A and 50nfor HI-5040 through HI-5047. 

All devices provide break-before-make switching and are TTL 
and CMOS compatible for maximum application versatility. 
Performance is further enhanced by Dielectric Isolation pro- 
cessing which insures latch-free operation with very low input 
and output leakage currents (0.8nA at 25^0. This fgmily of 
switches also features very low power operation (1.5mW at 
250C). 

There are 14 devices in this switch series which are differentiated 
by type of switch action and value of Roi\| (see Functional 
diagram). All devices^are available in 16 pin D.I.P. packages. 
The H 1-5040/5050 switches can directly replace I H-5040 series 
devices and are functionally compatible with the DG 180/190 
family. Each switch type is available in the -550C to +1250C 
and OOC to +750C performance grades. 



FUNCTIONAL DESCRIPTION 



FUNCTIONAL DIAGRAM 



Section 1 1 for Packaging 



PART NUMBER 


TYPE 


Ron 


HI-5040 


SPST 


75n 


HI-5041 


DUALSPST 


75n 


HI-5042 


SPOT 


75n 


HI-5043 


DUALSPDT 


75n 


HI-5044 


OPST 


75n 


HI-5045 


DUALDPST 


75n 


HI-5046 


DPDT 


7512 


HI-5Q4GA 


DPDT 


3on 


HI-5047 


4PST 


75n 


. HI-5047A 


4PST 


30 n 


HI-5048 


DUALSPST 


3on 


HI-5049 


DUAL DPST 


3on 


HI-5050 


SPDT 


3on 


HI-5051 


DUALSPDT 


30 n 



TYPICAL DIAGRAM 



-OS 



OD 



® IC MASTER 1983 



2643 



ABSOLUTE MAXIMUM RATINGS 






oupply voltage vv -V) 


obV 


Analog Lurrent \b to U) 


80mA 


Vr to Ground 




Total Power Dissipation* 


450mW 


Digital and Analop 


V+ +4V 


Operating Temperature 




Input Voltage 


V--4V 


HI-50XX-2 


-55°C to +125^0 






HI-50XX-5 


0°Cto +75OC 






Storage Temperature 


-65°Cto+150OC 






'Derate 6mW/°C above Ta = 


75OC 



SPECIFIC A TIONS 



08 



o 

■D 

C 

o 
o 

"e 

<D 
CO 

CO 
CO 



ELECTRICAL CHARACTERISTICS 

Unless Otherwise Specified 

Supplies = +15V, -15V; Vr = OV; V/^^ (Logic Level High) = 3.0V; V^l (Logic Level Low) =+0.8V, Vl = +5V 
For Test Conditions, consult Performance Characteristics 



NOTES: 









-55°Cto-i-125°C 


0° 


etc +75° 








PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


ANALOG SWITCH CHARACTERISTICS 


















Analog Signal Range 


Full 


-15 




+ 15 


-15 




+ 15 


V 


Ron,"ON" Resistance (Note la) 


-h25°C 




50 






50 










Full 






75 






75 




Ron,"ON"Resistance (Note lb) 


+25°C 




25 






25 










Full 






Rn 






(;n 

uU 


^ 


Ron, Channel-to-Channel Match (Note la) 


■i-25°C 




2 


in 




2 


10 




Ron, Channel-to-Channel Match (Note lb) 


■^25°C 




1 


5 




1 


5 


S2 


'S(OFF) - 


'D(OFF)' Input or Output 


+25°C 




0.8 






0.8 




nA 


Leakage Current 


Full 




100 


500 




100 


500 


nA 


In/nw), On Leakage Current 


-^25°C 




.01 






0.01 




nA 






Full 




2 


500 




2 


500 


nA 


DIGITAL INPUT CHARACTERISTICS 


















V/\L, Input Low Threshold 


Cull 

run 






0.8 






0.8 


V 


VaH' '"P"^ ^^'Qh Threshold 


Full 


3.0 






3.0 






V 


1;^, Input Leakage Current (High or Low) 


Full 




.01 


1.0 




.01 


1.0 


PA 


SWITCHING CHARACTERISTICS 


















ton. Switch ^^^^ 


+25°C 




370 


1000 




370 


1000 


ns 


toff. Switch "OFF" Time 


-i-25°C 




280 


500 




280 


500 


ns 


Charge Injection (Note 2) 


-^25°C 




5 


20 




5 




mV 


"OFF Isolation" (Note 3) 


+25°C 


75. 


80 






80 




dB 


"Crosstalk" (Note 3) 


-H25°C 


80 


88 






88 




dB 


CS(OFF), Input Switch Capacitance 


-^25°C 




11 






11 




pF 


Cd(OFF)' 




+25°C 




11 






11 




pF 




Output Switch Capacitance 


















^□(ON), 




•t25°C 




22 






22 




pF 


Digital Input Capacitance 


-h25°C 




5 






5 




pF 


Cos (OFF 


, Drain-To Source Capacitance 


+25°C 




0.5 






0.5 




pF 


POWER REQUIREMENTS 


















Pq, Quiescent Power Dissipation 


-^25°C 




1.5 






1.5 




mW 


I"*", ■^15V Quiescent Current 


Full , 






- 0.3 






0.5 


mA 


r, -15V Quiescent Current 


Full 






0.3 






0.5 


mA 


■ l, +5V Quiescent Current 


Full 






0.3 






0.5 


mA 


Ip, Gnd Quiescent Current 


Full 






0.3 






0.5 


mA 



1. VouT = ilOV,louT=1'^A 

a) For H 1-5040 thru H 1-5047 

b) For Hl-5048thru HI-5051, HI-5046A/5047A 

2. V||y, = OV, C|_ = lO.OOOpF 

3. Rl = 100n,f= 100 KHz, V|,y| = 2 Vpp, Cl=5pF 



2644 



® IC MASTER 1983 



SWITCH FUNCTIONS 



SWITCH STATES ARE FOR LOGIC "1" INPUT 



SPST 

HI-5040 (75^2) 



Vl v+ 
Tl2 Til 



AO-^-Ol>— ' 




Vr V- 



DUAL SPST 
HI-5041 (7512) 




SPOT 

HI-5042 (7512) 



S20- 



11 



-ODi 



-OD2 



VR 



DUAL SPOT 
HI -5043 (7512) 



DPST 

HI-5044 (7512) 




SiO- 



S20- 



Vl v+ 



DUAL DPST 
HI-5045 (7512) 

Vl 

1l 



-0D1 



SiO- 

S30- 



-0D2 



A2 
S2O 
S40 



_ J 



Vr 



Vr V- 



-OD) 
-OD3 



-OD2 
-OD4 



DPDT 

HI -5046 (7512) 
HI -5046 A (3012) 



4PST 

H 1-5047 (7512) 
HI-5047A (3012) 



DUAL SPST 
HI-5048 (3012) 





Vr 




DUAL DPST 
HI-5049 (3012) 




SPDT 

HI-5050 (3017) 

Vl 



DUAL SPDT 
HI-5051 (3012) 



Si o- 



S20- 



-0D1 



-0D2 



Vr 




© IC MASTER 1983 



2645 



HI-1818A/1828A 

Low Resistance 
8 Channel CMOS Analog Multiplexers 



FEATURES 



DESCRIPTION 



o 

T3 
C 

o 
o 

"e 

CD 
CO 

to 

tc 
X 



SIGNAL RANGE 


±15V 


"ON" RESISTANCE (TYP.) 


250n 


INPUT LEAKAGE AT +1250C (TYP.) 


20nA 


ACCESS TIME (TYP.) 


350ns 


POWER CONSUMPTION (TYP.) 


5mW 


DTL/TTL COMPATIBLE ADDRESS 




-550c to +1250C OPERATION 





APPLICATIONS 



DATA ACQUISITION SYSTEMS 
PRECISION INSTRUMENTATION 
DEMULTIPLEXING 
SELECTOR SWITCH 



The HI-1818A/1828A are monolithic high performance CMOS 
analog multiplexers offering built-in channel selection decoding 
plus an inhibit (enable) input for disabling all channels. 
Dielectric Isolation (Dl) processing is used for enhanced 
reliability and performance (see Application Note 521). 
Substrate leakage and parasitic capacitance are much lower, 
resulting in extremely low static errors and high throughput 
rates. Low output leakage (typically O.lnA) and low channel 
ON resistance (250 n) assure optimum performance in low level 
or current mode applications. 

The 1818A is a single-ended 8 channel multiplexer, while the 
HI-1828A is a differential 4 channel version. Either device 
is ideally suited for medical instrumentation, telemetry systems, 
and microprocessor based data acquisition systems. 

The HI-1818A-2 and HI-1828A are specified over -550C 
to +1250C, while the -5 versions are specified over QOC to 
+750C. 



PINOUT 



FUNCTIONAL DIAGRAM 



HI-18I8A 

ADDRESS Ai 
+5.0V SUPPLY 



Top View 




Section 1 1 for Packaging 



16 ADDRESS Aq 
15 -15V SUPPLY 
i4 +15V SUPPLY 
13 INI 
12 OUT 
11 IN2 
10 IN 3 
9 IN 4 



HI-1818A 



DIGITAL ADDRESS 



ADDRESS 

INPUT 
BUFFERS 



Act Au Aj. . 

ril r~n TTI — nl'""" 
■ □ □ □ 











DECODERS 



3i 



HI-1828A 

ADDRESS Ai 
+5.0V SUPPLY 



Top View 




Section 1 1 for Packaging 

16 ADDRESS Ao 

15 -15V SUPPLY 

14 +15V SUPPLY 

13 IN 1 

12 OUT 1 THRU 4 

11 IN 2 

10 IN 3 

9 IN 4 



HI-1828A 




I I i I • OUT 5 - e 

r' 1 r 'INI 

: |-C> — ^yi^ 



2646 



® IC MASTER 1983 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS (NOTE 1) 



Supply Voltage Between Pins 14 and 15 
Logic Supply Voltage, Pin 2 
Analog Input Voltage: V5upp|y +2V 

Vs„pply-2V 



40.0V 
30.0V 



Digital Input Voltage 

Total Power Dissipation (Note 2) 

Storage Temperature Range 



V-Supply to V+ Supply 
780mW 

-65OCto+150OC 



ELECTRICAL CHARACTERISTICS 



Supplies = +15V,-15V,+5V 
PARAMETER 



ANALOG CHANNEL CHARACTERISTICS 

* Vifj, Analog Signal Range 

* Ron. 0" Resistance (Note 3) 



*ls(OFF), Input Leakage Current 
* lo(ON). On Channel Leakage Current 

(HI-1818A) 

(HI-1828A) 
' IqIOFF) Output Leakage Current 

(HI-1818A) 

(HI-1828A) 



DIGITAL INPUT CHARACTERISTICS 
VAL, Input Low Threshold 
VAH , Input High Threshold (Note 4) 
lA, , Input Leakage Current 



SWITCHING CHARACTERISTICS 
Ts, Access Time (Note 5) 
Break-Before-Make Delay 
Settling Time (0.1%) 

(0.025%) 
C|N, Channel Input Capacitance 
Cqut. Channel Output Capacitance 

(HI-181BA) 

(HI-1828A) 
Cos(OFF), Drain-To-Source Capacitance 
Co, Digital Input Capacitance 



POWER REQUIREMENTS 

Pq. Power Dissipation 

PqS. Standby Power (Note 6) 

* !+, Current Pin 14 

* I., Current Pin 15 

* I L, Current Pin 2 



TEMP. 



Full 
+25''C 
Full 



Full 



Full 
Full 



Full 
Full 



Full 
Full 
Full 



+25OC 
+25''C 
+25OC 
+2500 
+25''C 

+25°C ■ 
+25OC 
+25°C 
+25OC 



Full 
Full 
Full 
Full 
Full 



HI-1818A-2/1828A-2 
-55°C to +12500 



MIN. 



4.0 



TYP. 



250 
300 



20 



100 
50 



100 
50 



350 
100 
1.08 
2.8 
4 

20 
10 
0.6 
5 



5 
5 

0.1 
0.3 
0.3 



MAX. 



+15 
400 
500 



50 



250 
125 



250 
125 



0.4 



0.5 
1 
1 



HI-1818A-5/1828A-5 
0OCto+75°C 



MIN. 



-15 



4.0 



TYP. MAX. 



250 
300 



20 



100 
50 



100 
50 



350 
100 
1.08 
2.8 

4 

20 
10 
0.6 
5 



5 
5 

0.1 
0.3 
0.3 



+15 
400 
500 



50 



250 
125 



250 
125 



0.4 



UNITS 



nA 



nA 
nA 



nA 
nA 



V 
V 

pA 



MS 
MS 

pF 

pF 
pF 
pF 
pF 



mW 
mW 
mA 
mA 
mA 



NOTES: 1. Voltage ratings apply when voltages at all other pins are 
within their normal operating ranges. 
2. Derate 9.25 mW/°C above 75°C. 
3- VouT = + 10VlouT = -1"iA. 

100% Tested for Dash 8 at +250C and +125°C Only. 



4. To drive from DTL/TTL circuits, IK pull-up resistors 
to + 5.0V supply are recommended. 

5. Time measured to 90% of final output level; 

Vquj = - 5.0V to +5.0V, Digital Inputs = OV to + 4.0V. 

6. Voltage at Pin 3, ENABLE = + 4.0V. 



TRUTH TABLES 



HI-I8I8A 





ADDRESS 




"ON" 


A? 




Ag 


EN 


CHANNE 


L 


L 


L 




1 


L 


L 


H 




2 


L 


H 


L 




3 


L 


H 


H 




4 


H 


L 


L 




5 


H 


L 


H 




6 


H 


H 


L 




7 


H 


H 


H 




8 


X 


X 


X 


H 


NONE 



HI-1828A 



ADDRESS 




"ON" 


Al Ao 


EN 


CHANNELS 


L L 


L 


1 and 5 


L H 


L 


2 and 6 


H L 


L 


3 and 7 


H H 


L 


4 and 8 


X X 


H 


NONE 



® IC MASTER 1983 



2647 



PERFORMANCE CHARACTERISTICS 



ON RESISTANCE vs 
ANALOG SIGNAL LEVEL 

' 1 mA 











V2 













IN 








1 ( 


» — 


o— o— 

o 


OUT 


f V, 







ON" 1mA 



Test Circuit 



350 
300 
250 
200 
150 



100 







































+125 




















+25< 
— -55 





















































-10 -8 -6 -4 -2 0+2+4+6 +8 +10 
V| - SIGNAL LEVEL (VOLTS) 



ON CHANNEL CURRENT 
vs VOLTAGE 



■r 



-o— — o- 



OUT 



Test Circuit 



+60 
+40 
+20 



3 ° 

z 

X -20 

i 

-40 
-60 





















-55°C 


















• — \ + 


1250c 


















+250C 
























+125° 


+250C 


















-550c 





















-10 -8 -6-4-2 0+2+4+6 +8 +10 
VOLTAGE ACROSS SWITCH 



LEAKAGE CURRENTS vs TEMPERATURE 

OFF LEAKAGE ON LEAKAGE 



ACCESS TIME 





— EN 


OUT 












— 









1 



T10V-=r- 



IT 



+5VDCC^ 



-5VDC O- 



^— O EN — I (a)id(ON) 



IS(OFF)Qa) 
■nn» — 



1 ±, 




SCOPE 



ov — I L_ 



♦ lOVMOV tnd -10V/»10V. 

(Two msatumnwin p«r davic* for lolOFF): 

«tOV/-10V ««l -10V/»1(IV.I 



lOOpA 





























Id(ON|=Id(0 


FFI / 






^HI-1818A = 
:^HI-1828A: 








y 


































\ IjlOFFl 
















(HI-1818A/ 


1828A) 





































vah 


1 1 

= 4V 


— _ 














_\/ A u /9 




— ■ 




AO 


INP 
V/DI 


LIT 














2 


V. 








-H-M 


■m 






m- 




m- 


H44- 




+ 


5V 
























k 


: 
■ 5 


UTPl 
V/DI 
-5V 


JT 
V. 


i 










-4V 

































lOOns/DIV. 



100 125 



TEMPERATURE- oc 



2648 



© IC MASTER 1983 



SCHEMATIC DIAGRAM 



ADDRESS INPUT BUFFER 




D2i 

-V .41 
ADDRESS 
INPUT 



ALLN-CHANNEL 
BODIES TO V- 

ALLP-CHANNEL 
BODIES TO V+ 
UNLESS OTHERWISE 
INDICATED. 



DECODER GATE 



EN 
o- 



+V9 



A2 0R A2 
o- 



4 [Nil 



A1 OR A1 
o- 



[P11 
[P12 

H |P13 

AO OR AO 

o-rl [P14 



[n12 -| [n13 



4 [n14 



P CHANNEL BODIES TO +V 
N channel BODIES TO -V 

A2 0R A2N0TUSED 
FOR H!-1828A 




TO 1 

•PCHANNEL 
SW I 

TO I 

N CHANNEL 
SW I 



IN SWITCH CELL | 



MULTIPLEX SWITCH 



FROM DECODE 



IN 



+V 
o 



P17 



N18 



N19 



PI 8 



FROM DECODE 



N17 



6 
-V 



OUT 



© IC MASTER 1983 



2649 




HI-506/HI-507 

Single 16/ Differential 
8 Channel CMOS 
Analog Multiplexers 



FEATURES 



DESCRIPTION 



o 

T3 
C 

o 
o 

£ 

CO 

CO 

i_ 
Cd 
X 



• LOW ON RESISTANCE (TYP.) 

• WIDE ANALOG SIGNAL RANGE 

• DIRECTLY TTL/CMOS 

COMPATIBLE 



170n 
+15V 



2.4V (LOGIC "1") 

• ACCESS TIME (TYP.) 300ns 

• HIGH CURRENT CAPABILITY (TYP.) 50mA 

• BREAK-BEFORE-MAKE SWITCHING 

• NO LATCH-UP 



APPLICATIONS 



• DATA ACQUISITION SYSTEMS 

• PRECISION INSTRUMENTATION 

• DEMULTIPLEXING 

• SELECTOR SWITCH 



These monolithic CMOS multiplexers each include an array of eight analog switches, 
a digital decode circuit for channel selection, a voltage reference for logic thresholds, 
and an ENABLE input for device selection when several mulitplexers are present. 

The Dielectic Isolation (Dl) process used in fabrication of these devices eliminates the 
problem of latchup. Also, Dl offers much lower substrate leakage and parasitic 
capacitance than conventional junction - isolated CMOS (See Application Note 521). 
With the low ON resistance (180f2 typical), this allows low static error, fast channel 
switching rates, and fast settling. 

Switches are guaranteed to break-before-make, so two channels are never shorted 
together. 

The switching threshold for each digital input is established by an internal +5V 
reference, providing a guaranteed minimum 2A\J for "1" and maximum O.SV for 
"0". This allows direct interface without pullup resistors to signals from most logic 
families: CMOS, TTL, DTL and some PMOS. For protection against transient 
overvoltage, the digital inputs include a series 200S2 resistor and a diode clamp to 
each supply. 

The HI-50G is a sixteen channel single-ended multiplexer, and the HI-507 is an eight 
channel differential version. The recommended supply voltage is± IBV; however, 
reasonable performance is available down to i 7V. Each device is packaged in a 16 
pin DIP. 

The HI-506/507 are specified for operation from O^C to 700C. The "-2" versions are 
specified from -550C to +125''C. "Dash 8",(-8) designates -2 parts which have been 
screened per Mil-Std-883/ Method 5004/Class B. 



PINOUT 



FUNCTIONAL DIAGRAM 



H 1-506 



TOP VIEW 



Section 1 '' for Packaging 



HI-506 




28 OUT 

?7 -V SUPPLY 

26- IN B 

25 IN 7 

24 IN 6 

23 IN 6 

22 IN 4 

21 IN 3 

20 IN 2 

19 IN I 

18 ENABLE 

17 ADDRESS Ag 

16 ADDRESS A, 

IS ADDRESS A; 




HI-5C7 



Section 1 1 for Packaging 



TOP VIEW 



HI-507 



VSUPPLY 


1- 


• 


— V/— 




-28 OUT A 


OUT B 


2- 








- 27 -VsUPPLY 


NC 


3- 








- 26 IN 8A 


IN 8B 


4 - 








- 25 IN 7A 


IN 7B 


5- 








-24 IN 6A 


IN 6B 


6- 








-23 IN 6A 


IN SB 


7- 








-22 IN 4A 


IN 4B 


8- 








-21 IN 3A 


IN 3B 


9- 








-20 IN 2A 


IN 2B 


10- 








- 19 IN lA 


IN IB 


11 — 








- 18 ENABLE 


GND 


12- 








- 17 ADDRESS Aq 


NC 


13- 








— 16 ADDRESS Ai 


NC 


14- 








— 15 ADDRESS A2 




2650 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 






Supply Voltage Between Pins 1 and 27 40V 


Total Power Dissipation* 


1200mW 


VeN. Va, Digital Input Overvoltage: 


Operating Temperature: 




V./VSupplyW+W 
^lVSupply(-)-4V 


HI-506/HI-507-2 


-550c to+1250C 


HI-506/HI-507-5 


OOC to +750C 


Analog Input Overvoltage: (Note 6) 


Storage Temperature 


-dO"L> to + loU"L» 


VDorVsJ^Supply (+) +2V 
IVSupply(-) -2V 


♦Derate 8mW/oC above Ta = +25oC 





SPECIFICATIONS 



SB 



ELECTRICAL CHARACTERISTICS Unless Otherwise Specified: Supplies = +15V, -15V; VAH(Logic Level High) =+2.4V, 

VAL(Logic Level Low) =+0.8V. For Test Conditions, consult Performance Characteristics section. 





HI-506/HI-507-2 
-550c to + 1250c 


HI-506/HI-507-5 
OOC to+750C 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


ANALOG CHANNEL CHARACTERISTICS 


















* Vs, Analog Signal Range 


Full 


-15 




+ 15 


-15 




+ 15 


V 


* Ron. On Resistance (Note 1) 


+250C 
Full 




170 


300 
400 




270 


500 




* ARqn, (Between Channels) 


+250C 




6 






6 




% 


* IS(OFF). Off Input Leakage Current 


+25''C 
Full 




0.03 


+50 




0.03 


+50 


nA 
nA 


* In(OFF) 0'' Output Leakage Current 
HI-506 
HI -507 


+250C 
Full 
Full 




0.3 


±500 
+250 




1.0 


±500 
±250 


nA 
nA 
nA 


* lO(ON), On Channel Leakage Current 
HI-506 
HI-507 


+250C 
Full 
Full 




0.3 


±500 
±250 




1.0 


±500 
±250 


nA 
nA 
nA 


DIGITAL INPUT CHARACTERISTICS 


















Val. Input Low Threshold 


Full 






+0.8 






+0.8 


V 


VaH> Input High Threshold 


Full 


+2.4 






+2.4 






V 


* Ia. Input Leakage Current (High or LowKNote 2) 


Full 






1.0 






5.0 


/xA 


SWITCHING CHARACTERISTICS 


















tA. Access Time 


+250C 




300 


1000 




300 




ns 


<OPEN. Break-Before Make Delay 


+250C 




80 






80 




ns 


tON(EN). Enable Delay (ON) 


+250C 




300 


1000 




300 






tOFF(EN), Enable Delay (OFF) 


+250C 




300 


1000 




300 




ns 


Settling Time (0.1%) 

(0.0 25%' 


+250C 
+2500 




1.2 
2.4 






1.2 
2.4 




/JS 


"Off Isolation" (Note 3) 


+250C 




75 






75 




dB 


Cs(OFF). Channel Input Capacitance 


+250C 




4 






4 




pF 


CdIOFF). Channel Output Capacitance 
HI-506 
HI-507 


+250C 
+250C 




44 
22 






44 
22 




pF 
pF 


Ca, Digital Input Capacitance 


+25''C 




2.2 






2.2 




pF 


Cos(OFF). Input to Output Capacitance 


+250C 




0.08 






0.08 




pF 


POWER REQUIREMENTS 


















*l+. Current Pin 1 (Note 4) 


Full 




1.7 


3.0 




3.4 


5.0 


mA 


*l-. Current Pin 27 (Note 4) 


Full 




0.4 


1.0 




0.8 


2.0 


mA 


*l+. Standby (Note 5) 


Full 




1.7 


3.0 




3.4 


5.0 


mA 


*l-. Standby (Note 5) 


Full 




0.4 


1.0 




0.8 


2.0 


mA 



NOTES: 1. VouT = -10V,loUT = -lmA 

2. Digital Inputs are Mos Gates. Typical Leakage 
Less Than InA. 

3. Ven = 0.8V. Rl = IK, Cl = 28pF,Vs = 7VRMS, 
f = 500kHz. 



4. Ven = 4.0V, All Va = 4.0V 

5. Ven = OV,AIIVa = OV 

6. If Analog Input Overvoltage Conditions are Anticipated, 

Use of HI-5Q6A/507A Protected Multiplexers is Recommended. 
See HI-506A/507A Datasheet. 



100% Tested for Dash 8 at+250C and +1250C Only. 



TRUTH TABLES 



HI-506 



A3 


A? 


A) 


AO 


EN 


■ON" 
CHANNEL 


X 


X 


X 


X 


L 


NONE 




1. 






H 


1 




L 






H 


2 




L 






H 


3 




L 






H 


4 




H 






H 


b 




H 






H 


6 




H 






H 


7 




H 






H 


8 


H 


L 






H 


9 


H 


L 






H 


10 


H 


L 






H 


It 


H 


L 






H 


12 


H 


H 






H 


13 


H 


H 






H 


14 


H 


H 


H 




H 


15 


H 


H 


N 


H 


H 


16 



HI-507 



A2 


A] 


AO 


EN 


ON 
SWITCH 
PAIR 


X 


X 


X 


L 


NONE 


L 


L 


L 


H 


1 


L 


L 


H 


H 


2 


L 


H 


L 


H 


3 


L 


H 


H 


H 


4 


H 


L 


L 


H 


5 


H 


L 


H 


H 


6 


H 


H 


L 


H 


7 


H 


H 


H 


H 


8 



® IC MASTER 1983 



2651 



HI-506A/HI-507A 

re Channel CMOS 
Ana fog Multiplexer with 
Overvoltage Protection 



FEATURES 



DESCRIPmN 



• ANALOG/DIGITAL OVERVOLTAGE PROTECTION 

• FAIL SAFE WITH POWER LOSS (NO LATCHUP) 

• BREAK-BEFORE-MAKE SWITCHING 

• DTL/TTL AND CMOS COMPATIBLE 

• ANALOG SIGNAL RANGE +15V 

• ACCESS TIME (TYP.) 500ns 



• SUPPLY CURRENT AT 1MHz 

ADDRESS TOGGLE (TYP.) 

• STANDBY POWER (TYP.) 



4mA 
7.5mW 



APPLICATIONS 



• DATA ACQUISITION 



• INDUSTRIAL CONTROLS 



The HI-506A and HI-507A are dielectrically isolated CMOS 
analog multiplexers incorporating an important feature; they 
withstand analog input voltages much greater than the supplies. 
This is essential in any system where the analog inputs originate 
outside the equipment. They can withstand a continuous input 
up to 10 volts greater than either supply, which eliminates the 
possibility of damage when supplies are off, but input signals 
are present. Equally important they can withstand brief input 
transient spikes of several hundred volts; which otherwise 
would require complex external protection networks. Neces- 
sarily, ON resistance is somewhat higher than similar unpro- 
tected devices, but very low leakage currents combine to pro- 
duce lovv-jerrors. Application Notes 520 and 521 further explain 
these features. 

The HI-506A-2 and HI-507A-2 are specified over -550C to 
+1250C while the -5 versions are specified over QOC to +750C. 



• TELEMETRY 



PINOUT 



FUNCTIONAL DIAGRAM 



HI-506A 



Section 11 for Packaging 



HI-506A 





HI-507A 



Section 1 1 for Packaging 



HI -507 A 



TOP VIEW 



VSUPPLY 


1- 


• 


— Vj* 




-28 OUT A 


OUT B 


2- 








— 27 -VsuPPLY 


NC 


3- 








- 26 IN 8A 


IN 8B 


4 - 








- 26 IN 7A 


IN 78 


5- 








— 24 IN 6A 


IN 68 


6- 








— 23 IN 5A 


IN 58 


7- 








— 22 IN 4A 


IN 48 


8- 








-21 IN 3A 


IN 38 


9- 








- 20 IN 2A 


IN 28 


10- 








- 19 IN lA 


IN IB 


11- 








— 18 ENABLE 


GND 


12- 








— 17 AODRESS Aq 


Vref 


13- 








— 16 AODRESS Ai 


NC 


14- 








— 15 ADORESS A2 




2652 



® IC MASTER 1983 



\ 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS 

Supply Voltage Between Pins 1 and 27 
Vrep to Ground V+ to Ground 
VeN. Va. Digital Input Overvoltage: 
^ I Vsupply (+) 

^ Wsupply (-) 
Analog Overvoltage: 

VSupply (+> 



vs 



IVSupply (-) 



40V 
+20V 

+4V 
-4V 

+20V 
-20V 



Total Power Dissipation* 
Operating Temperature 
HI-506A/507A-2 
HI-506A/507A-5 
Storage Temperature 



'Derate 8mW/°C above Ta = +750C 



1200mW 

-55°Cto+125°C 
0°Cto +75°C 
-65OCto+150°C 



ELECTRICAL CHARACTERISTICS (Unless otherwise specified) 
Supplies =--+15V, -15V; Vref (P"" 13) = Open; Vah (Logic Level High) =+4.0V; Val <Logic Level Low) = +0.8V 
For Test Conditions, consult Performance Characteristics section. 







HI-506A/507A-2 
-55''Cto+1250C 


HI-506A/507A-5 
CC to+750C 




PARAMETER 


TEMP. 


MIN. 


TYP. 


MAX. 


MIN. 


TYP. 


MAX. 


UNITS 


ANALOG CHANNEL CHARACTERISTICS 
*Vs, Analog Signal Range 


Full 


-15 




+ 15 


-15 




+ 15 


V 


•Ron. On Resistance (Note 1) 


+25OC 
Full 




1.2 
1.5 


1.5 
2.0 




1.5 
1.8 


1.8 
2.0 


KJl 


*'S (OFF). 0'' Input Leakage Current 


+25°C 
Full 




0.03 


+50 




0.03 


+50 


nA 
nA 


*'0 (OFF). 0" Output Leakage Current 

HI-506A 
HI-507A 


+25OC 
Full 
Full 




1.0 


+500 
+250 




1.0 


+500 
+250 


nA 
nA 
nA 


*'D (OFF) with Input Overvoltage Applied 
(Note 2) 


+25°C 
Full 




4.0 


2.0 




4.0 




nA 


*'D (ON). 0" Channel Leakage Current 

HI-5Q6A 
HI-507A 


+25°C 
Full 
Full 




0.1 


+500 
+250 




0.1 


+500 
+250 


nA 
nA 
nA 


DIGITAL INPUT CHARACTERISTICS 
V/\L. Input Low Threshold 1 TTL Drive 
Vah, Input High Threshold! (Note 7) 


Full 
Full 


4.0 




0.8 


4.0 




0.8 


V 
V 


y.'^'-! MOS Drive (Note 3) 

vah I 


+25''C 
+25°C 


6.0 




0.8 


6.0 




0.8 


V 
V 


*IA, Input Leakage Current (High or Low) 


Full 






1.0 






5.0 


n^ 


SWITCHING CHARACTERISTICS 
tA. Access Time 


+25OC 




0.5 


1.0 




0.5 




/JS 


'OPEN. Break-Before Make Delay 


+25OC 




80 






80 




ns 


'ON (EN). Enable Delay (ON) 


+25''C 




300 






300 




ns 


'OFF (EN). Enable Delay (OFF) 


+25°C 




300 






300 




ns 


Settling Time (0.1%) 

(0.025%) 


+25''C 
+25°C 




1.3 
4.4 






1.3 
4.4 




/JS 


"Off Isolation" (Note 4) 


+25OC 




65 






65 




dB 


Cs (OFF). Channel Input Capacitance 


+25OC 




5 






5 




pF 


I^D (OFF). Channel Output Capacitance HI-S06A 
HI-507A 

Ca. Digital Input Capacitance 


+25°C 
+25''C 
+25°C 




50 
25 
5 






50 
25 
5 




pF 
pF 
pF 


Cqs (OFF). Input to Output Capacitance 


+2500 




0.1 






0.1 




pF 


POWER REQUIREMENTS 
Pq. Power Dissipation 


Full 




7.5 






7.5 




mW 


Current Pin 1 (Note 5) 


Full 




0.5 


2.0 




0.5 


5.0 


mA 


*!-, Current Pin 27 (Note 5) 


Full 




0.02 


1.0 




0.02 


2.0 


mA 


*l+, Standby (Note 6) 


Full 




0.5 


2.0 




0.5 


5.0 


mA 


*l-. Standby (Note 6) 


Full 




0.02 


1.0 




0.02 


2.0 


mA 



1. VouT = .t:10V,loUT = -100pA. 

2. Analog Overvoltage = +33V. 

3. Vref = +10V. 

4. Ven = 0-8V, Rl = IK, Cl = 7pF, Vs ' 
3VRMS,f = 500KHZ.- 



5. Ven=+4-0V. 

6. Ven = 0.8V. 

7. To drive from DTL/TTL circuits, 1Kf2pull- 
up resistors to .+5.0V supply are recom- 
mended. 



• 100% Tested for Dash 8 
at +25°C and +125°C Only. 



TRUTH TABLES 



HI-506A 



A3 


A? 


A) 


Ao 


EN 


■ON" 
CHANNEL 


X 


X 


X 


X 


L 


NONE 




L 






H 


1 




L 






H 


2 




L 






H 


3 




L 






H 


4 




H 






H 


5 




H 






H 


6 




H 






H 


7 




H 






H 


3 


H 


L 






H 


9 


H 


L 






H 


10 


H 


L 






H 


11 


H 


L 






H 


12 


H 


H 






H 


13 


H 


H 






H 


M 


H 


H 


H 




H 


15 


H 


H 


H 


H 


H 


16 



HI-507A 



A2 


Al 


Ao 


EN 


ON 
SWITCH 
PAIR 


X 


X 


X 


L 


NONE 


L 


L 


L 


H 


1 


L 


L 


H 


H 


2 


L 


H 


L 


H 


3 


L 


H 


H 


H 


4 


H 


L 


L 


H 


5 


H 


L 


H 


H 


6 


H 


H 


L 


H 




H 


H 


H 


H 


8 



o 

ZJ 
■D 

c 
o 
o 

E 

(D 
CO 

CO 
u. 

CO 
X 



IC MASTER 1983 



2653 




HI-508/HI-509 

Single 8/Differential 
4 Channel CMOS Analog Multiplexer 



FEATURES 



DESCRIPTION 



• FAST ACCESS 220ns 

• FAST SETTLING (0.01%) 600ns 

• LOW Ron 180n 

• BREAK-BEFORE-MAKE SWITCHING 

• NO LATCH-UP 

• TTL/CMOS COMPATIBLE 2.4V (LOGIC "1") 



APPLICATIONS 



• PRECISION INSTRUMENTS 

• DATA ACQUISITION SYSTEMS 

• TELEMETRY 



These monolithic CMOS multiplexers each include an array of eight analog 
switches, a digital decode circuit for channel selection, a voltage reference for 
logic thresholds, and an ENABLE input for device selection when several multi- 
plexers are present. 

The Dielectric Isolation (01) process used in fabrication of these devices elim- 
inates the problem of latch-up. Also, Dl offers much lower substrate leakage and 
parasitic capacitance than conventional junction-isolated CMOS (see Application 
Note 521). Combined with the low ON resistance (180S2 typical), these benefits 
allow low static error, fast channel switching rates, and fast settling. 

Switches are guaranteed to break-before-make, so two channels are never shorted 
together. 

The switching threshold for each digital input is established by an internal +5V 
reference, providing a guaranteed min. 2.4\/ for "1" and max. 0.8V for "0". This 
allows direct interface without pull-up resistors to signals from most logic fam- 
ilies: CMOS, TTL, DTL, and some PMOS. For protection against transient 
overvoltage, the digital inputs include a series resistor and a diode clamp to 
each supply. 

The HI-508 is an eight channel single-ended multiplexer, and the HI-509 is a four 
channel differential version. The recommended supply voltage is ±1 5V; however, 
reasonable performance is available down to ±7\/. Each device is packaged in a 
16 pin DIP. 

The HI-508/509-5 are specified for operation from OOC to 70OC. The "-2" 
versions are specified from -550C to ±1250C. "Dash 8" (-8) designates -2 parts 
which have been screened per MIL-STD-883/Method 5004/Class B. 



PINOUTS 



FUNCTIONAL DIAGRAMS 



HI-508 



TOP VIEW 



Section 11 for Packaging 



HI-508 







1 




16 




Al 


ENABLE 




2 




15 




A2 


-V SUPPLY 




3 




14 




GND 


IN 1 




4 




13 




+V SUPPLY 


IN 2 




5 




12 




IN 5 


IN 3 




6 




11 




IN 6 


IN4 




7 




10 




IN 7 


OUT 




8 




9 




IN 8 






















TOP VI 


EW 


Section 11 


Ao 




1 


\^ 


16 




Al 


ENABLE 




2 




15 




GND 


-V SUPPLY 




3 




14 




+V SUPPLY 


IN 1A 




4 




13 




IN IB 


IN 2A 




5 




12 




IN 2B 


IN 3A 




6 




11 




IN 3B 


IN 4A 




7 




10 




IN 4B 


OUT A 




8 




9 




OUT B 




I J 

ADDRESS INPUT 

BUFFER AND 
LEVEL SHIFTER 



HI-509 



HI-509 




IN4A 
IN4B 



I 

ADDRESS INPUT 

BUFFER AND 
LEVEL SHIFTER 



MULTIPLEX 
SWITCH PAIRS 



2654 



© IC MASTER 1983 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS (Note 1) 

VSupp|y(+) to VSupply(-) 

VSupplyf"^' toGND 
VSupply<-> toGND 

Digital Input Overvoltage: 

VcM V/v I^Supplyj-'J 
VEN,Va |vsupp|y(-) 

Analog Input Overvoltage (Note 6): 
w w JVsupplv^+) 
^D'^S |vsupp|y(-) 



40V 

20V 
20V 



+4V 
-4V 



+2V 
-2V 



Power Dissipation * 

(Derate 8mW/oC above Ta = +750C) 

Operating Temperature Ranges: 

H 1-508/509-2, -8 

H 1-508/509-5, -6 

H 1-508/509-1 

Storage Temperature Range 



Package Limitation 



750mW 



-550c to+125oC 
OoCto 70OC 
-55OCto+200oC 

-65oCto+150OC 



ELECTRICAL CHARACTERISTICS Unless otherwise specified: Supplies = ± 15V, GND = OV 





HI-508/HI-509-2 
-550Cto+125<'C 


HI-508/HI-509-5 
0OCto+70OC 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


ANALOG CHANNEL CHARACTERISTICS 


















Vs Analog Signal Range 


Full 


-15 




+15 


-15 




+15 


V 


RON, On Resistance 


+250C 
Full 




180 
230 


300 
400 




180 
230 


400 
500 


f2 


A RON, Any Two Channels 


+250C 




5 






5 




% 


IS(OFF), Off Input Leakage Current (Note 2) 


+25''C 
Full 






10 

50 






10 

50 


nA 
nA 


ID(OFF), Off Output Leakage Current 
HI-508 
HI-509 


+250C 
Full 
Full 




10 
10 


200 
100 




10 
10 


200 
100 


nA 

n A 

rirt 


*lD(ON), On Channel Leakage Current 
HI-508 
HI-509 


+250C 
Full 
Full 




10 
10 


200 
100 




10 
10 


200 
100 


nA 
nA 


IDIFF, Differential Off Output Leakage Current 
(HI-509 Only) 


+250C 
Full 




1 

5 


5 

50 




1 

5 


5 

50 


nA 
nA 


DIGITAL INPUT CHARACTERISTICS 


















Vah, High Threshold 


Full 


2.4 






2.4 






V 


V/\L, Low Threshold 


Full 






0.8 






0.8 


V 


Ia, Input Leakage Current (High or Low) (Note 3) 


Full 






1 






1 




SWITCHING CHARACTERISTICS 


















tA, Access (Transition) Time 


+250C 
Full 




220 


500 
1000 




220 


1000 


ns 
ns 


tQPEM, Break-Before-Make Interval 


+250C 




70 






70 




ns 


tON(EN), Enable Turn-On 


+25''C 




210 






210 




ns 


tOFF(EN), Enable Turn-Off 


+25''C 




180 






180 




ns 


ts. Settling Tme to 0.1% 
to 0.01% 


+2500 
+25''C 




360 
600 






360 
600 




ns 
ns 


Off Isolation (Note 4) 


+250C 




68 






68 




dB 


Cs(OFF), Channel Input Capacitance 


+250C 




5 






5 




pF 


Co(OFF), Channel Output Capacitance 


+250C 




21 






21 




pF 


Ca, Digital Input Capacitance 


+250C 




3 






3 




pF 


Cos(OFF), 'nput to Output Capacitance 


+25''C 




.08 






.08 




pF 


POWER REQUIREIVIENTS 


















I+, Positive Supply Current (Note 5) 


Full 






2 






2 


mA 


I-, Negative Supply Current (Note 5) 


Full 






1 






1 


mA 


Pq, Power Dissipation 


Full 






45 






45 


mW 



NOTES: 1. Absolute maximum ratings are limiting values, 
applied Individually, beyond which the service- 
ability of the circuit may be impaired. Functional 
operation under any of these conditions is not 
necessarily Implied. 

2. Ten nanoamps is the practical limit for high 
speed measurement in the production test 
environment. Actually, Ig (off) is below lOOpA 
for most devices, at 250C. 

3. Digital Input leakage is primarily due to the clamp 
diodes (see Schematic). Typical leakage Is less 
than 1nAat250C. 



4. Ven = 0.8V, Ri = IK, Ci = 15pF, Vs = 7VriviS, 

f = 500kHz. Worst case isolation occurs on channel 
4 (HI-508) and channels 4, 8 (HI-509), due to 
proximity of the output pins. 

5. VEN = 0Vor5V. All Va = 0. 

6. If an overvoltage condition is anticipated (analog 
Input exceeds either power supply voltage), the 
HARRIS HI-508A/509A multiplexers are 
recommended. 



TRUTH TABLES 



CO 



HI-508 











"ON" 


A2 


Al 


aq 


EN 


CHANNEL 


X 


X 


X 


L 


NONE 


L 


L 


L 


H 


1 


L 


L 


H 


H 


2 


L 


H 


L 


H 


-3 


L 


H 


H 


H 


4 


H 


L 


L 


H 


5 


H 


L 


H 


H 


6 


H 


H 


L 


H 


7 


H 


H 


H 


H 


8 



HI-509 









"ON" 


Al 


AO 


EN 


CHANNEL 


X 


X 


L 


NONE 


L 


L 


H 


1 


L 


H 


H 


2 


H 


L 


H 


3 


H 


H 


H 


4 



© IC MASTER 1983 



2655 




HI-508A/509A 



8 Channel CMOS Analog 
Multiplexers with Overvoltage Protection 



FEATURES 



DESCRIPTION 



o 

TD 
C 

o 
o 

"e 


CO 
(0 



• ANALOG/DIGITAL OVERVOLTAGE PROTECTION 

• FAIL SAFE WITH POWER LOSS (NO LATCHUP) 

• BREAK-BEFORE-MAKE SWITCHING 

• DTL/TTL AND CMOS COMPATIBLE 

• ANALOG SIGNAL RANGE ±15V 

• ACCESS TIME (TYP.) 500ns 

• SUPPLY CURRENT AT 1MHz 

ADDRESS TOGGLE (TYP.) 4mA 

• STANDBY POWER (TYP.) 7.5mW 



APPLICATIONS 



DATA ACQUISITION 



• INDUSTRIAL CONTROLS 



The HI-508A and HI-509A are dielectrically isolated CMOS 
analog multiplexers incorporating an important feature; they 
withstand analog input voltages much greater than the supplies. 
This is essential in any system where the analog inputs originate 
outside the equipment. They can withstand a continuous input 
up to 10 volts greater than either supply, which eliminates the 
possibility of damage when supplies are off, but input signals 
are present. Equally important, they can withstand brief input 
transient spikes of several hundred volts; which otherwise 
would require complex external protection networks. Neces- 
arily, ON resistance is somewhat higher than similar unpro- 
tected devices, but very low leakage currents combine to pro- 
duce low errors. Application Notes 520 and 521 further explain 
these features. 

The HI-508A-2 and HI-509A-2 are specified over -550C to 
+1250C while the -5 versions are specified over O^C to +750C. 



• TELEMETRY 



PINOUT 



FUNCTIONAL DIAGRAM 



HI -508 A 



Section 11 for Packaging 



HI -508 A 



TOP VIEW 





1 


16 


_Ai 


En- 


2 


15 


_A2 


^sup — 


3 


14 


— GND 


INI — 


4 


13 


-+Vsup 


IN2 — 


5 


12 


— IN5 


IN3 — 


6 


11 


— IN6 


IN4 — 


7 


10 


— IN7 


OUT — 


8 


9 


— INS 




I 

ADDRESS INPUT BUF 
km LEVEL SHIFTE 



HI-509A 



TOP VIEW 



Ao- 

En- 

-Vsup. 

IN1A— I 

IN2A 

IN3A— I 

IN4A 
OUTA— I 



Section 11 for Packaging 
1 



HI-509A 



A 

— GND 

— +Vsup 
h- IN1B 

IN2B 

— IN3B 

— IN4B 
OUTB 




2656 



© IC MASTER 1983 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS 






Voltage between Supply Pins 40V 


Total Power Dissipation* 


725 mW 


V+ to Ground 


20V 


Operating Temperature: 




^EN' ^A' Digital Input Overvoltage: 


HI-508A/HI-509A-2 


-550c to+1250C 




VsupplyH +4V 


HI-508A/HI-509A-5 


0°C to +75OC 




Vsupply(-) -4V 


Storage Temperature 


-65OCto+150OC 


Analog Input Overvoltage: 








Vsupply (+) +2GV 








Vsupply(-) -20V 


*Derate 8mW/°C above \f^ = 


750c 



ELECTRICAL CHARACTERISTICS (Unless Otherwise Specified) 

Supplies = +15V, -15V; V/^^ (Logic Level High) = +4.0V; V^^l "-ogic Level Low) = +0.8V 
For Test Conditions, consult Performance Characterisltcs section. 







Hl- 


508A/509A-2 


HI-508A/509A-5 








-550Cto+125''C 


0°Cto+75°C 




PARAMETER 


TEMP. 


MIN. 


TYP. 


MAX. 


MIN. 


TYP 


MAX. 


UNITS 


ANALOG CHANNEL CHARACTERISTICS 


















*V5, Analog Signal Range 


Full 


-15 




+ 15 


-15 




+ 15 


V 


* f ON- Resistance (Note 1) 


+25°C 
Full 




1.2 
1.5 


1.5 
1.8 




1.5 
1.8 


1.8 
2.0 


Kn 


* 's(OFF)' ^" Input Leai<age Current 


+25OC 
Full 




0.03 


150 




0.03 




nA 
nA 


* '□(OFF)' Output Leakage Current 


+25OC 




1.0 






1.0 




nA 


HI-508A 


Full 






+250 






+250 


nA 


HI-509A 


Full 






+ 125 






+ 125 


nA 


* 'd(OFF) ^'^'^ Input Overvoltage Applied (Note 2) 


+25''C 
Full 




4.0 


2.0 




4.0 




nA 


*'d(ON)' Channel Leakage Current 


+25°C 




0.1 






0.1 




nA 


HI-508A 


Full 






!250 






1250 


nA 


HI-509A 








+ 125 






+ 125 


nA 


DIGITAL INPUT CHARACTERISTICS 


















Va 1 . Input Low Threshold I 
AL' '"h"" "-oLv^.o . (Note 6) 

V^^, Input High Threshold 1 


Full 






0.8 






0.8 


V 


Full 


4.0 






4.0 






V 


*l^, Input Leakage Current (High or Low) 


Full 






1.0 






1.0 


ilk 


SWITCHING CHARACTERISTICS 


















t^, Access Time 


+25°C 




0.5 


1.0 




0.5 




11% 


'open- ^^^^^ ' Before Make Delay 


+25''C 




80 






80 




ns 


'ON(EN)' ^"3ble Delay (ON) 


+25°C 




300 






300 




ns 


tQFF (EN)' Enable Delay (OFF) 


+25OC 




300 






300 




ns 


Settling Time (0.1%) 


+250C 




1.2 






1.2 




/LIS 


(0.0 2b%) 


+250C 




3.5 






3.5 




tl% 


"OFF Isolation" (Note 3) 


+25OC 




65 






65 




dB 


Cg (OFF)' Channel Input Capacitance 


+250C 




5 






5 




pF 


Cq (OFF)' Channel Output Capacitance 


















HI-508A 


+25OC 




25 






25 




pF 


HI-509A 


+25''C 




12 






12 




pF 


C^, Digital Input Capacitance 


+25''C 




5 






5 




pF 


Cqs (OFF)' Inpu* *o Output Capacitance 


+25''C 




0.1 






0.1 




pF 


POWER REQUIREMENTS 


















Pq, Power Dissipation 


Full 




7.5 






7.5 




mW 


*l+, Current (Note 4) 


Full 




0.5 


2.0 




0.5 


5.0 


mA 


*l-, Current (Note 4) 


Full 




0.02 


1.0 




0.02 


2.0 


mA 


*l+, Standby (Note 5) 


Full 




0.5 


2.0 




0.5 


5.0 


mA 


*l-, Standby (Note 5) 


Full 




0.02 


1.0 




0.02 


2.0 


mA 



NOTES: 1. VouT = i ""OV, louT= -■'OOAIA 

2. Analog Overvoltage = 1 33V 

3. Ven = 0.8V, Rl = 1 K, Cl = 7pF, 
Vs = 3V RMS, f = 500KHZ 

* 1 00% Tested for Dash 8 at +25^0 and +1 25°C 



4. Ven = +4.0V 

5. Ven = 0.8V 

6. To drive from DTL/TTL Circuits, 1 pull-up 
resistors to +5.0V supply are recommended 

Only. 



TRUTH TABLES 



HI-508A 



A2 


Al 


Ao 


En 


"ON" 
CHANNEL 


X 


X 


X 


L 


NONE 


L 


L 


L 


H 


1 


L 


L 


H 


H 


2 


L 


H 


L 


H 


3 


L 


H 


H 


H 


4 


H 


L 


L 


H 


5 


H 


L 


H 


H 


6 


H 


H 


L 


H 


7 


H 


H 


H 


H 


8 



HI-509A 





Ao 


EN 


ON 
SWITCH 
PAIR 


X 


X 


L 


NONE 


L 


L 


H 


1 


L 


H 


H 


2 


H 


L 


H 


3 


H 


H 


H 


4 



® IC MASTER 1983 



2657 



PERFORMANCE CHARACTERISTICS AND TEST CIRCUITS 



UNLESS OTHERWISE SPECIFIED: Ta = 250C, VsuPPLY = +15V, Vah = +4V, Val = 0.8V 



TEST CIRCUIT 
NO. 1 



Ron 



V2 



100 /YA 



lOO^A 
- V2 - 



-Cx — o 

-o 



ON RESISTANCE vs. 
INPUT SIGNAL LEVEL, SUPPLY VOLTAGE 



1.4 
1.3 
a 1.2 
I 1-1 
I 10 
= 0.9 
° 0.8 



ON RESISTANCE 
vs. ANALOG INPUT VOLTAGE 











— \ — 


















.T - . ncOr 


















'A " 








































Ta = ^ 


25OC 


















Ta = -55°C 





































































-10 -8 -6 



-4 -2 2 4 
V|fj - Analog Input (Volts) 



6 8 10 







1.5 


tanci 


> 


1.4 








cr 




1.3 




alue 


1.2 




> 







1.1 






i 










1.0 




(r 


0.9 










OR 



NORMALIZED ON RESISTANCE 
vs. SUPPLY VOLTAGE 















1 1 1 

+ 125°C>Ta>-550C 
















= +5V 































































































































+5+6+7 



+8 +9 +10 +11 +12 +13 +14 +15 
Supply Voltage - Volts 



LEAKAGE CURRENT vs. TEMPERATURE 

lOOnA 



lOOpA 



lOpA 



25" 



































OF 

- LEAKAGE 


F OUTPUT 






CURRENT 
IqIOFF) 
































^ nw 1 FA 


/Arc 






CURRENT. 






'0 


(ON) 








































\0FF INPU 


T 

CURRENT' 






^LEAKAGE 
Is (OFF) 



















































50° 75° 100° 

Temperature -"C 



125" 



TEST CIRCUIT 
NO. 2* 



TEST CIRCUIT 
NO. 3* 



-O EN 



i 



AIIdWFF) 



-=-*-10V 

X 



IS(OFF)^ 



1 i 



TEST CIRCUIT 
NO. 4* 



*Two measurements per channel: 
+ 10V/-10V and -10V/+10V. 
(Two measurements per device for ID(OFF): 
+ 10V/-10V and -10V/+10V.) 



D(ON) 
10V 



i 

+4V 



ANALOG INPUT OVERVQLTAGE CHARACTERISTICS ANALOG INPUT OVERVOLTAGE CHARACTERISTICS 




+15 +18 +21 +24 +27 +30 +33 +36 
V||ij - Analog Input Overvoltage (Volts) 



2658 



© 10 MASTER 1983 



PERFORMANCE CHARACTERISTICS AND TEST CIRCUITS (continued) 





+14 


< 
e 


+12 




+10 




+8 


u 








+6 


S 






+4 




+2 




Q 



ON CHANNEL CURRENT vs. VOLTAGE 

















-55»C 
















+25"C 
















H25°C 



































































TEST CIRCUIT 
NO. 6 



ON CHANNEL CURRENT 
vs. VOLTAGE 



+€ +8 +10 +12 
Vlfj - Voltage Across Switch 




SUPPLY CURRENT vs. TOGGLE FREQUENCY 



< 

E 



€ 4 

3 
CO 
I 

+' 2 















V 


SUPPLY = i 








Vsuppn 


= +10V^ 























IK 10K 100K 1M 10M 

Toggle Frequency, Hz 



TEST CIRCUIT 
NO. 7 



"supply 

SUPPLY CURRENT vs. 
TOGGLE FREQUENCY 




: 4V 

08V 

50°o DUTY CYCLE 
•SIMILAR CONNECTION FOR HI-509A 



CO 
X 



900 
800 
700 
600 
500 
400 
300 



ACCESS TIME vs. LOGIC LEVEL (HIGH) 



TEST CIRCUIT 
NO. 8 



3 4 5 6 7 8 9 10 11 12 13 14 15 
VaH "Logic Level (High), Volts 



A2 




ACCESS TIME vs. 
LOGIC LEVEL(HIGH) 





IN 1 


IN 2THRU 


IN 7 


HI-508A 


IN 8 




OUT 


GNO 





' SIMILAR CONNECTION FOR HI-509A 



SWITCHING WAVEFORMS 



VauM.o address 



— II I uni V 

M OV I 



DRIVE (V^) 



OUTPUT A 



lOV 



ACCESS TIME 



























V 


'a' 

2V/ 


'JPUT 
DIV. 


























































































■ ou 


rpuT 

//DIV 












A 



































200ns/Div. 



^ 10 MASTER 1983 



2659 



SWITCHING WAVEFORMS (continued) 



33 



TEST CIRCUIT 
NO. 9 

BREAK BEFORE MAKE DELAY (tgpEi^) 



OV-Val 



ADDRESS 
DRIVE (V^l 



-OUTPUT Vftf 



'OPEN 



- EN 
" CH 



*HI-508A 



IN 1 
IN 2 
THRU 
IN 7 
IN 8 
OUT 



J? 



Vqut 
-O 



BREAK BEFORE MAKE DELAY (tQPEN) 





























JPUT 


















2V/ 


)IV. 












































OUT 


PUT 


















.5V 


/DIV. 















































•SIMILAR CONNECTION FOR HI-509A 



lOOns/Div. 



ENABLE DRIVE 



Vau = 4.0 



90"/-^ 



OUTPUT 

90% 



'ON(EN) 



'OFF ' 
(EN) I"" 



TEST CIRCUIT 
NO. 10 

ENABLE DELAY (toN(EN). tOFF(EN)) 



*HI-508A 


IN 1 
IN 2 
THRU 
IN 8 




OUT 


GNO 



— O+lov 



I 



ENABLE DELAY (toN(EN).'OFF(EN)l 



























ENA 


BLE 




















DR 
2V/ 


VE 

DIV. 






















































f^-M- 












OUT 

5V/ 


PUT 

DIV. 

















































SIMILAR CONNECTION FOR HI-509A 



lOOns/Div. 



SCHEMATIC DIAGRAMS 



TTL REFERENCE CIRCUIT 

I 1 

■ V+ 



ADDRESS INPUT BUFFER 
AND LEVEL SHIFTER 




LEVEL 
SHIFTED 
ADDRESS 
TO DECODE 



LEVEL 
► SHIFTED 
ADDRESS 
TO DECODE 



2660 



© 10 MASTER 1983 



SCHEMATIC DIAGRAMS (continued) 




ADDRESS DECODER 



A) OR A) 



TOP CHANNEL 

DEVICE OF 

THE SWITCH PAIR 



TON-CHANNEL 

DEVICE OF 

THE SWITCH PAIR 



o 

ZJ 
T3 
C 

o 
o 

"e 


CO 

CO 



ca 
X 



MULTIPLEX SWITCH 



FROM 
DECODE 



» 



OVERVOLTAGE PROTECTION 
I 



R11 

-WN/— <i 



-ILJTl 



I i WT' 



FROM 
DECODE 



© IC MASTER 1983 



2661 



PACKAGING 



16 15 


14 


13 12 


11 10 9 


1 2 


3 


4 5 


6 7 8 




.100 TYP. 
(2.54) 



.OBO -^^ 1^ 
i.015 o°-15o 
(1.52 
±.381) 



A- 

.010 + .003 
(.2541.076) 



I3_E53_E3_EI3_EZ3_EZ3_EZ3_E1, 




kJ t=J LJ~Er 



.760+ ,010 
(19.30 + .254) ■ 



.125 
MIN. 
(3.17) 



■f I 



.135± 
.005 
(3.43 + 
.127) 



.0181.003 
(4.57 + .076) 



.100 TYP. 
(2.54) 



.060 TYP 
(1.52) 



^ (.762) 



.030 /// 
TYP. ^ 



.255 + . 010 
*(6.48i .254)'' 



.0101 .002 
(.254 + .051) 



1. All dimensions in inches; nnillimeters are shown in parentheses. 

2. All dimensions i.010 (t0.25mm) unless otherwise shown. 



ORDERING INFORMATION 



MODEL NUMBER 


OPERATING TEMPERATURE RANGE 


PRODUCT DESCRIPTION 


H1 1-508/509-1 


-550c to +200OC 


Hi-Temp (Includes 160 hours Burn-In) 


H1 1-508/509-2 


-550Cto+1250C 


Military 


H1 1-508/509-5 


OOC to +70OC 


Commercial 


H1 1-508/509-6 


OOC to +70OC 


Unpackaged Chips 


HI1-508/509-8 


-550c to+1250C 


Screened per MIL-STD-883/5004/ 
Class B 



SALES OFFICES 



1503 so. COAST ORIVE 
SUITE 320 

COSTA MESA, OA. 92626 
(714) 540-2176 

SUITE 300 

625 ELLISSTREET - 
MOUNTAIN VIEW, CA. 94043 
(415) 964-6443 

SUITE 227 

21243 VENTURA BLVD. 
WOODLAND HILLS, CA. 91364 
(213) 992-0686 



SUITE 115 

2020 WEST McNAB ROAD 
FT. LAUDERDALE, FL. 33309 
(305) 971-3200 



415WEST GOLF ROAD 
SUITE 19 

ARLINGTON HEIGHTS, IL. 
(312) 437-4712 



60005 



SUITE 301 

177 WORCESTER STREET 
WELLESLEY HILLS, MA. 02181 
(617) 237-5430 



SUITE 273 

555 BROAD HOLLOW ROAD 
MELVILLE, N.Y. 11747 
(516) 249-4500 

SUITE 206 

5250 FAR HILLS AVE. 
KETTERING, OH. 45429 
(513) 433-5770 

SUITE 325 

650 E.SWEDESFORD ROAD 
WAYNE, PA. 19087 
(215) 687-6680 



17120 DALLAS PARKWAY 
DALLAS, TX. 75248 
(214) 934-4237 



33919 NINTH AVE. SOUTH 
FEDERAL WAY, WA. 98003 
(20b) 838-4878 




SEMICONDUCTOR 
PRODUCTS DIVISION 

A DIVISION OF HARRIS CORPORATION 



NOTICE: Harris Semiconductor's products are sold'by description only. Harris Semiconductor reserves 
the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, 
the reader is cautioned to verify that data sheets are current before placing orders. 



2662 



© IC MASTER 1983 




t6 Channel/Differential 
8 Channel CMOS High Speed 
Analog Multiplexer 



FEATURES 



DESCRIPTION 



• ACCESS TIME (TYP) 

• SETTLING TIME (TYP TO 0.01%) 

• LOW LEAKAGE Is OFF 

Id OFF 

• low capacitance cs off 

cd off 

• high off isolation at 1mhz 

• low charge injection 

• single ended to differential 
selectable (sds) 

• logic level selectable (lls) 



100ns 

800ns 

lOpA 
35pA 

2.5pF 
18pF 

80dB 

0.3pC 



APPLICATIONS 



• DATA ACQUISITION SYSTEMS 

• PRECISION INSTRUMENTATION 

• INDUSTRIAL CONTROL 



The HI-516 is a monolithic dielectrically isolated, high speed, high perfor- 
mance CMOS analog multiplexer. It offers unique built-in channel selec- 
tion decoding plus an inhibit input for disabling all channels. The dual 
function of address input A3 enables the HI-516 to be user programmed 
either as a single ended IB-channel multiplexer by connecting 'out A' to 
'out B' and using A3 as a digital address input, or as an 8-channel diff- 
erential multiplexer by connecting A3 to the V" supply. The substrate leak- 
ages and parasitic capacitances are reduced substantially using the Harris 
dielectric isolation process to achieve optimum performances in both high 
and low level signal applications. The low output leakage current (Iq Off 
< lOOpA @ 250c) and fast settling (tsETTLE = 800ns to 0.01%) charact- 
eristics of the device make it an ideal choice for high speed data acquisition 
systems, precision instrumentation, and industrial process controls. 

The HI-516 is available in a 28 lead dual-in-line package. HI-516-5 is 
specified for operation over OOC to +750C, and the H 1-51 6-2 over -550C 
to +I250C. Processing to MIL-STD-883A, Class B screening is available 
by selecting the HI-516-8. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 1 1 for Packaging 



TOP VIEW 



v+ 


1 


28 


OUT B 


2 


27 


NC 


3 


26 


IN16/8B- 


4 


25 


IN15/7B 


5 


24 


IN 14/68 


6 


23 


IN13/5B 


7 


22 


IM12/4B 


8 


21 


II\I11/3B 


9 


20 


IN10/2B 


10 


19 


IN9/1B 


11 


18 


GND 


12 


17 


VDD/LLS 


13 


16 


A3/SDS 


14 


15 



OUT A 

V- 

■ IN8/8A 

■ miHA 

IN6/6A 
• IN5/5A 

■ IN4/4A 
IN3/3A 
IN2/2A 

■ IN1/1A . 
ENABLE 

■Ao 
■A, 
.A2 



EN> 
Ao> 
Al> 
A2> 
A3>-j-| 



A3 Decode 


A3 


Q 


"q 


H 


H 


L 


L 


L 


H 


V- 


L 


L 




INPUT BUFFER AND DECODERS MULTIPLEXER 
SWITCHES 



® IC MASTER 1983 



2663 



ABSOLUTE MAXIMUM RATINGS 








Digital Input Overvoltage: 




Voltage Between Supply Pins 


33V 


TTL 


-6V< Vah <+6V 




Total Power Dissipation* 


1200mW 


A2VSUPPLY(-) 


-2V 


Operating Temperature Ranges: 




CMOS 


vsupply(+) 


+2V 


H 1-5 16-2 


-550c to +1250C 


GND 


_2V 


III O 1 U *J 


nor tn 7fior 


Analog Input Voltage: 




Storage Temperature Range 


-65OCto150OC 


vs 


vsupply(+) 


+2V 


* Derate 8mW/0C above tA 


750c 


vsupply(-) 


-2V . 







SPECIFIC A TIONS 



83 



E LECTR IC AL CH AR ACTE R 1ST ICS (Unless otherwise specified) Supplies = +1 5V, -1 5V; Vah (Logic Level High) = +2.4V, 

Val (Logic Level Low) = +0.8V; Vdd/LLS = Open (Note 6) 







-550c to+1250C 


OOC to +750C 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


AIMAI flR PHANNFI rHARArTFRKTIf; 

MIMMLUu UriMIMliiCL UnMnMUICniOMUO 


















Vs, Analog Signal Range 


Cull 

run 


-15 




+ 15 


-15 




+15 


V 


Rq|\I, On Resistance (Note 1) 


+^b"L 




620 


750 




620 


750 


IZ 




c • • II 

hull 




770 


1,000 




700 


1,000 


Si 


1$ lUrr), Utt Input Leakage Lurrent 






0.01 






0.01 




nA 




Cull 

run 




0.38 


50 




0.38 


50 


nM 


iQlUrr^, UTT uutput Leakage uurrent 






0.035 






0.035 




n A 

nM 




Cull 

run 




0.48 


100 




0.48 


100 


n A 

nM 


Iq(ON), On Channel Leakage Current 






0.04 






0.04 




n A 

nM 




Cull 

r UM 




0.56 


100 




0.56 


100 


n A 

nM 


nir:iTAi impiit rnaRArTPRiQTiPQ 


















Val Input Low Threshold (TTL) 


Full 






0.8 






0.8 


V 


Vah Input High Threshold (TTL) 


Full 


2.4 






2.4 






V 


Vah Input Low Threshold (CMOS) 


Full 






0.3VDD 






0.3VDD 


V 


Vah Input High Threshold (CMOS) 


Full 


0.7VDD 






0.7VOD 






V 


Iah Input Leakage Current (High) 


Cull 

run 




0.05 


1 




0.05 


1 


II A 

/iA 


IAL Current (Low) 


Cull 

run 




4 


25 




4 


25 


II A 

ma 


C\A/ITPUIIMR rUI A O fl TTF n IQTI PC 
oVVI lUnllMu L«nMnALItnloll L>o 


















tA, Access Time 


+250C ' 




100 


150 




100 


150 


ns 




Full 




120 


200 




120 


200 


ns 


tOPEN# Break before make delay 


+250C 




20 






20 




ns 


tON(EN), Enable Delay (IN) 


+250C 




100 


150 




100 




ns 


tOFF(EN), Enable Delay (OFF) 


+250C 




80 


125 




80 




ns 


Settling Time (0.1%) 


+250C 




250 






250 




ns 


(0.01%) 


+250C 




800 






800 




ns 


Charge Injection (Note 2) 


+250C 




0.33 






0.33 




pC 


Off Isolation (Note 3) 


+250C 




90 






90 




dB 


Cs(OFF), Channel Input Capacitance 


+250C 




2.5 






2.5 




pF 


Co(OFF), Channel Output Capacitance 


+250C 




18 






18 




,PF 


Ca, Digital Input Capacitance 


+250C 




5 






5 




pF 


Cds(OFF), Input to Output Capacitance 


+250C 




0.02 






0.02 




pF 


POWER REQUIREMENTS 


















PD, Power Dissipation 


Full 




525 






525 




mW 


I+, Current (Note 4) 


Full 




17.5 


25 




17.5 


30 


mA 


r, Current (Note 4) 


Full 




17.5 


25 




17.5 


30 


mA 


I+, Standby (Note 5) 


Full 




17.0 


25 




17.0 


30 


mA 


r, Standby (Note 5) 


Full 




17.0 


25 




17.0 


30 


mA 



NOTES: 
1 . 
2. 

3. 



V|N=ilOV, IOUT=-100/JA 

V|N = OV, Cl = lOOpF, Enable input 

pulse = 3V, f = 500kHz 

VEN = 0.8V, Vs = 3VRMS, f = 500kHz, 

Cl = 40pF, R L = 1 k. Pin 3 grounded 



4. VEN = +2.4V 

5. VEN = 0.8V 

6. Vqd/LLS Pin = Open or Grounded for TTL Compatibility 
Vdq/LLS Pin = Vqq for CMOS Compatibility 



2664 



© IC MASTER 1983 



HI-516 USED AS A DIFFERENTIAL 
8-CHAI\INEL MULTIPLEXER 



A3 CONNECTTO VSUPPLY 


ON CHANNEL TO 


ENABLE 


A? 


Ai 


An 


OUT A 


OUT B 


L 


X 


X 


X 


NONE 


NONE 


H 


L 


L 


L 


1A 


IB 


H 


L 


L 


H 


2A 


2B 


H 


L 


H 


L 


3A 


3B 


H 


L 


H 


H 


4A 


4B 


H 


H 


L 


L 


5A 


5B 


H 


H 


L 


H 


6A 


6B 


H 


H 


H 


L 


7A 


7B 


H 


H 


H 


H 


8A 


8B 



TRUTH TABLES 



HI-516 USED ASA 16-CHANNEL MULTIPLEXER OR 
8 CHANNEL DIFFERENTIAL MULTIPLEXER * 



USE A3 AS DIGITAL 
ADDRESS INPUT 


ON CHANNEL TO 


ENABLE 


A3 


A2 


Al 


AO 


OUT A 


OUT B 


1 

L 


Y 
A 


A 


Y 
A 


Y 
A 


M n M p 

1^ U IM C 


IM U lu C 


U 

n 




1 




1 

u 


1 A 


IM U iv I. 


u 
n 




1 




u 
n 


9A 


Iv U IM C 


u 
n 




1 

L 




1 


oM 


Iv U IM P 


U 

n 




1 




14 
M 


/I A 


M n M P 

IM U l\I t 


U 

n 




u 

n 




1 

L 


DA 


M n M p 

IM U IM P 


LI 

n 




Ll 

n 




LI 

n 


C A 

oA 


M n M p 
IM U IM t 


u 
n 




u 

n 




1 

L 


7 A 


M n M p 

IM U IM t 


, H 




H 




H 


8A 


NONE 


H 


H 


L 




L 


NONE 


IB 


H 


H 


L 




H 


NONE 


2B 


H 


H 


L 




L 


NONE 


3B 


H 


H 


L 




H 


NONE 


4B 


H 


H 


H 




L 


NONE 


5B 


H 


H 


H 




H 


NONE 


6B 


H 


H 


H 


H 


L 


NONE 


7B 


H 


H 


H 


H 


H 


NONE 


SB 



For 16-Channel single-ended function, tie 'out A' to 
'out B', for dual 8-channel function use the A3 address 
pin to select between MUX A and MUX B, where MUX A 
is selected with A3 low. 



© IC MASTER 1983 



2665 




H 1-518 

8 Channel/Differential 
4 Channel CMOS High Speed 
Analog Multiplexer 



FEATURES 



DESCRIPTION 



• ACCESS TIME (TYP) 

• SETTLING TIME (0.1%) 

• LOW LEAKAGE 1$ (OFF) 

Id (OFF) 

• LOW CAPACITANCE (TYP) Cs (OFF) 

Cd (OFF) 

• HIGH OFF ISOLATION @ (1MHz) 

• SINGLE ENDED TO 

DIFFERENTIAL MODESELECTABLE (SDS) 

• LOGIC LEVEL SELECTABLE (LLS) 

• LOW CHARGE INJECTION 



80ns 
250ns 

50pA 
lOOpA 
2pF 

lOpF 

75dB 



0.3pC 



APPLICATIONS 



• DATA ACQUISITION SYSTEMS 

• INDUSTRIAL CONTROLS 

• TELEMETRY 



The HI-518 Is a monolithic, high performance, high speed Analog 
Multiplexer, constructed utilizing the Harris Dielectrically isolated 
CMOS process. 

This device has the added feature that it can be user programmed 
either as a single ended 8-channel multiplexer by connecting 'out A' 
to 'out B' and using A2 as a digital address input, or as a 4 - 
channel differential multiplexer by connecting A2 to the V~ supply. 

TTL or CMOS compatibility is also selectable. Low leakage current. 
Id off < lOOpA @ 250C, and fast settling, 250ns to 0.1%,charac- 
teristics of this device make it an ideal choice for high speed data 
acquisition systems, precision instrumentation and industrial process 
controls. 

The HI-518 is available in an 18 lead Dual-in-Line Package. The 
HI-518-5 is specified for operation over QOC to +750C, and the 
HI-518-2 over -550C to +1250C. Processing to MIL-STD-883A 
Class B screening is available by selecting the HI-518-8. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 11 for Packaging 



+V[] 1 

OUTb[^ 2 

IN8/4B 3 

IN 7/3B 4 

IN6/2bQ 5 

IN 5/1B 6 
GND 7 

Vdd/LLs|^ 8 

A2/SDS[I 9 



TOP VIEW 
w 



Y VDO/LtS 



8 ^ OUTA 

^ IN 4/4A 
^ IN 3/3A 
^ IN 2/2 A 
^ IN 1/1A 
^ ENABLE 

]ao 
□ a. 



AO > 



A2>- 



A2 


a 


Q 


H 


H 


L 


L 


L 


H 


V- 


L 


L 



IN 1A 




OUT A 
— ^ 



IN4A 
-< 



IN IB 
— < 



OUTB 



IN 48 
— < 



INPUT BUFFER AND DECODERS MULTIPLEXER SWITCHES 



2666 



© IC MASTER 1983 



SPECIFICATIONS 








\JBkJ 


\ ABSOLUTE MAXIMUM RATINGS 










«; Digital Input Overvoltage: 




Voltage Between Supply Pins 


33V 




TTL 


-6V<Vah<+6V 




Total Power Dissipation* 


725mW 




A2VsuPPLY(-) 


-2V 


Operating Temperature Ranges: 






i CiVIOS 


vsupply(+) 

GND 


+2V 
-2V 


HI-518-2 
HI-518-5 


-550c to+1250C 
OOC to 750c 




1 Analog Input Voltage: 




Storage Temperature Range 


-650C to 150OC 




1 


vsupply(+) 


+2V 


*Derate 8mW/0C above t/\ 


750c 




. vsupply(-) 


-2V 









ELECTRICAL CHARACTERISTICS 



(Unless otherwise specified) Supplies = +15V, -15V; Vah (Logic Level High) = +2.4V, 
Val (Logic Level Low) = +0.8V; Vqd/LLS = Open (Note 6). 







-550c to+1250C 


0OCto+75oC 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


ANALOG CHANNEL 
CHARACTERISTICS 


















Vg Analog Signal Range 


Full 


-15 




+15 


-15 




+ 15 


V 


Ron On Resistance (Note 1) 


+250C 
Full 




480 
700 


750 
1000 




480 
700 


750 
1000 


n 


Is (OFF) Off Input 
Leakage Current 


+250C 
Full 




0.05 
0.60 


50 




0.05 
0.60 


50 


nA 
nA 


Id (OFF) Off Output 
Leakage Current 


+250C 
Full 




0.10 
0.30 


50 




0.10 
0.30 


50 


nA 
nA 


Id (ON) On Channel 
Leakage Current 


+250C 
Full 




0.10 
0.30 


50 




0.10 
0.30 


50 


nA 
nA 


DIGITAL INPUT 
CHARACTERISTICS 


















^AL Input Low Threshold (TTL) 


Full 






U.O 






U.O 


v 


V/\(-| Input High Threshold (TTL) 


Full 


2.4 






2.4 






V 


Val Input Low Threshold (CIVIOS) 


Full 






0.3VDD 






0.3VDD 


V 


v/^(-l Input nign inresnoiu \uiviuoj 


Pill! 

run 


7\/nn 












V 


IAH Input Leakage Current (High) 


Full 




0.05 


1 




0.05 


1 


^^^ 


Iah Input Leakage Current (Low) 


Full 




4 


20 




4 


20 


pA 


SWITCHING CHARALTbHISTILb 


















tA, Access Time 


+250C 
Full 




80 
110 


125 
150 




80 
110 


125 
150 


ns 


'OPEN. Break before make Delay 


+250C 




20 






20 




ns 


tQiM (EN), Enable Delay (ON) 


+250C 




80 


150 




80 


150 


ns 


tOFF (EN), Enable Delay (OFF) 


+250C 




60 


125 




60 


125 


ns 


Settling Time (0.1%) 


+250C 




250 






250 




ns 


(0.01%) 


+250C 




800 






800 






Charge Injection (Note 2) 


+250C 




0.3 






0.3 




pC 


Off Isolation (Note 3) 


+250C 




86 






86 




dB 


Cs (OFF) Channel Input Capacitance 


+250C 




1.9 






1.9 




PF 


Cd (OFF) Channel 
Output Capacitance 


+250C 




10 






10 




PF 


Ca, Digital Input Capacitance 


+250C 




3 






3 




pF 


CDS (OFF) Input to Output 
Capacitance 


+250C 




0.02 






0.02 




pF 


POWER REQUIREMENTS 


















PD, Power Dissipation 


Full 




360 


450 




360 


540 


mW 


I+, Current (Note 4) 


Full 




12 


15 




12 


18 


mA 


I', Current (Note 4) 


Full 




12 


15 




12 


18 


mA 


I+, Standby (Note 5) 


Full 




11.5 


15 




11.5 


18 


mA 


r. Standby (Note 5) 


Full 




11.5 


15 




11.5 


18 


mA 



NOTES: 

1. V|N = i 10V, loUT = -100^^A 

2. V|N = OV, Cl = lOOpF, Enable 
Input pulse = 3V, f = 500kHz. 



VeN = .0.8V, VS =3VRI\/IS, f = 500kHz, 
Cl = 40pF, Rl = Ik. Due to the pin 
to pin capacitance between IN 8/4B 
(Pin 3) and Out B (Pin 2) channel 
8/48 exhibits 60dB of Off Isolation 
under the above test conditions. 



o 

T3 
C 

o 
o 

E 

<D 
CO 
w 

ca 
X 



4. VEN = +2.4V. 

5. VEN = 0.8V. 

6. VDD/LLS Pin = Open or ground- 
ed for TTL compatibility. 
VDD/LLS Pin = VdD for CMOS 
compatibility. 



© IC MASTER 1983 



2667 



TRUTH TABLES 



CO 

X 



HI-518 USED AS 8 CHANNEL MULTIPLEXER OR 
4 CHANNEL DIFFERENTIAL MULTIPLEXER 



HI-518 USED AS DIFFERENTIAL 
4 CHANNEL MULTIPLEXER 



O 

T3 
C 

o 
o 

E 

0) 
CO 

CO 



USE A2AS DIGITAL 








ADDRESS. INPUT 




ON CHANNEL TO 


ENABLE 


A2 


Al 


An 


OUT A 


OUT B 


L 


X 


X 


X 


NONE 


NONE 


H 


L 


L 


L 


1A 


NONE 


H 


L 


L 


H 


2A 


NONE 


H 


L 


H 


L 


3A 


NONE 


H 


L 


H 


H 


4A 


NONE 


H 


H 


L 


L 


NONE 


IB 


H 


H 


L 


H 


NONE 


2B 


H 


H 


H 


L 


NONE 


3B 


H 


H 


H 


H 


NONE 


4B 



A2 CONNECT TO 






V- SUPPLY 


ON CHANNELTO 


ENABLE 


Al 


AO 


OUT A 


OUTB 


L 


X 


X 


NONE 


NONE 


H 


L 


L 


1A 


IB 


H 


L 


H 


2A 


2B 


H 


H 


L 


3A 


3B 


H 


H 


H 


4A 


4B 



2668 



® IC MASTER 1983 




Hf^524 

4 Channel 
Video Multiplexer 



FEA TURES 



DESCRIPTION 



• CROSSTALK (lOMHz) > 60dB 

• FAST ACCESS TIME 150ns 

• FAST SETTLING TIME (0.01%) 600ns 

• TTL COMPATIBLE 



APPLICATIONS 



WIDEBAND SWITCHING 
o RADAR 

• TVVIDEO 

• ECM 



The HI-524 is a four channel CMOS analog multiplexer designed to 
process single-ended video signals with bandwidths up to lOMHz. The 
chip includes a 1 of 4 decoder for channel selection and an Enable 
input to inhibit all channels (chip select). 

Three CMOS transmission gates are used in each channel, as compared 
to the single gate in more conventional CMOS multiplexers. This pro- 
vides a double, barrier to the unwanted coupling of signals from each 
input to the output. In addition, Dielectric Isolation (Dl) processing 
helps to insure that Crosstalk exceeds 60dB at 10MHz. 

The HI-524 is designed to operate into a wideband buffer amplifier 
such as the HARRIS HA-5190. The multiplexer chip includes two 
"on" switches in series, for use as a feedback element with the amplifier. 
This feedback resistance matches and tracks the channel Rqn resis- 
tance, to minimize the amplifierVos and its variation with temperature. 

The HI-524 is well suited to the rapid switching of video signals in 
telemetry, instrumentation, radar and video systems. It is packaged 
in an 18 pin ceramic DIP and operates on±15\/ supplies. 

The performance levels available are: HI1-524-2, -550C to +1250C 
operating range; H1 1-524-5, O^C to +750C operating range and 
HI1-524-8, -550c to+1250C operating range plus 100% screening 
per MIL-STD-883/Method 5004/Class B. Chips for hybrid applications 
are designated H 10-524-6. 



O 
13 
■D 
C 

o 
o 

E 

(D 
CO 
CO 

X- 

CO 

X 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 11 for Packaging 



IN 1 >- 



+V (I 1 
OUT C 2 
SIG GND C 3 
SIG GND C 4 
IN4 C 5 
SIG GND C 6 
IN 3 C 7 
PWR GND C 8 
Ai C 9 



TOP VIEW 
v.^ 



□ FB(IN) 

□ -V 

□ FB(OUT) 

□ SIG GND 

□ in 2 

□ SIG GND 

□ IN 1 

□ EN 

□ Ao 



IN 2 >- 



SIG GND >- 
SIG GND>- 



1 0F4 
DECODER 



-< FBIIN) 



-<FBlaUTI 



TRUTH TABLE 









ON 


Al 


Ao 


EN 


CHANNEL 


X 


X 


L 


NONE 


L 


L 


H 


r 


L 


H 


H 


2 


H 


L 


H 


3 


H 


H 


H 


4 



-15V PWR +16V EN Ao Ai 
GNO 



•CHANNEL 1 IS SHOWN 
SELECTED IN THE DIAGRAM 



© IC MASTER 1983 



2669 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS 

Digital Input Overvoltage: 

-6V < Vah < +6V 

Analog Input (Vs) or Output (Vq) 
+VSUPPLY +2V 
-VSUPPLY -2V 



Voltage Between Supply Pins 
Either Supply to Ground 
Total Power Dissipation 
Operating Temperature Range: 

HI -524-2, -8 

HI-524-5 
Storage Temperature Range 



33V 
16.5V 
750mW 

-55oCto+1250C 
0OCto75OC 
-650Ct0 150OC 



ELECTRICAL CHARACTERISTICS 



(Unless otherwise specified) Supplies = +15V,-15V; Vah (Logic Level High) =+2.4V, 
Val = (Logic Level Low) = +0.8V;Vei\| =+2.4V 









H 1-524-2,- 


8 






HI-524-5 












550c to+1250C 




OOC to +750C 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Analog Channel Characteristics 






















VS, Analog Siynal Range 


Pull 

run 


-10 






+10 


-10 






+10 




nUN, un nesisiancc vivOic w 








700 








700 








Pull 

run 








1.5K 








1.5K 





lO fnPP\ nff Inrtiit 1 oal/ana Piirront /Mnta 9\ 








0.2 








0.2 




nA 




Pull 

run 








50 








50 


nA 


\\j \\jvri, UTT uuipul L6aKayc uurreni \i)joie l) 








0.2 








0.2 




nA 




Full 








50 








50 


nA 


In (ON) rin Phnnnpl 1 palf;inp Piirrpnt fNntP 7) 


+25°C 






0.7 








0.7 




nA 




Full 








r;n 










nA 


3dB Bandwidth: (Note 3) 


Full 






20 








20 




MHz 


Digital Input Characteristics 






















V/AI Inniit 1 niA/ ThrPchnlH /TTI \ 
vML inpUl LUW 1 IllcdllUlU \ 1 1 L/ 


Full 








0.8 








0.8 


\j 


\/AU Innnt Minh Throchnlrl /TTI \ 


Pull 

run 


2.4 








2.4 








\j 


1 A LI Inniit 1 pqI/qiip Piirront lUinhl 
■ Mn iiipui LcdKdgc uUllclll xniyii/ 


Full 






0.05 


1 






0.05 


1 




lAL Current (Low) 


Full 






4 


25 






4 


25 


i^A 


Switching Characteristics 






















tA, Access Time (Note 4) 


+250C 






150 


300 






150 


300 


ns 




Full 


















ns 


tOPEN, Break before make delay (Note 4) 


+250C 






20 








20 




ns 


tON (EN), Enable Delay (ON), Rl = 500^2 


+250C 






180 


300 






180 




ns 


tOFF (EN), Enable Delay (OFF), RL = 50012 


+250C 






180 


250 






180 




ns 


Settling Time (0.1%) (Note 4) 


+250C 






200 








200 




ns 


(0.01%) 


+250C 






600 








600 




ns 


Crosstalk (Note 5) 


+250C 






-65 








-65 




dB 


CS (OFF), Channel Input Capacitance 


+250C 








6 






6 




PF 


CD (OFF), Channel Output Capacitance 


+250C 








4 






4 




pF 


CA, Digital Input Capacitance 


+250C 








5 






5 




pF 


Power Requirements 






















PD, Power Dissipation 


Full 






540 








540 




mW 


I+, Current (VEN = 2.4V) (Note 6) 


Full 






18 


25 






18 


25 


mA 


r, Current (VEN = 2.4V) (Note 6) 


Full 






18 


25 






18 


25 


mA 


I+, Standby (VEN = 0.8V) (Note 6) 


Full 






18 


25 






18 


25 


mA 


r, Standby (VEN = 0.8V) (Note 6) 


Full 






18 


25 






18 


25 


mA 



1. V|N = OV; loUT =100 A 
(See Test Circuits!/ 1 ) 

2. Vo = ilOV; VS = + 10V 
(See Test Circuits ^ 2, 3, 4) 

3. MUX output is buffered with HA-5190 as 
shown in Applications section. 

4. (See Test Circuit.^ 5) 



5. V|N = 10MHz, 3Vp-p on one channel, with any 
other channel selected. (Worst case is channel 3 
selected with input on channel 4.) MUX output is 
buffered with HA-5190 as shown in Applications 
section. Terminate all channels with 75^2 . 

6. Supply currents vary less than 0.5mA for switching 
rates from DC to 2MHz. 



2670 



® IC MASTER 1983 



PERFORMANCE CHARACTERISTICS AND TEST CIRCUITS 



(UNLESS OTHERWISE SPECIFIED Ta = 250C. VsUPPLY = ±15V, Vah = 2.4V, Val = 0.8V) 

ON RESISTANCE 



TEST CIRCUIT NO. 1 

'OUT 100//A 











IN 




OUT 




— O O— 




fviN 







Ron = 



V2 



100/iA 



ON RESISTANCE VS. ANALOG 
INPUT VOLTAGE 



Ron ( n ) 



1,000 
900 
800 
700 
600 
500 
400 



Ta = +1250C 



Ta = +250C 



Ta = -550C 



-10V -8V -6V -Ay -2V OV 2V 4V 6V 8V 10V 
V|N (VOLTS) 

ON RESISTANCE VS. SUPPLY VOLTAGE 



1,000 



Ron (n ) 



Ta = +250C 
V|N = OV 



9.0 9.5 10.0 10.5 11.0 11.5 12.0 12.5 13.0 13.5 14.0 14.5 15.0 
(VOLTS) 



TEST CIRCUIT NO. 2* 



-O EN 



LEAKAGE CURRENT 



*Two measurements per channel: 
+ 1I0V/-10V and -10V/+10V. 
(Two measurements per device for ID(OFF): 
+ 10V/-10V and -10V/+10V.) 



X 



A)Id(OFF) 
+ 10V 



X 



LEAKAGE CURRENT 
VS. TEMPERATURE 



TEST CIRCUIT NO. 3* 



IS(OFF) 



TEST CIRCUIT NO. 4* 



IT 



— I (a)id(on) 
~i-±iov 



^ 



1.0 
0.9 

LEAKAGE Sy 
CURRENT n'c 



(nA) 



































Id o^ 














































































































'SOFF 


















FF 









25 50 75. 100 125 150 
TEMP (oc) 



© 10 MASTER 1983 



2671 



PERFORMANCE CHARACTERISTICS AND TEST CIRCUITS (Continued) 



TEST CIRCUIT NO. 5 

SETTLING TIME 
ACCESS TIME 
BREAK-BEFORE-MAKE DELAY 



HI-524 



+3VO- 



+3VO- 



<ro-^ 



aq ai en 



HA-5190 



-0+5V 



Va 



(USE DIFFERENTIAL COMPARATOR 
PLUG-IN ON SCOPE FOR SETTLING 
TIME MEASUREMENT.) 



OUTPUT 
-O 



75n 



+3V 



ADDRESS DRIVE (Va) 



VaH = 2.4V 



HA-5190 
OUTPUT 



2.4V 



val=ov 



access TIME.tA 
SETTLING TIME, ts 




±0.1% OF F/S 
(OR ±0.01%) 



ACCESS TIME 



1cm 















1 














































































\ 








\ 


V/crr 








m 








++++ 












































50ns/ 


:m 























2672 



© 10 MASTER 1983 



APPLICATIONS 



O Often it is desirable to buffer the H 1-524 output, to avoid 
loading errors due to the channel "ON" resistance: 



CH 1 o- 

75^2 



CH 2 O— 

75a 



CH 3 a 



75S2 



CH4 O 




75J2 



APPROXIMATELY lOpF SHOULD REMOVE ANY LOW LEVEL 
INSTABILITY AT THE OUTPUT. 



The main requirement for the buffer amplifier is a full power 
bandwidth high enough to avoid attenuation of the video 
signal. The HARRIS HA-5190 is well suited for this purpose; 
in fact the HI-524 was designed to be compatible with the 
5190. This 524/5190 combination offers a 3dB bandwidth of 
at least 20MHz for a 3V peak-to-peak input. As mentioned 



earlier, the 524 includes a feedback element for the amplifier 
which matches and tracks the channel "ON" resistance. 

Note that the on-chip feedback element between pins 16 and 18 
includes two switches in series, to simulate a channel resistance. 
These switches open for M^w = Low. This allows two or more 
Hl-524's to operate into one HA-5190, with their feedback 
elements connected in parallel. Thus, only the selected multi- 
plexer provides feedback, and the amplifier remains stable. 

All HI-524 package pins labeled 'SIG GND' (pins 3, 4, 6, 13, 
15) should be externally connected to signal ground for best 
Crosstalk performance. 

Bypass capacitors (0.1 to l.OpF) are recommended from each 
HI-524 supply pin to power ground (pins 1 and 17 to pin 8). 
Locate the buffer amplifier near the HI-524 so the two ca- 
pacitors may bypass both devices. 

If an analog input IV or greater is present when supplies are 
off, a low resistance is seen from that input to a supply line. 
(For example, the resistance is approximately 160n for an 
input of Current flow may be blocked by a diode in 

each supply line, or limited by a resistor in series with each 
channel. The best solution, of course, is to arrange that no 
digital or analog inputs are present when the power supplies 
are off. 



O 

■a 

c 
o 
o 

E 

(D 
CO 
(0 



© IC MASTER 1983 



2673 



HI-539 

Monolithic, Four Cliannel, 
Low Level, Differential Multiplexer 



FEATURES 



DESCRIPTION 



• DIFFERENTIAL PERFORMANCE, TYP.: 

• LOW ARoN,+1250C B.BH 

• LOW Alo(oi\|),+1250C 0.6nA 

• LOW A(CHARGE INJECTION) O.lpC 

• LOW CROSSTALK -120dB 

• SETTLING TIME, +0.01% 900ns 

• WIDE SUPPLY RANGE ±5VTO±18V 

• BREAK-BEFORE-MAKE SWITCHING 

• NO LATCH-UP 



APPLICATIONS 



• LOW LEVEL DATA ACQUISITION 

• PRECISION INSTRUMENTATION 

• TEST SYSTEMS 



The Harris HI-539 Is a monolithic, four channel, differential multiplexer. 
Two digital inputs are provided for channel selection, plus an Enable input 
to disconnect all channels. 

Performance is guaranteed for each channel over' the range ± 10V, but is op- 
timized for low level differential signals. Leakage current, for example, which 
varies slightly with input voltage, has its distribution centered at zero for 
zero input volts. 

In most monolithic multiplexers, the net differential offset due to thermal 
effects becomes significant for low level signals. This problem is minimized 
in the HI-539 by symmetrical placement of critical circuitry with respect 
to the few heat producing devices. 

The HI-539 will be offered in both commercial and military temperature 
ranges, with screening available for MIL-STD-883, Class B. Supply voltages 
are ± 15V and power consumption is only 2.5mW. The package is a 16 pin 
ceramic DIP. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 1 1 for Packaging 



TOP VIEW 



<IN lA 



AO 


1 




16 




A1 


EN 


2 




15 




GND 


-Vps 


3 




14 




+Vps 


IN1A 


4 




13 




IN1B 


IN2A 


5 




12 




IN2B 


IN3A 


6 




11 




IN3B 


IN4A 


7 




10 




IN4B 


OUTA 


8 




9 




OUTB 




IN4A 
IN4B 



I ! 

ADDRESS INPUT 

BUFFER AND 
LEVEL SHIFTER 



' ! I J 

DECODERS MULTIPLEX 
SWITCH PAIRS 



2674 



© IC MASTER 1983 



SPECIFICATIONS ^ 



AR<im IITF MAXIMUM RATINR^i 






Voltage Between Supply Pins (Vps+, Vps-) 40V 

\/r»ltpno frnm oitHor Qiinnix/ fn f^rminri OflV/ 

vuiidyc iiuiii ciiiit;) ouppiy lu uiuuiiu cAjy 


Internal Power Dissipation (Derate 
8mW/oC above +750C ambient) 


725mW 


Analog Input Voltage, Vs Vps- < Vg < Vps+ 


Operating Temperature Range 
HI-539-2,-8 


-550C to+1250C 


Digital Input Voltage, V^ Vps_ < Va < Vps+ 


H 1-539-4 


-250Cto+850C 


Storage Temperature Range -650C to +150OC 


HI-539-5 


0OCto+75OC 



ELECTRICAL CHARACTERISTICS (Unless otherwise specified) Supplies = i 15V, Ven = +4.0V, 

Vah (Logic Level High) = +4.0V, Val (Logic Level Low) = +0.8V. 

See the Performance Characteristics Section for test circuits and conditions. 

Selected parameters are defined in the Definitions Section. 







HI-539-2,-8 


HI-539-4, -5 




PARAMETER 


TEMP 


T VP 
1 T r 


IVI A A ( IVI 1 N / 


TVP 
I T r 


MAY / r/1 1 M \ 
IVI A A \ IVI 1 N / 


UNITS 
















A MAI nr ruAMMCi puada'c 
AlyALUu UnAIMIMtL LHAnAo 














Vg, Analog Signal Range 


Full 




(-10)/+1U 




(-1U)/+1U 


V 


Rqim. O'l Resistance = OV 


+250C 


650 


850 


650 


850 


il 


V|M = ± 10V 


+250C 


700 


900 


700 


900 


il 


V||\|=^OV 


Full 


950 


1.3K 


800 


IK 


il 


Vim = ± lov 


Full 


1.1k 


1.4k 


900 


1.1k 


il 


-\RON iSideA-SideBl 














V|N = OV 


+250C 


4.0 


24 


4.0 


24 


il 


V||\| = 1 10V 


+25QC 


4.5 


27 


4.5 


27 


il 


V|N = OV 


Full 


4.75 


28 


4.0 


24 


il 


V||\| = ± 10V 


Full 


5.5 


33 


4.5 


27 


il 


'S(OFF), 0*' Input Leakage Current 














(Note 1) 














Condition OV 


+250C 


30 


200 


30 


200 


pA 


Condition ± 10V 


+250C 


100 




100 




pA 


Condition OV 


Full 


2 


10 


0.2 


1 


nA 


Condition + 10V 


Full 


5 


25 


0.5 


2.5 


nA 


-^IS(OFF). [SideA -SideBl 














Condition OV 


. +250C 


3 


100 


3 


100 


pA 


Condition 1 1 OV 


+25''C 


10 




10 




pA 


Condition OV 


Full 


0.2 


2 


0.02 


0.2 


nA 


Condition 1 0V 


Full 


0.5 


5 


0.05 


0.5 


nA 


'D(OFF). Off Output Leakage Current 














(Note 1) 














Condition OV 


+25''C 


30 


200 


30 


200 


nA 

pA 


Condition 1 10V 


+250C 


100 




100 




pA 


Condition OV 


Full 


2 


10 


0.2 


1 


nA 


Condition! 10V 


Full 


5 


25 


0.5 


2.5 


nA 


A Id(OFF), iSide A - Side Bl ' 














Condition OV 


+250C 


3 


100 


3 


100 


pA 


Condition ± 10V 


+250C 


10 




10 




pA 


Condition OV 


Full 


0.2 


2 


0.02 


0.2 


nA 


Condition 1 10V 


Full 


0.5 


5 


G.05 


0.5 


nA 


'D(ON). On Channel Leakage Current 














(Note 1) 














Condition OV 


+250C 


50 


200 


50 


200 


pA 


Condition i 10V 


+250C 


150 




150 




pA 


Condition OV 


Full 


5 


25 


0.5 


2.5 


nA 


Condition ± 10V 


Full 


6 


40 


0.8 


4.0 


nA 


AlD(oM) [SideA -SideBl 














Condition OV 


+250C 


10 


100 


10 


100 


pA 


Condition ± 10V 


+250C 


30 




30 




pA 


Condition OV 


Full 


0.5 


5 


0.05 


0.5 


nA 


Condition ± 10V 


Full 


0.6 


6 


0.08 


0.8 


nA 


•^Vqs, Differential Offset Voltage 


+250C 


0.02 


0.04 


0.02 


0.04 


PV 




Full 


0.70 


10 


0.08 


1.0 


;jV 



© IC MASTER 1983 



2675 



SPECIFICATIONS (Continued) 



PARAMETER 



TEMP 



HI-539-2 -8 



TYP MAX(MIIM) 



HI-539-4,-5 



TYP MAXIMIN) 



UNITS 



DIGITAL INPUT CHARACTERISTICS 

V/\L, Input Low Threshold 

V/^H. Input High Threshold 

IAH' Input Leakage Current (High) 

IAL. Input Leakage Current (Low) 

SWITCHING CHARACTERISTICS 
T/\, Access Time 

Topen, Break-Before-Make Delay 

TON(EN). Enable Delay On 

TOFF(EN), Enable Delay Off 

Settling Time, to ±0.01% 
Charge Injection (Output) 
^ Charge Injection (Output) 
Charge Injection (Input) 
Differential Crosstalk (Note 3) 
Single Ended Crostalk (Note 3) 
CS(OFF). Channel Input Capacitance 
C[)(OFF), Channel Output Capacitance 
C[|(ON). Channel On Output Capacitance 
CqS, Input to0utputCapacitance(Note4) 
C/\, Digital Input Capacitance 



Full 
Full 
Full 
Full 



+250C 
Full 

+250C 
Full 

+250C 
Full 

+250C 
Full 

+250C 

Full 

Full 

Full 

+250C 

+250C 

Full 

Full 

Full 

Full 

Full 



250 
450 

85 



250 

160 

0.9 
3 

0.1 

10 
124 
100 

5 

7 

17 
0.08 
3 



0.8 
(4.0) 

1 

1 



750 
1,000 

(30) 
(30) 

750 
1,000 

650 
900 



250 
450 

85 



250 

160 

0.9 
3 

0.1 
10 
124 
100 

5 
7 

17 

0.08 
3 



0.8 
(4.0) 

1 

1 



750 
1,000 

(30) 
(30) 

750 
1,000 

650 
900 



V 
V 

^A 



;js 
pC 
pC 
pC 
dB 
dB 
pF 
pF 
pF 
pF 
pF 



POWER REQUIREMENTS 
Pq, Power Dissipation 

1+ Current 

I- Current 

i V, Supply Voltage Range 



+250C 
Full 

+250C 
Full 

+250C 
Full 

Full 



2.5 



0.150 



0.001 



45 



2.0 



1.0 

(±5)/ +18 



2.5 



0.150 



0.001 



±15 



45 



2.0 



1.0 

(i 5)/ i 18 



mW 
mW 

mA 
mA 

mA 
mA 



.NOTES 

1. See Test Circuits #2, 3, 4. The condition ± 10V means: 

IS(OFF) and Id(OFF) : (Vs = +10V, Vq = -10V), then 

(VS=-10V, Vo = +10V) 
ID(ON) : (+10V,then-10V) 

2. AVqs (Exclusive of thermocouple effects) = 

Ron •^id(on) + id(on) '^'^on- 



See Applications section for discussion of additional Vqs 
error. 

3. V||\| = 1 kHz, 1 5Vp-p on all but the selected channel. See 
Test Circuit ^9. 

4. Calculated from typical Single-Ended Crosstalk performance. 



2676 



© IC MASTER 1983 





12 Bit High Speed Mono/itfiic 
Digital'to-Analog Converter 



FEATURES 



DESCRIPTION 



2mA, F.S. 



• OUTPUT CURRENT 

• MONOLITHIC COMSTRUCTION 

• EXTREMELY FAST SETTLING 

• LOW GAIN DRIFT 

• EXCELLENT LINEARITY 

• DESIGNED FOR MINIMUM GLITCHES 

• MONOTONIC OVER TEMPERATURE 

• NOTE: HI-562A IS RECOMMENDED FOR NEW DESIGNS 



300ns TO 0.01% (TYP.) 
±1Gppm/0C (MAX.) 
±1/2 LSB (MAX.) 



APPLICATIONS 



• CRT DISPLAY GENERATION 

• HIGH SPEED A/D CONVERTERS 

• VIDEO SIGNAL RECONSTRUCTION 

• WAVEFORM SYNTHESIZERS 

• HIGH SPEED DATA ACQUISITION 

• HIGH-REL APPLICATIONS 

• PRECISION INSTRUMENTS 



The H arris HI-562A is the first monolithic digital-to-analog con- 
verter to combine both ultra-high speed performance and 12-bit 
accuracy on the same chip. The HI-562A's fast output current 
settling of 300ns to 0.01% is achieved using dielectric isolation 
processing to reduce internal parasitics for fast rise and fall times 
during switching. Output glitches are minimized in the HI-562A 
by incorporating equally weighted current sources switched into 
an R-2R ladder network for symmetrical turn-ON and turn-OFF 
switching times. This creates within the chip a very uniform 
constant thermal distribution for excellent linearity and also 
completely eliminates thermal transients during switching. High 
stability thin film resistor processing together with laser trimming 
provide the HI-562A with guaranteed true 12-bit linearity to 
within ±1/2 LSB maximum at +25°C for -4 and -5 parts, and to 
within ±1/4 LSB maximum at +250C for -2 and -8 parts. TheHI- 
562A is recommended as a replacement for higher cost hybrid and 
modular units for increased reliability and accuracy in applications 
such as CRT displays, precision instruments and data acquisition 
systems requiring throughput rates as a high as 3.3 MHz for full 
range transitions. Its small size makes it an ideal choice as the 
heart of high speed A/D converter designs or as a building block 
in high speed or high resolution industrial process control systems. 
The HI-562A is also ideally suited for aircraft and space instru- 
mentation where operation over a wide temperature range is 
required. 

The HI-562A-5 is specified for operation over O^C to +750C, 
the HI-562A-4 over -250C to +850C and the HI-562A-2 and Hl- 
562A-8 over -550C to +1250C. Processing MIL-STD-883A Class 
B screening is available by selecting the HI-562A-8. All are 
available in a hermetically sealed 24-lead dual-in-line package. 



PINOUT 



FUNCTIONAL DIAGRAM 



CMOS/TTL 
LOGIC SELECT 



2 — 

*Vref(LOIN) 3 — 

N/C 4 

Vref(HIIN) 5 — 

Vps- 6 — 

BIPOLAR R IN 7 

BIPOLAR R OUT 8 — 

IDACOUT 9 

lOVSPANR 10 — 

20V SPAN R 11 

*GND 12 



TOP VIEW 
^ 



HI-562A 



Section 11 for Packaging 

-24 BIT 1 (MSB) IN 

-23 BIT 2 IN 

-22 BIT3IN 

— 21 BIT 4 IN 

20 BIT 5 IN 

19 BIT6IN 

18 BIT 7 IN 

17 BIT8IN 

16 BIT9IN 

15 BIT10IN 

14 BIT 11 IN 

13 BIT12(LS8IIN 



TTL/CMOS 
LOGIC 
LEVEL BIT 
GND Vt SELECT (MSBI 2 3 
@ (T) (5) @ @ 



5 6 7 



20V 
: 5K SPAN 



VrefIHIINI 




*Pin 3 connected to bottom case 
for high frequency shielding. 



© IC MASTER 1983 



2677 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS (Referred to Ground)1 



Power Supply Inputs 


Vps+ 


+20V 




Vps- 


-20V 


Reference Inputs 


VREF (Hi) 


±Vps 


Digital Inputs 


Bits 1-12 


-IV, +12V 




CMOS/TTL Logic Select 


-1V,+12V 


Outputs 


Pins 7, 8, 10, 11 


±Vps 




Pin 9 


+Vps,-5V 



Power Dissipation Pd, Package lOOOmW 

Operating Temperature Range 

HI-562A-2 -550C to+125oC 

HI-562A-4 -250Cto+85oC 

HI-562A-5 OOC to +750C 

HI-562A-8 -550c to+125oC 

Storage Temperature Range -650C to +1 SO^C 



ELECTRICAL CHARACTERISTICS (@ +250C, Vps+, = +5V, Vps- = -15V, Vref = +10V, pin 2 tied to pin 12 

unless otherwise noted) 



PARAMETER 


CONDITIONS 


HI-562A-2/HI-562A-8 


HI-562A-4/HI-562A-5 


UNITS 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


INPUT CHARACTERISTICS 


Digital Inputs (3) 

, Input Voltage (2) 
Logic "1" 
Logic "0" 

TTL < 

Input Current (2) 
Logic "1" 
Logic "0" 

, Input Voltage 
Logic "1" 
Logic "0" 

CiVIOS< 

Input Current 
Logic "1" 
Logic "0" 


Bit ON "Logic 1" 
Bit OFF "Logic 0" 

Overfull 
temp, range 
Pin 2 tied to Pin 12 


2.0 


20 
-50 


0.8 

100 
-100 


2.0 


20 

-50 


0.8 

100 
-100 


V 
V 

nA 


Connect pin 2 to pin 1 for 
Vps+> 9.5V. Otherwise 
(for CMOS levels below 8V), 
connect pin 2 to pin 12. 


0.7Vps+ 


20 
-50 


0.3Vp5+ 

100 
-100 


0.7Vp5+ 


20 
-50 


0.3Vps+ 

100 
-100 


V 
V 

nA 


Reference Input 
Input Resistance 
Input Voltage 






20K 
+ 10 






20 K 
+ 10 




n 

V 


TRANSFER CHARACTERISTICS 


Resolution 


Over full temp, range 






12 






12 


Bits 


Noniineariry (3) 


@+250C 
Over full temp, range 




±1/2 


±1/4 

+ 1 




+ 1/4 


+ 1/2 
+ 1 


LSB 


Differential 
Noniineariry (3) 


(a+250C 
Over full temp, range 






±1/4 
MONOTON 


ICITY GUA 


±1/4 
RANTEED 


+ 1/2 


LSB 


Relative Accuracy (6) 
Gain Error 
Bipolar Offset Error 
Unipolar Offset Error 


With 50 n(1%) Trim Resistors 
All Bits ON 

All Bits OFF 




±.024 
±.024 
±.012 


+0.25 
+0.25 
±0.05 




±.024 
+ 024 
±.012 


±0.25 
±0.25 
+0.05 


% FSR (4) 


Adjustment Range 
Gain 

Bipolar Offset 


See Operating Instructions 
WithlOOnTrim 
Potentiometers 




to 25 
±0.5 






tn.?e 
±0.5 




% FSR 


Temperature Stability 

Gain Drift (3) 
Offset Drift (3) 

Unipolar Offset 

Bipolar Offset 
Differential Nonlinearity 


Drift specified with internal 
span resistors for voltage output 
Overfull 
temp, range 

All Bits OFF 
Over full temp, range 




±6 
±1 


±10 

±2 
±4 

+2 




±2 


+10 

±2 
±4 
+2 


ppm of 
FSR/OC 


Settling Time (3) 
to ±1/2 LSB 


All BitsON-to-OFF or 
OFF-to-ON 




300 


400 




300 


400 


ns 



2678 



® IC MASTER 1983 



SPECIFICATIONS (continued) 







HI-562A-2/HI-562A-8 


HI-562A-4/HI-562A-5 




PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Major Carry Transient 
Peak Amplitude 
Settling Time to 
90% Complete 


From 011...1 to 100...0 
or 100...0to011...1 




0.7 
35 






0.7 
35 




mA 
ns 


Power Supply Sensitivity (3) 
Unipolar Offset 
Vpj+ (s> +5V 
Vps-(5>-15V 


All Bits OFF 




±0.5 
±0.5 






±0.5 
±0.5 






Bipolar Offset 
Vps+ @ 5V 
Vps-@-15V 


All Bits OFF, Bipolar mode 




±1.5 
±1.5 






±1.5 
±1.5 




ppm of 
FSR/% Vps 


Gain 
Vpj+@+5V 
Vpj-(a-15V 


All Bits ON 






±3.5 
+7.5 






±3.5 
±7.5 




OUTPUT CHARACTERISTICS 


Output Current 
Unipolar 
Bipolar 






-2.0 
+1.0 






-2.0 
+1.0 




mA 


Resistance 






2K 






2K 




ohms 


Capacitance 






20 






20 




pF 


Output Voltage Ranges 
Unipolar 

Bipolar 


Using external op amp 
and internal scaling 
resistors. See Figure 1 
and Table 1 for connections 




Oto+5 
Oto+10 

±2.5 

±5 

±10 






Oto +5 
Oto+10 

+2.5 

±5 

±10 




V 


Compliance Limit (3) 




-3 




+10 


-3 




+10 


V 


Compliance Voltage (3) 


Over full temp, range 




±1.0 






±1.0 




V 


Output Noise 


0.1 to 10Hz (All Bits ON) 
0.1 to 5MHz (All Bits ON) 




30 
100 






30 
100 




AlV (p-p) 


POWER REQUIREMENTS 


Vps+ (7) 
Vps- 


Over'full 
temp, range 


4.5 
-13.5 


5 

-15 


16.5 
-16.5 


4.75 
-13.5 


5 

-15 


16.5 
-16.5 


V 


lps+ (5) 
Ips- (5) 


All Bits ON or OFF in 
either TTL or CMOS mode (250C) 




8 
16 


15 
23 




8 
16 


15 

23 


mA 


lps+ (5) 
Ips- (5) 


Same as above except 
over full temp, range 




11 

20 


20 
30 




11 

20 


20 
30 


mA 


Power Dissipation 


+250C 
Vps+ = +5V 
Vps- = -15V 




280 


420 








mW 



© IC MASTER 1983 



2679 




HI-565A 

High Speed Monolithic 
Digital to Analog 
Converter with Reference 



FEATURES 



DESCRIPTION 



• DAC AND REFEREMCE ON ASINGLE CHIP 

• PIN COMPATIBLE WITH AD565A 

• VERY HIGH SPEED: SETTLES TO 1/2 LSB IN 250ns, MAX. 

FULL SCALE SWITCHING TIME 30ns, TYP. 

• GUARANTEED FOR OPERATION WITH ±12V SUPPLIES 

• MONOTONICITY GUARANTEED OVER TEMPERATURE 



1/2 LSB MAX NONLINEARITY GUARANTEED OVER 
TEMPERATURE 



• LOW GAIN DRIFT (MAX, DAC PLUS 
REFERENCE) 

• LOW POWER DISSIPATION 



25ppm/0C 



250mW 



APPLICATIONS 



• CRT DISPLAYS 

• HIGH SPEED A/D CONVERTERS 

• SIGNAL RECONSTRUCTION 

• WAVEFORM SYNTHESIS 



The HI-565A is a fast, 12 bit current output, digital to analog 
converter. The monolithic chip includes a precision voltage refer- 
ence, thin-film R-2R ladder, reference control amplifier and twelve 
high-speed bipolar current switches. 

The Harris Semiconductor dielectric isolation process provides latch- 
free operation while minimizing stray capacitance and leakage 
currents, to produce an excellent combination of speed and accur- 
acy. Also, ground currents are minimized to produce a low and 
constant current through the ground terminal, which reduces error 
due to code-dependent ground currents. 

HI-565A dice are laser trimmed for a maximum integral non- 
linearity error of ±1/4 LSB at +25^0. In addition, the low noise 
buried zener reference is trimmed both for absolute value and 
minimum temperature coefficient. 

The HI-565A is offered in both commercial and military grades. 
For high-reliability requirements, additional 100% screening per 
Mil-Std. 883, Method 5004, Class B is available. See Ordering 
Information. 

Package is a 24 pin side-brazed ceramic DIP. Power requirement 
is 250mW, typical. 



PINOUT 



FUNCTIONAL DIAGRAM 



NC 

NC H 

vcc C 

REF OUT (+10V) □ 

REF GIMD C 

REF m □ 

-vee C 

bipolar r in c 

lOAC OUT E 

10V SPAN R E 

20V SPAN R C 

POWER GND □ 




2TT] BIT 1 (MSB) IN 
□ BIT 2 IN 
3 B1T3IN 
BIT4IN 
BIT 5 IN 
BIT 6 IN 
BIT 7 IN 
BIT 8 IN 
BIT 9 IN 
BIT 10 IN 
BIT 11 IN 
BIT 12 (LSB) IN 



REF OUT VCC 
4 O 3 



BIP. OFF. 08 



REF 

'g 19.95K 
O-WV- 



3.5K 

-AW— I 



-VEE pwR 
GND 




2680 



© IC MASTER 1983 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS* 

Vcc to Power Ground 0Vto+18V 

VEE to Power Ground OVto-ISV 

Voltage on DAC Output (Pin 9) -3V to +12V 

Digital Inputs (Pins 13-24) to Power Ground -IV to +7.0V 

Ref In to Reference Ground ±12V 

Bipolar Offset to Reference Ground ±12V 



10V Span R to Reference Ground ±12V 

20V Span R to Reference Ground ±24V 

Ref Out Indefinite Short to Power Ground 

Momentary Short to Vcc 

Package Power Dissipation 

Ceramic (D) lOOOmW 
Plastic (N) 750mW 



* Absolute maximum ratings are limiting values beyond which the serviceability of the circuit may be impaired. 



ELECTRICAL CHARACTERISTICS (Ta = +25oC, Vcc = +15V, Vee = -15V, Unless Otherwise Specified) 





HI-565AJ,HI-565AS 


HI-565AK,HI-565AT 




MfinPi 

IVI ij U U 1- 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


DATA INPUTS (Note 1) (Pins 13 to 24) 


















TTL or 5V CMOS (TmIN to TmaX) 


















Input Voltage 


















Bit ON Logic "1" 


+2.0 






+5.5 


+2.0 




+5.5 


V 


Bit OFF Logic "0" 








+0.8 






+0.8 


V 


Logic Current (Each Bit) 


















Bit ON Logic "1" 






.01 


+1.0 




.01 


+1.0 


pA 


Bit OFF Logic "0" 






-2.0 


-20 




-2.0 


-20 


pA 


RESOLUTION 






12 






12 


Bits 


OUTPUT 


















Current Unipolar (All Bits On) 


-1.6 




-2.0 


-2.4 


-1.6 


-2.0 


-2.4 


mA 


Bipolar (All Bits on or Off) 


±0.8 




+ 1.0 


±1.2 


±0.8 


+ 1.0 


+1.2 


mA 


Resistance (Exclusive of Span Resistors) 


1.8k 




2.5k 


3.2k 


1.8k 


2.5k 


3.2k 




Offset Unipolar 






0.01 


0.05 




0.01 


0.05 


% of F.S. 


Bipolar (Figure 5, R2 = 


















50i2Fixed) 






0.05 


0.15 




0.05 


0.1 


% of F.S. 


Capacitance 






20 






20 




pF 


Compliance Voltage, T|vi|(\| to T|viAX 


-1.5 






+ 10 


-1.5 




+10 


V 


ACCURACY (Error Relative to 


















Full Scale) 


















+250C 






±1/4 


±1/2 




+ 1/8 


+ 1/4 


LSB 








(0.006) 


(0.012) 




(0.003) 


(0.006) 


% of F.S. 


TmiN toTMAX 






±1/2 


+3/4 




±1/4 


+ 1/2 


LSB 








(0.012) 


(0.018) 




(0.006) 


(0.012) 


% OF F.S. 


DIFFERENTIAL NONLINEARITY 


















+250C 






. ±1/2 


±3/4 




+ 1/4 


+ 1/2 


LSB 


TmIN toTMAX 


MONOTONICITY GUARANTEED 


TEMPERATURE COEFFICIENTS 


















With Internal Reference 


















Unipolar Zero 






1 


2 




1 


2 


ppm/oC 


Bipolar Zero 






5 


10 




5 


10 


ppm/oC 


Gain (Full Scale) 






15 


40 




10 


25 


ppm/oC 


DifferentialNonlinearitv 






2 






2 




ppm/oC 


SETTLING TIME TO 1/2 LSB 


















With High.Z External Load (Note 2) 






350 


500 




350 


500 


ns 


With Ibil External Load 






150 


250 




150 


250 


ns 



© IC MASTER 1983 



2681 



SPECIFICS TIONS (Continued) 





HI-565AJ, HI-565AS 


HI-565AK,HI-565AT 




MODEL 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


FULL SCALE TRANSITION (From 
50% of Logic Input to 90% of Analog 
Input) 

Rise Time 
Fall Time 




15 
30 


30 
50 




15 
30 


30 
50 


ns 
ns 


TFMPFRATIIRF RANGE 
















Operating (HI-565AJ/K) 
(HI-565AS/T) 

Storage 

D Package (All) 
N Package (J, K) 




-55 

-65 
-25 




+75 
+ 125 

+ 150 
+ 150 




-55 

-65 
-25 




+75 
+ 125 

+150 
+ 150 


OC 
OC 

OC 


POWER REOUIREIVIENTS 
















Vec.+11-4to+16.5V DC 
VeE,-11-4 to -16.5V DC 




7.0 
-9.5 


10.5 
-14.5 




7.0 
-9.5 


10.5 
-14.5 


mA 
mA 


POWER SUPPLY GAIN SENSITIVITY 
(Note 3) 
















VCC = +11'^ to+16.5 VDC 
Vee = -11-4 to -16.5 VDC 




3 

15 


10 

25 




3 
15 


10 
25 


ppm of 
F.S./% 
ppm of 
F.S./% 


PROGRAMMABLE OUTPUT 
RANGES (See Table 1) 


to +5 
-2.5 to +2.5 
to +10 
-5 to +5 
-10to+10 


to +5 
-2.5 to +2.5 
to +10 
-5 to +5 
-10to+10 


V 
V 
V 
V 
V 


EXTERNAL ADJUSTMENTS 
















Gain Error with Fixed 50 Resistor 

for R2 (Figure 1) 
Bipolar Zero Error with Fixed 50S I 

Resistor for R3 (Figure 2) 
Gain Adjustment Range (Figure 1) 
Bipolar Zero Adjustment Range 


±0 25 
+0.15 


+0.1 

i0.05 , 


+0.25 
+0.15 


±0.25 
+0.15 


±0.1 
+0.05 


+0.25 
+0.1 


% of F.S. 

% of F.S. 
% of F.S. 
% of F.S. 


REFERENCE INPUT 
















Input Impedance 


15K 


20K 


25K 


15K 


20K 


25K 




REFERENCE OUTPUT 
















Voltage 

Current (Available for External Loads) 


9.90 
1.5 


10.00 
2.5 


10.10 


9.90 
1.5 


10.00 
2.5 


10.10 


V 

mA 


POWER DISSIPATION 




250 


375 




250 


375 


mW 



NOTES: 

1 . Guaranteed but not tested over the operating temperature range. 

2. See settling time discussion and Figure 3. 

3. The Power Supply Gain Sensitivity is tested in reference to a Vcc, VEE of i15V. 



2682 



® IC MASTER 1983 





Preliminary 



10 Bit Higli Speed Monolitliic 
Digital-to-Analog Converter 



FEATURES 



APPLICATIONS 



MONOLITHIC CONSTRUCTION 

EXTREMELY FAST SETTLING 85ns TO '^LSB TYP. 

LOW GAIN DRIFT ±5ppm/0C TYP. 

EXCELLENT LINEARITY OVER TEMPERATURE lyzLSB MAX. 

DESIGNED FOR MINIMUM GLITCHES 
MONOTONIC OVER TEMPERATURE 



CRT DISPLAY GENERATION 

HIGH SPEED A/D CONVERTERS 

VIDEO SIGNAL RECONSTRUCTION 

WAVEFORM SYNTHESIZERS 

HIGH SPEED DATA ACQUISITION 

HIGH RELIABILITY APPLICATIONS 

PRECISION INSTRUMENTS 



O 

•D 

C 

o 
o 

"e 

(D 
CO 

w 

'iZ 

CO 
X 



DESCRIPTION 



The HI-5610 Is an ultra-high speed 10 bit monolithic current out- 
put digital-to-analog converter. The fast output current settling of 
85ns to '/zLSB of its final value is achieved using dielectric isolation 
processing to reduce internal parasitics for fast rise and fall times 
during switching. Output glitches are minimized in the HI-5610 by 
incorporating equally weighted current sources switched into an 
R-2R ladder network for symmetrical turn-on and turn-off switch- 
ing times. This creates within the chip a very uniform and constant 
thermal distribution for excellent linearity and also eliminates ther- 
mal transients during switching. High stability thin film resistor 
processing, together with laser trimming provide the HI-5610 with 
true 10 bit linearity to within ± y2LSB maximum over operating 
temperature range. The Hl-5610's low offset and gain drift over 
the operating temperature range assures that its absolute accuracy 
when referred to a fixed 10V reference will not deviate more than 
i 1 LSB for both unipolar and bipolar operation. 



The HI-5610 is recommended as a replacement for high cost hybrid 
and modular units for increased reliability and accuracy in applica- 
tions such as CRT Displays, precision instruments and data acquisi- 
tion system requiring through-put rates as high as 12mHz for full 
range transitions. Its small size makes it an ideal choice as the 
essential part of high speed A/D converter designs or as a building 
block in high speed or high resolution industrial process control 
systems. The HI-5610 is also ideally suited for aircraft and space 
instrumentation where operation over a wide temperature range is 
required. 

> 

The H 1-5610-5 is specified for operation over QOC to +750C, the 
HI-5610-2 and HI-5610-8 over -550C to +1250C. Processing to 
MIL-STD-883A class B screening is available by selecting the 
HI-5610-8. All are available in a hermetically sealed 24 lead dual- 
in-line package. 



PINOUT 



FUNCTIONAL DIAGRAM 




TOP VIEW 

Vps+ 
CMOS/TTL 
LOGIC SELECT 
* Vref (LO IN) 
NC 

Vref (HI IN) 
. Vps- 
BIPOLAR R IN 
BIPOLAR R GUT 
IDACOUT 
SPAN R 
SPAN R 
* GNO 



1 — 

2 — 
3 

4 — 

5 — 
6- 
7 — 
8- 
9- 

10- 
11- 
12- 



Section 11 for Packaging 





24 


BIT 1 (MSB) IN 




23 


BIT 2 IN 




22 


BIT3 IN 




21 


BIT4 IN 




20 


BITS IN 




19 


BITS IN 




18 


BIT 7 IN 




17 


BITS IN 




16 


BIT9 IN 




15 


BIT 10IN 




14 


NC 




13 


COMP. CAP ♦* 



Pin 3 connected to bottom case for high 
frequency shielding. 

For high speed operation, connect 0.01 /JF 
between Pin 13 and GND. Otherwise, 
leave Pin 1 3 open. 



LOGIC 

LEVEL BIT 1 IN 
GND V+ SELECT (MSB) 2 

(12) (?)(?) ^ 



© IC MASTER 1983 



2683 



SPECIFICATIONS 



33 



ABSOLUTE MAXIMUM RATINGS (Referred to Ground)1 



Power Supply Inputs 


vps+ 


1 on\/ 
+ZUV 


Power Dissipation Pd, Package 


1 nnnm\A/ 
1 uuumvv 




Vps- 


9n\/ 






Reference Inputs 


VREF (Hi) 


±Vps 


Operating Temperature Range 




VREF(Lo) 


OV 


HI-5610-2 


-550Cto+1250C 








HI-5610-5 


QOCto +750C 


Digital Inputs 


Bits 1-12 


-1V,+12V 


HI-5610-8 


-550c to +I250C 




CMOS/TTL Logic Select 


-1V,+12V 


Storage Temperature Range 


-65OCto+150oC 




Outputs 


Pins 7, 8, 10, 11 


±Vps 








Pin 9 


+Vps, -5V 







ELECTRICAL CHARACTERISTICS 



(@+250C,Vps+, = +5V, Vps-^ 
unless otherwise noted) 



■15V, Vref = +10V, pin 2 ground 







HI-5610-2 
HI-5610-8 


HI-5610-5 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


INPUT CHARACTERISTICS 


Digital Inputs (2) 

TTL Logic Input Voltage (3) 
Logic "1" 
Logic "0" 
Input Current 
Logic "1" 
Logic "0" 


Full 
Full 

Full 
Full 


2.0 


20 
-50 


0.8 

100 
-100 


2.0 


20 
-50 


0.8 

100 
-100 


V 
V 

nA 
pA 


CMOS Logic Input Voltage (4) 
Logic "1" 
Logic "0" 
Input Current 
Logic "1" 
Logic "0" 


Full 
Full 

Full 
Full 


0.7Vps+ 


20 
-50 


0.3Vps+ 

100 
-100 


0.7Vps+ 


20 
-50 


0.3Vps+ 

100 
-100 


V 
V 

nA 
pA 


Reference Inout 
Input Resistance 

Input Voltage (Iqut = 5mA + 20%) 






8K 
+10 






8K 
+10 




V 


TRANSFER CHARACTERISTICS 


Resolution 


Full 






10 






10 


Bits 


Nonlinearity (5) 


250C 














LSB 


Differential Nonlinearity (5) 


250C 






±V2 






±V2 


LSB 


Relative Accuracy (6) 
Gain Error 

(Input Code 11. ...1) 
Unipolar Offset Error 

(Input Code 00. ...0) 
Bipolar Offset Error 

(Input Code 00.... 0) 

(Adjustable to zero, see Figure 


4,5) 




±0.05 
±0.05 
+ 0.05 






+ 0.05 
+ 0.05 
±0.05 




(9) 
% FSR 

% FSR 

% FSR 


Adjustment Range 
Gain 

Bipolar Offset 






+ 0.25 
±0.25 






+ 0.25 
+ 0.25 




% FSR 
% FSR 


Temperature Stability 
Gain Drift 

Unipolar Offset Drift 
Bipolar Offset Drift 
Differential Nonlinearity 


Full 
Full 
Full 
Full 




±5 
+ 3 
±3 
+ 2 






+ 5 
+ 3 
+ 3 
+ 2 




ppm/oc 
ppm/oC 
ppm/oc 
ppm/oC 


MONOTONICITY - GUARANTEED OVER FULL OPERATING TEMPERATURE RANGE 


Settling Time to l^LSB (5) 

From all O's to all I's 
From all I's to all O's 












85 
85 




ns 
ns 


Major Carry Switching to 90% Complete 






40 






40 




ns 



2684 



© IC MASTER 1983 



SPECIFICATIONS (continued) 



PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Power Supply Sensitivity (5) 

Vps+ = +5V, Vps- = -13.5V to -16.5V 
Gain 

(Input Code 11. ...1) 
Unipolar Offset 

(Input Code 00....0) 
Bipolar Offset 

(Input Code 00.. ..0) 






+ 0.5 
±1.5 


±2 




±0.5 
±1.5 


+ 2 


ppm of 
FSR/%Vps 


Vps- = -15V, Vps+ = 4.5V to 5.5V 
Gain 

(Input Code 11.... 1) 
Unipolar Offset 

(Input Code 00....0) 
Bipolar Offset 

(Input Code 00....0) 






±0.5 
±1.5 


±1 




±0.5 
±1.5 


±1 


OUTPUT CHARACTERISTICS 


Output Current 
Unipolar 
Bipolar 






-5.0 
±2.5 






-5.0 
±2.5 




mA 
mA 


Output Resistance 






200 






200 






Output Capacitance 






20 






20 




pF 


Output Voltage Range (7) 
Unipolar 

Bipolar 






+5 
+2.5 
±2.5 
±1.25 






+5 
+2.5 
±2.5 
±1.25 




V 
V 
V 
V 


Output Compliance Limit (5) 




-3 




+ 10 


-3 




+ 10 


V 


Output Compliance Voltage (5) 


Full 




±1.5 






±1.5 




V 


Output Noise Voltage (8) 
0.1Hz to 100Hz 
0.1Hz to 1MHz 






10 
100 






10 
100 




jUVp-p 
JUVp-p 


POWER REQUIREMENTS 


Vps+ (4) 


Full 


4.5 


5 


16.5 


4.75 


5 


16.5 


V 


Vps- 


Full 


-13.5 


-15 , 


-16.5 


-13.5 


-15 


-16.5 


V 


lps+ (All 1'sorallO'sin 

(10) either TTL or CMOS Mode) 


250C 
Full 




9 

20 






9 

20 




mA 
mA 


Ips- (Same as above) 
(10) 


250C 
Full 




25 
30 






25 
30 




mA 
mA 



© IC MASTER 1983 



2685 



HI-5618A/5618B 

8 Bit High Speed 
Digital-to-Analog Converters 



FEATURES 



DESCRiPTION 



• VERY FAST SETTLING CURRENT OUTPUT 65ns 

• MINIMUM NONLINEARITY ERROR 



' HI-5618A 
HI-5618B 

• LOW POWER OPERATION 



+ 1/4 LSB MAX 
±1/2 LSB MAX 



340mWTYP 



• ON-CHIP RESISTORS FOR GAIN AND 
BIPOLAR OFFSET 

• GUARANTEED MONOTONIC OVER 
TEMPERATURE 

• CMOS, TTL, OR DTL COMPATIBLE 



APPLICATIONS 



o HIGH SPEED PROCESS CONTROL 
« CRT DISPLAY GENERATION 

• HIGH SPEED A/D CONVERSION 

• WAVEFORM SYNTHESIS 

• HIGH RELIABILITY APPLICATIONS 

• VIDEO SIGNAL RECONSTRUCTION 



The HI-5618A/B are very high speed 8 bit current output D/A converters. 
These monolithic devices are fabricated with dielectrically isolated bipolar 
processing, which reduces internal parasitic capacitance to allow fast rise and 
fall times. This achieves a typical full scale settling time of 65ns to ±1/2 LSB. 
Output glitches are minimized by incorporation of equally weighted current 
sources, switched to either an R-2R ladder network or ground for symmetrical 
turn ON and turn OFF times. High stability thin film resistors provide excel- 
lent accuracy without trimming. For example, the HI-5618A has t1/4 LSB 
maximum nonlinearity error at +250C, with ±3/8 LSB guaranteed over the full 
operating temperature range. 

The HI-5618A/B are recommended for any application requiring high speed 
and accurate conversions. They can be used in CRT displays and systems 
requiring throughput rates as high as 20MHz for full scale transitions. Other 
applications include high speed process control, defense systems, avionics, and 
space instrumentation. 

The HI-5618A-5 and HI-5618B-5 are specified for operation from QOC to 
+750C. The "-2" versions are specified from -550C to +1250C. "Dash 8" 
(-8) designates parts which have been screened per MIL-STD-883, 
Method 5004/Class B. 

Power requirements are +5V and -15V. Package is an 18 pin DIP, in plastic 
or ceramic. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 11 for Packaging 



TOP VIEW 



CMOS/TTL- C 

VrefHIGH C 
-Vps 

BIPOLAR R|N C 

lOUT C 

10 VOLT SPAN C 

20 VOLT SPAN C 

GNO C 



□ BIT 1 MSB 

□ BIT 2 

□ BIT 3 

□ BIT 4 

□ BIT 5 

□ BIT 6 

□ BIT 7 

□ BIT 8 LSB 

□ Vref low 



CMOS/TTL BIT 
GND Vps+ SELECT 1 



^(j7)(j6)y(u)^(j2)(u) SPANR 

DIGITAL INPUT LEVEL SHIFTERS ijK 
AND SWITCH DRIVERS fsPANF 



SPAN R (10V) 

Hz) 




2686 



© IC MASTER 1983 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS (Referred to Ground) (1) 



Power Supply Inputs 


Vps+ 


+20V 


Power Dissipation Pd, Package 


700mW 




Vps- 


-20V 


Operating Temperature Range 




Reference Inputs 


VREF(Hi) 


iVps 


HI-5618A/B-2 


-550C to+1250C 




vref(Lo) 


ov 


HI-5618A/B-b 


QOC to +7dOl 


Digital Inputs 


Bits 1 -8 


-IV, +12V 


HI-5618A/B-8 


-550Cto+1250C 


CMOS/TTL Logic Select 


-IV, +12V 


Storage Temperature Range 


-65oCto 150OC 


Outputs 


Pins 5,7,8 


iVps 








Pin 6 


+Vps, -2.5V 







ELECTRICAL CHARACTERISTICS ( Vps+ = +5V; Vps- = -15V; Vref = +10V; Pin 2 to GND, unless otherwise noted) 







HI-5618A/B-2 
H 1-561 8A/B-8 


HI-5618A/B-5 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


INPUT CHARACTERISTICS 


Digital Inputs (2) 

TTL Logic Input Current (3) Logic "1 " 
Logic "0" 


Full 
Full 


2.0 




0.8 


2.0 




0.8 


V 
V 


Input Current Logic "1" 
Logic "0" 


Full 
Full 




20 
-50 


100 
-100 




20 
-50 


100 
-100 


nA 
juA 


CMOS Logic Input Voltage (4) Logic "1" 
Logic "0" 


Full 
Full 


0.7Vps+ 




0.3Vps+ 


0.7Vps+ 




0.3Vps+ 


V 
V 


CMOS Logic Input Current Logic "1" 
Logic "0" 


Full 
Full 




20 
-50 


100 
-100 




20 
-50 


100 
-100 


nA 
MA 


Reference Input 
Input Resistance 

Input Voltage (IquT = 5mA ± 20%) 


+250C 
+250C 




8k 
+10 






8k 
+10 




n 

V 


TRANSFER CHARACTERISTICS 


Resolution 


Full 




8 






8 




Bits 


Nonlinearity, Integral and HI-6518A 
Differential 

HI-5618B 


250C 
Full 
250C 
Full 






±1/4 
±3/8 
±1/2 
±5/8 






±1/4 
±3/8 
±1/2 
±5/8 


LSB 
LSB 
LSB 
LSB 


Initial Accuracy (6) 
(Relative to External +10V Reference) 
Gain 

Unipolar Zero 

Bipolar Offset (Neg. Full Scale) 


250C 
250C 
250C 






±2 
±1/8 
±2 






±2 
±1/8 
±2 


LSB 
LSB 
LSB 


Temperature Stability 
Gain Drift 
Unipolar Zero Drift 
Bipolar Zero Drift 


Full 
Full 
Full 






±1/4 
±1/16 
±1/4 






±1/4 
±1/16 
±1/4 


LSB 
LSB 
LSB 


Settling Time (5) to 1/2 LSB 

High Impedance (11) (from all O's to all I's) 
or (from ail I's to all O's) 


+250C 




65 


75 




65 


75 


ns 



© IC MASTER 1983 



2687 



SPECIFICATIONS (Continued) 



OUTPUT CHARACTERISTICS 



POWER REQUIREMENTS (4) 









H 1-561 8A/B-2 














H 1-561 8A/B-8 


HI-5618A/B-5 




PARAMETER 




TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


TRANSFER CHARACTERISTICS (Continued) 


Glitch (5) - Major Carry Transition 




















Duration 




+250C 




20 






20 




ns 


AmplitudB (866 Fiy. 4) 


















m V 


Area 




+250C 




3500 






3500 




mV-ns 


Power Supply Sensitivity (5) 




















Vps+ = +5V, Vps-= -13V to -16.5V 




















Gain (Input Code 1 1 . 


. 1) 


+250C 






±5 






±5 




Unipolar Zero (Input Code 00 . 


.0) 


+250C 




+ 0.5 






±0.5 




ppm of 


Bipolar Offset (Input Code 00 . 


.0) 


+250C 




+ 1.5 






+ 1.5 




FSR/% Vps 




















(9) 


Vps- = -15V,Vps+ = 4.5V to 5.5V 




















Gain (Input Code 1 1 . 


. 1) 


+250C 






±5 






±5 




Unipolar Zero (Input Code 00 . 


.0) 


+250C 




±0.5 






±0.5 






Bipolar Offset (Input Code 00 . 


.0) 


+250C 




±1.5 






±1.5 







Output Current Unipolar 
Bipolar 


+250C 
+250C' 




-5 
±2.5 






-5 
+ 2.5 




mA 
mA 


Output Resistance 


+250C 




500 






500 






Output Capacitance 


+250C 




20 






20 




pF 


Output Voltage Range (7) Unipolar 
Bipolar 


+250C 
+250C 
+250C 
+250C 
+250C 




+10 
+5 
+ 10 
+ 5 
±2.5 






+10 
+5 
+ 10 
±5 
+ 2.5 




V 
V 
V 
V 
V 


Output Compliance Voltage (5) 


+250C 




±1.5 






±1.5 




V 


Output Noise Voltage (8) 0.1Hz to lOOHz 
0.1Hz to IMhz 


+250C 
+250C 




30 
100 






30 
100 




MVp-p 
/jVp-p 



Vps+ 


Full 


4.5 


5 


15 


4.75 


5 


15 


V 


Vps- 


Full 


-13.5 


-15 


-16.5 


-14.25 


-15 


-15.75 


V 


lps+(10) (All I's or all O's in either 
TTL or CMOS mode) (3,4) 


+250C 
Full 




9 


12 




9 


12 


mA 
mA 


Ips-(IO) (All Tsorall O's in either 
TTL or CMOS mode) (3,4) 


+250C 
Full 




19 


26 




19 


26 


mA 
mA 



1. Absolute maximum ratings are limiting values, applied indiv- 
idually, beyond which the serviceability of the circuit may be 
impaired. Functional operation under any of these conditions 
is not necessarily implied. 

2. The HI-5618 accepts digital input codes in binary format 
and may be user connected for any one of three binary codes. 
Straight binary, offset binary, or two's complement binary. 
(See operating instructions) 

3. For TTL and DTL compatibility connect +5V to pin 1 and 
ground pin 2. The \/ps+ tolerance is ± 10% for H 1-561 8A/B 
-2,-8; and ±5% for H1-5618A/B-5. 

4. For CMOS compatibility connect digital power supply 
(+4.5V ^ Vqd ^ +10V) to pin 1 and short pin 2 to pin 1. 

5. See definitions. 

6. These errors may be adjusted to zero using external potentio- 



meters R-], R2, R3. Ri and R2 each provide more than i 3 
LSB's adjustment. (See Operating Instructions). The specifi- 
cations listed under initial accuracy are based on use of an 
external op amp, internal span and offset resistors, and 1Q0f2 
±1% resistors, in place of R-j and R2. 

7. Using an external op amp with the internal span and offset 
resistors. See Operating Instructions. 

8. Specified for all "I's" or all "O's" digital input. 

9. FSR is "Full Scale Range", i.e., 20V for ± 10V range; 10V 
for i 5V range, etc. Nominal full scale output current is 5mA. 

10. After 30 seconds warm-up. 

11. See Test Circuit, Figure 3. 

12. See Test Circuit , Figure 4. 



2688 



© IC MASTER 1983 




H t~5080 

12 Bit Low Cost Monolithic 
Digital-to-Analog Converter 



FEATURES 



DESCRIPTION 



DAC80 ALTERNATE SOURCE 

MONOLITHIC CONSTRUCTION 
(SINGLE CHIP) 

FAST SETTLING 

GUARANTEED MONOTONIC 0°C to 75°C 

WAFER LASER TRIMMED 

APPLICATIONS RESISTORS ON-CHIP 

ON-BOARD REFERENCE 

DIELECTRIC ISOLATION (01) PROCESSING 

^12V POWER SUPPLY OPERATION 



APPLICATIONS 



• HIGH SPEED A/D CONVERTERS 

• PRECISION INSTRUMENTATION 

• CRT DISPLAY GENERATION 



The HI-5680 is a monolithic, direct replacement for the popular 
DAC80-CBI, DAC80Z-CBI, and DAC85C-CBI, incorporating 
the best features of each. Single chip construction, along with 
several design innovations, make the HI-5680 the optimum 
choice for low cost, high reliability applications. 

Harris' unique Dielectric Isolation (01) processing reduces inter- 
nal parasitics, resulting In fast switching times and minimum 
glitch. On-board span resistors are provided for good tracking 
over temperature, and are laser trimmed to high accuracy. These 
may be used with the on-board op-amp (voltage output models; 
HI-5680V), or with a user supplied external amplifier (HI-56801). 

Internally, the HI-5680 eliminates code dependent ground cur- 
rents by routing current from the positive supply to the internal 
ground node, as determined by an auxiliary R-2R ladder. This 
results m a cancellation of code dependent ground currents 
allowing virtually zero variation in current through the package 
common, pin 21. 

The HI-5680 is available in both current and voltage out- 
put models which are guaranteed over the 0°C to +75°C 
temperature range. All models include a buried zener reference 
featuring low temperature coefficient. In addition, the voltage 
output models include an on-board output amplifier. Both ver- 
sions operate with a +5V logic supply and a +\/s in the range of 
±(1 1.4V to 16.5V). 



O 

T3 
C 

o 
o 

"e 

(D 
CO 

CO 

'i- 
i_ 

CO 

X 



PINOUTS 



(MSB) BIT 1 


C 


1 


BIT 2 


C 


2 


BIT 3 


C 


3 


BIT 4 


C 


4 


BIT 5 


C 


5 


BIT 6 


C 


6 


BIT 7 


C 




BIT 8 


c 


8 


BIT 9 


c 


9 


BIT 10 


c 


10 


BIT n 


c 


11 


(LSB) BIT 12 


C 


12 



TOP VIEW 



12 6.3V REF OUT 

□ GAIN ADJUST 

3 COMMON 

□ r JUNCTION 

□ 20V RANGE 
3 lOV RANGE 

□ BIPOLAR OFFSET 

□ REF INPUT 

□ VoUT 

□ -vs 

□ LOGIC SUPPLY 



Copyright (c) 



HI-5680V 
VOLTAGE OUTPUT 
Harris Corporation 1982 



(MSB) 



TOP VIEW 



BIT 11 
(LSB) BIT 12 




□ 6.3V REF OUT 

□ GAIN ADJUST 

□ +Vs 

□ COMMON 

□ SCALING NETWORK 
n SCALING NETWORK 

3 scaling network 

□ bipolar offset 

□ ref input 

□ 'out 

□ -Vs 

□ LOGIC SUPPLY 



HI-56801 
CURRENT OUTPUT 



© IC MASTER 1983 



2689 



FUNCTIONAL DIAGRAM VOLTAGE OUTPUT 



17 16 24 21 
BIPOLAR REF 

OFFSET IN OUT COMMON 

QQQ 



BIT 1 IN 
• Vs Vl IMSBI 



GROUND 
CURRENT 
CANCELLATION 
CIRCUIT 



9 10 11 



BIT 12 IN 

ILSBI 

12 



OOOQOO999OQ 
j I I 1 1 t i « I t i t i t_ 

1 DIGITAL INPUT LEVEL'SHIFTERS 8, SWITCH DRIVERS 

. Lt 1 \ \ 1 \ -I 1 ' 1 1 r- 



12 6KJ — n \ P 

j-p^ j I I 1 j I . 

control" I M 1 J iJlU i j ijlU 

< < s s s s 

i''2'<: TiPleso J 

^ |" "^~^ '^"^ '^"^ '^"^ ' '^^^ '^"^ '^"^ ■'^'^ : I6K |ii 



i.l 



1K I IK ! 1K 



T SPAN R 



IK I ; IK 1K 



-o 



1 " I ! ; ^ " ' r— I 



SPAN Z 



15 
VOUT 



I 16K : 16K I 1 



O " 

vs 



HI-5680V 



FUNCTIONAL DIAGRAM CURRENT OUTPUT 



17 16 24 21 
BIPOLAR REF 

OFFSET IN OUT COMMON 

Q QOO 



22 13 1 

BIT 1 IN 
• Vs Vl IMSBI 

o 



BIT 12 IN 

, (LSBI 



SCALING 
NETWORK 



C) SCALING 
I "' ^ NETWORK 




HI-56801 



2690 



© IC MASTER 1983 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS (1) 

Power Supply Inputs +\/s +20V 

-Vs -20V 

+VLOGIC +20V 



Reference 



Digital Inputs 



Input (pin 16) +Vs 
Output drain 2.5mA 

Bits 1 to 12 -1Vto+12V 



ma 



Power Dissipation Pd, Package 

Operating Temperature Range 



HI-5680I/V-5 



Storage Temperature Range 



lOOOmW 

OoCto +75°C 
-65°Cto+150°C 



ELECTRICAL SPECIFICATIONS 

:0 



(Ta = +25"C, Vs =±15V, Vlogic = +5V, PIN 16 CONNECTED TO PIN 24 UNLESS OTHERWISE SPECIFIED.) 







HI-5680X 




PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


DIGITAL INPUT (3) 












Resolution 
Logic Levdis 
Logic "1" 
Logic "0" 


TTL Compatible 
at+1 /jA 
at -100 /jA 


+2 

n 

u 




12 

+5.5 
+0.8 


Bits 

Volts 
Volts 


ACCURACY (3) 


0° to +75°C 










Linearity Error 
Differential Lin. Error 
Gain Error (2) 
Offset Error (2) 
Monotonicity 






+% 

+72 

+0.1 
.+.05 
GUARANTEED 


+72 

+% 

+0.3 

±0.15 


1 CD 

Lob 
LSB 
%FSR 
%FSR 


DRIFT (3) 

Total Bipolar Drift 

(Includes gain, offset 

and linearity drifts.) 
Total Error 

Unipolar 

Bipolar 

Gain 

Unipolar Offset 
Bipolar Offset 


0°Cto +75°C 

QOCto +75°C 

Including internal 

reference 
Exclusive of internal 

reference 


+1 

+5 


+.08 
+.06 

+15 

+5 

+3" 

+10 


+20 

+0.15 
+.01 

+30 

+7 


PPM/OC 

%FSR 
%FSR 

PPM/°C 

PPM/°C 
PPM/OC 
PPM/OC 


CONVERSION SPEED (3) 












Voltage Models 
Settling time (3) 

With lOKfi Feedback 
With 5Kn Feedback 
For 1 LSB change 
Slew Rate 


to +0.01% of FSR for 
FSR Change 


10 


3 

1.5 
1.5 
15 




US 
US 

/JS 

V/ps 


Current Models 
Settling time (3) 

10 to 100^2 load 
1Ki7 load 


to +0.01% of FSR for 
FSR Change 




300 
1000 




ns 
ns 


ANALOG OUTPUT 












Voltage Models 
Output current 
Output Resistance 
Short Circuit Duration 


to common 


+5 


.05 

continuous , 




mA 



© IC MASTER 1983 



SPECIFICATIONS (continued) 



33 







HI-5680X 




PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


ANALOG OUTPUT 
Current Models 
Output Current 
Unipolar 
Bipolar 
Output Impedance 
Unipolar 
Bipolar 
Compliance (3) 






-2 
+1 

15 
4.4 


+2.5 


mA 
mA 

V 


INTERNAL REFERENCE 
Output Voltage 
Output Impedance 
External Current 
Tempco of Drift 




-H6.174 


+6.3 
1.5 

20 


+6.426 
+2.5 


V 
^2 
mA 

PPM/0 C 


POWER SUPPLY 
SENSITIVITY (3) 
+15V supply 
-15V supply 
+5V supply 






.002 
.002 
.002 




%FSR 
AVs 


POWER SUPPLY 
REQUIREMENTS (5) 
Range 

+15V 

-15V 

+5V 




+11.4 
-11.4 
+ 4.5 


+15 
-15 

+ 5 


J-16.5 
-16.5 
+16.5 


V 

v 

V 


Current 
+15V 
-15V 
+5V 






8 
-12 
4.5 


16 
-24 
9 


mA 
mA 
mA 



NOTES: 

1. Absolute maximum ratings are limiting values, applied 
individually, beyond which the serviceability of the circuit 
may be impaired. Functional operation under any of these 
conditions is not necessarily implied. 

2. Adjustable to zero using external potentiometers. 

3. See definitions. 



4. FSR is "full scale range" and is 20V for+lOV range, 10V 
for +5V range, etc., or 2mA (+20%) for current output. 



5. The H 1-5680 will operate with supply voltages as low as 
±11.4V. It is recommended that output voltage range -10V 
to +10V not be used if the supply voltages are less than 
±12.5V. 



2692 



© IC MASTER 1983 



DEFINITIONS OF SPECIFICATIONS 



DIGITAL INPUTS 

The HI-5680 accepts digital input codes in complementary 
binary, complementary offset binary, and complementary 
two's complement binary . 



DIGITAL 
INPUT 


ANALOG OUTPUT 


Complimentary 
Binary 


Complimentary 
Offset 
Binary 


Complementary 

Two's 
Complement* 


MSB LSB 
000...000 
100...000 
111...111 
011...111 


+ Full Scale 
Mid Scale-ILSB 

Zero 
+y2 Full Scale 


+ Full Scale . 

-1 LSB 
- Full Scale 
Zero 


-LSB 
+ Full Scale 

Zero 
- Full Scale 


*lnvert MSB with external inverter to obtain 
CTC Coding 



SETTLING TIME 

Settling time is the time required for the output to settle to 
within the specified error band for any input code transition. 
It is usually specified for a full scale or major carry transition. 

DRIFT 

GAIN DRIFT - The change in full scale analog output over the 
specified temperature range expressed in parts per million of 
full scale per °C (ppm of FSR/°C). Gain error is measured with 
respect to +25°C at high (Th) and low (Tl) temperatures. 
Gain drift is calculated for both high (Th-25°C) and low 
ranges (+25°C-Tl) by dividing the gain error by the respective 
change in temperature. The specification is the larger of the 
two representing worst case drift. 

OFFSET DRIFT - The change in analog output with all bits 
OFF over the specified temperature rarige expressed in parts 
per million of full scale range per °C (ppm of FSR/°C). Offset 
error is measured with respect to+25°C at high (Th) and low 
(Tl) temperatures. Offset Drift is calculated for both high 
(Th -25°C) and low (+25°C -Tl) ranges by dividing the 
offset error by the respective change in temperature. The 
specification given is the larger of the two, representing worst- 
case drift. 



ACCURACY 

NONLINEARITY - Nonlinearity of a D/A converter is an 
important measure of its accuracy, it describes the deviation 
an ideal straight line drawn between zero (all bits OFF) and full 
scale (all bits ON). 



DIFFERENTIAL NONLINEARITY - For a D/A converter, it 
is the difference between the actual output voltage change and 
the ideal (1 LSB) voltage change for a one bit change in code. 
A Differential Nonlinearity of +1 LSB or less guarantees mono- 
tonicity; i.e., the output always increases and never decreases 
for an increasing input. 



POWER SUPPLY SENSITIVITY 

Power Supply Sensitivity is a measure of the change in gain and 
offset of the D/A converter resulting from a change in -15V, 
or +15V supplies. It is specified under DC conditions and 
expressed as parts per million of full scale range per percent of 
change in power supply (ppm of FSR/%). 



COMPLIANCE 

Compliance voltage is the maximum output voltage range that 
can be tolerated and still maintain its specified accuracy. Com- 
pliance limit implies functional operation only and makes no 
claims to accuracy. 



GLITCH 



A glitch on the output of a D/A converter is a transient spike 
resulting from inequal internal ON-OFF switching times. Worst 
case glitches usually occur at half-scale or the major carry code 
transition from 011...1 to 100.. .0 or vice versa. For example, 
if turn ON is greater than turn OFF for 011...1 to 100.. .0, an 
intermediate state of 000...0 exists, such that, the output 
momentarily glitches toward zero output. Matched switching 
times and fast switching will reduce glitches considerably. 
(Measured as one half the product of duration and amplitude.) 



© IC MASTER 1983 



2693 



OPERATING INSTRUCTIONS 



DECOUPLtlMG AND GROUNDING 

For best accuracy and high frequency performance, the ground- 
ing and decoupling scheme shown in Figure 1 should be used. 
Decoupling capacitors should be connected close to the Hl- 
5680 (preferrably to the device pins) and should be tantalum 
or electrolytic bypassed with ceramic types for best high fre- 
quency noise rejection. 




CURRENT OUTPUT 
MODELS ONLY 



FIGURE 1 



REFERENCE SUPPLY 



V 

ANALOG GROUNO 



An internal 6.3Volt reference is provided on board all HI-5680 
models. This voltage (pin 24) is accurate to +2% and must be 
connected to the reference input (pin 1 6) for specified operation. 
This reference may be used externally, provided current drain 
is limited to 2.5mA. An external buffer amplifier is recommend- 
ed if this reference is to be used to drive other system compon- 
ents. Otherwise, variations in the load driven by the reference 
will result in gain variations of the HI-5680. All gain adjustments 
should be made under constant load conditions. 
VOLTAGE OUTPUT HI-5680V 

RANGE CONNECTIONS 





Range 


Connect 






PIN 


PIN 


PIN 






15 


17 


19 


Unipolar 


to -1-5V 


18 


21 


20 




Oto -HOV 


18 


21 


N.C. 


Bipolar 


+ 2.5V 


18 


20 


20 




+5V 


18 


20 


N.C, 




+10V 


19 


20 


15 



GAIN AND OFFSET CALIBRATION 




UNIPOLAR CALIBRATION 


Step 1: 


Offset 




Turn oil Kite fl C C /11 ^\ 

1 urn an oits urr \m...i/ 




AHiiiQt Ro fnr 7Prn unite nut 


Step 2: 


Gain 




Turn all bits ON (00...0) 




Adjust Ri for FS-1LSB 




That Is: 




4.9987 for Oto +5V range 




9.9976 for to +10V range 


BIPOLAR CALIBRATION* 


Step 1: 


Offset 




Turnall bits OFF (11...1) 




Adjust R2 for Negative FS 




That Is: 




-10V for±10V range 




-5\/ for±5\/ range 




-2. 5\/ for ±2.5 range 


Step 2: 


Gain 




Turn all bits ON (00...0) 




Adjust Ri for positive FS-1 LSB 




That Is: 




+9.995V for±10V range 




+4.9976\/ for±5V range 




H-2.4988V for±2.5V range 



'Because the DAC transfer junction is theoretically a straight 
line, this allows only two degrees of freedom for adjustment. 
For optimum adjustment choose the end points for exact loca- 
tion. (Full scale negative and Full scale positive minus 1 LSB) 
this leaves an error at zero (half scale) which is no greater than 
the maximum integral nonlinearity of the device. 
CURRENT OUTPUT HI-56801 




CONNECTING AN EXTERNAL AMPLIFIER 

To use the m-56801 with an external amplifier connect as follows: 



Range 


Pin 17 


Pin 18 


Pin 19 


Pin 20 




to 


to 


to 


to 


Oto -HOV 


21 


B 


18* 


19* 


to +5V 


21 


B 


15 


N.C. 


+10V 


15 


N.C. 


B 


N.C. 


±5V 


15 


B 


18* 


19* 


+2.5V 


15 


B 


15 


N.C. 



After connecting as shown above, follow gain and offset calibra- 
tion procedures as outlined under the HI-5680V Voltage output 
section. 

• these connections help reduce stray capacitance in the feedback loop. 

t Rg should be chosen to equal the output impedance of the DAC. This may 

be calculated by Rj, = RLADDER<2'<n)//RpEEDBACK. 



2694 



© IC MASTER 1983 



PACKAGE DIMENSIONS 



CHIP PHOTO 




-Ik. 



HI-5680X 

BIT 1 MSB 6.3V REF OUT GAIN ADJUST 



BIT 2 BIT 1 MSB 6.3V REF OUT ( 
BIT 3 — li^^^ 



LASER y 
BEAM 

ALIGNMENT ^ 
BIT 6- — 
BIT? 



BITS 
BIT9- 



BIT 10- 
BIT 11 

BIT12'lSB ^LOGIC V+ 




V+ 

GND (COMMON) 

£ JUNCTION 
(VOLTAGE OUTPUT -V) 
SCALING NETWORK 
(CURRENT OUTPUT -I) 
20V RANGE 

(VOLTAGE OUTPUT -V) 

SCALING NETWORK 
(CURRENT OUTPUT -I) 

10V RANGE 

(VOLTAGE OUTPUT -V) 

SCALING NETWORK 
(CURRENT OUTPUT -I) 




VOUT 



ORDERING INFORMATION 



MODEL 


INPUT CODE 
CODE 


OUTPUT 
MODE 


HI-5680V-5 
HI-56801-5 


Complementary Binary 
Complementary Binary 


Voltage 
Current 



© IC MASTER 1983 



2695 



HI-5685 



High Performance Monolithic 
12 Bit Digital-tO'Analog Converter 



FEATURES 



DESCRIPTION 



o 

T3 
C 

o 
o 

E 

(D 
CO 
(0 



CO 

X 



DAC 85 ALTERNATE SOURCE 

MONOLITHIC CONSTRUCTION 
(SINGLE CHIP) 
FAST SETTLING 

GUARANTEED MONOTONIC -25°C TO +85°C 

WAFER LASER TRIMMED 

APPLICATIONS RESISTORS ON-CHIP 

ON-BOARD REFERENCE 

DIELECTRIC ISOLATION (Dl) PROCESSING 

tl2V POWER SUPPLY OPERATION 



APPLICATIONS 



• HIGH SPEED A/D CONVERTERS 

• PRECISION INSTRUMENTATION 

• CRT DISPLAY GENERATION 



The HI-5685 is a monolithic direct replacement for the popular 
DAC85-CBI and the ADDAC85LD-CBI. Single chip construction 
along with several design innovations make the HI-5685 the 
optimum choice for low cost, high reliability applications. 

Harris' unique Dielectric Isolation (01) processing reduces inter- 
nal parasitics resulting in fast switching times and minimum 
glitch. On board span resistors are provided for good tracking 
over temperature, and are laser trimmed to high accuracy. These 
may be used with the on-board op-amp (voltage output models; 
HI-5685V),or with a user supplied external amplifier (HI-56851). 

Internally, the HI-5685 eliminates code dependent ground cur- 
rents by routing current from the positive supply to the internal 
ground node, as determined by an auxiliary R-2R ladder. This 
results in a cancellation of code dependent ground currents 
allowing virtually zero variation in current through the package 
common, pin 21. 

The HI-5685 and HI-5685A are available in both current and volt- 
age output models which are guaranteed over the -25°C to +85°C 
temperature range. All models include a buried zener reference 
featuring low temperature coefficient. In addition, the voltage 
output models include an on-board output amplifier. Both ver- 
sions operate with a +5V logic supply and a +Vs in the range of 
±(1 1.4 V to 16.5V). 

The HI-5685A offers exceptionally low drift over temperature. 
Gain drift is a maximum ±10ppm/°C, over -25°C to +85°C. 



PINOUTS 



TOP VIEW 




6.3V REF OUT 
GAIN ADJUST 
+Vs 

COMMON 
X JUNCTION 
20V RANGE 
10V RANGE 
BIPOLAR OFFSET 
REF INPUT 

VOUT 
-Vs 

LOGIC SUPPLY 



Copyright (c) 



HI-5685V 
VOLTAGE OUTPUT 
Harris Corporation 1982 



(MSB) 



BIT 1 
BIT 2 
BIT 3 
BIT 4 
BIT 5 
BIT 6 
BIT 7 
BIT 8 
BIT 9 
BIT 10 C 
BIT 11 C 
LSB) BIT 12 C 



C 
C 
C 
C 

c 
c 
c 
c 
c 



1 

2 
3 
4 
5 
6 
7 
8 
9 

10 
11 
12 



TOP VIEW 

--yu — 



24 □ 6.3V REF OUT 

23 □ GAIN ADJUST 

22 D+Vs 

21 □ COMMON 

20 □ SCALING NETWORK 

19 □ SCALING NETWORK 

18 13 SCALING NETWORK 

17 □ BIPOLAR OFFSET 

16 □ REF INPUT 

ISDIOUT 
14 □ -Vs 

13 □ LOGIC SUPPLY 



HI-56851 
CURRENT OUTPUT 



2696 



© IC MASTER 1983 



FUNCTIONAL DIAGRAM VOLTAGE OUTPUT 



17 16 24 21 
BIPOLAR REF 

OFFSET IN OUT COMMON 

QQO 




HI-5685V 
H I -5685 A V 



FUNCTIONAL DIAGRAM CURRENT OUTPUT 



17 16 24 21 
BIPOLAR REF 

OFFSET IN OUT COMMON 

Q QQO 



22 13 1 

BIT 1 IN 
♦ Vs ^L IMSBI 



8 9 10 11 



BIT 12 IN 

ILSBI 



o 



n ?????????■??; 



SCALING 
NETWORK 



SCALING 
NETWORK 




HI -5685 1 
HI-5685AI 



© IC MASTER 1983 



2697 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS (1 

Power Supply Inputs 



Reference 
Digital Inputs 



+Vs +20V 
-Vs -20V 
+VLOGIC +20 V 
Input (pin 16) +Vs 
Output drain 2.5mA 
Bits 1 to 12 -IVto+12V 



Power Dissipation 

Pd, Package 
Operating Temperature Range 



HI-5685I/V-4 
HI-5685AI/V-4 



Storage Temperature Range 



lOOOmW 

-250c to +85OC 
-25°C to +85°C 

-65° to+150°C 



ELECTRICAL SPECIFICATIONS 

(T;^=+25°C, Vs = ±15V, VloGIC = 5V, PIN 16 CONNECTED TO PIN 24 UNLESS OTHERWISE SPECIFIED) 



PARAMETER 


CONDITIONS 


HI-5685 






MIN 


TYP 


MAX 


UNITS 


DIGITAL INPUT (3) 












Resolution 
Logic Levels 
Logic "1" 
Logic "0" 


TTL Compatible 
at+1 /iA 
at -100 uA 


+2 





12 

+5.5 
+0.8 


Bits 

V 
V 


Accuracy (3) 
Linearity Error 


at+25°C 

-25OC to m°c 






±V2 


LSB 
LSB 


Differential Lin. Error 
Gain Error (2) 
Offset Error (2) 
Monotonicity 






±0.1 
±0.05 

Oil A nAMTfTcn 

GUARANTEED 




LSB 

%FSR (4) 
%FSR 


DRIFT (3) HI-5685 
Gain 
Offset 

Unipolar 

Bipolar 


-250c to +85OC 




+1 


+20 
+10 


PPM/OC 


DRIFT (3) HI-5685A 
(Low Drift) 

Gain 

Offset 
Unipolar 
Bipolar 


-250c to +85OC 




+1 


+10 
±5 


PPM/OC 


CONVERSION SPEED 
Voltage Models 
Settling Time (3) 


to ±0.01% of FSR for 
FSR Change 










With 10Kr2Feedback 
With 5KnFeedback 
For 1 LSB Change 
Slew Rate 






3 

1.5 
1.5 
15 




n% 


Current Models 
Settling Time (3) 


to ±0.01% of FSR for 
FSR Change 










lOto lOO^Ioad 
1K^2load 






300 
1.0 




ns 
us 



2698 



© 10 MASTER 1983 



SPECIFICATIONS (continued) 



PARAMFTPR 


rnwniTinM^j 

XjXJlMUl 1 1 U 1«0 


HI-5685 






MIN 


TYP 


MAX 


UNITS 


ANALOG OUTPUT 












Voltage Models 












Output Current 




+5 






mA 


Output Impedance (DC) 






0.05 






Current Models 












Output Current 


Full Scale 










Unipolar 






-2 




mA 


Bipolar 










m A 


Output Resistance 












Unipolar 






1 
6.L 






Bipolar 






6.65 






Compliance (3) 




-2.5 




+10 


V 


INTERNAL REFERENCE 












Output voltage 




+6.174 


+6.3 


+6.426 


V 


Output Impedance 










o 


External Current 








+2.5 


mA 


Tempco of Drift 


< 




+10 


+20 


PPM/OC 


POWER SIIPPI Y ^iENSITIVITY ("W 












+15V 






.002 




%FSR 












/IVs 


-15 V 






.002 






+5V 






.002 






POWER SUPPLY REQUIREMENTS(5) 












Range 












+15V 




+11.4 


+15 


+16.5 


V 


-15 V 




-11.4 


-15 


-16.5 


V 


+5V 




+4.5 


+5 


+16.5 


V 


Current 












+15V 






8 


16 


mA 


-15 V 






-12 


-24 


mA 


+5V 






4.5 


9 


mA 



NOTES: 



1. Absolute maximum ratings are limiting values, applied 
individually, beyond which the serviceability of the circuit 
may be impaired. Functional operation under any of these 
conditions is not necessarily implied. 

2. Adjustable to zero using external potentiometers. 

3. See Definitions. 



4. FSR is "full scale range" and is 20V for+lOV range, 10V 
for +5V range, etc., or 2mA (+20%) for current output. 



5. The HI-5685 will operate with supply voltages as low as 
+11.4V. It is recommended that output voltage range -10V 
to +10V not be used if the supply voltages are less than 
±12.5V. 



© IC MASTER 1983 



2699 




HI-5687 

Wide Temperature Range 
Monolithic 12 Bit 
Digital'to-Analog Converter 



FEATURES 



DESCRIPTION 



o 

ZD 
■D 
C 

o 
o 

E 

<D 
CO 

CO 



CO 

X 



DAC87 ALTERNATE SOURCE 

MONOLITHIC CONSTRUCTION 
(SINGLE CHIP) 

FAST SETTLING 

GUARANTEED SPECIFICATIONS -55°C to 125°C 

WAFER LASER TRIMMED 

APPLICATIONS RESISTORS ON-CHIP 

ON-BOARD REFERENCE 

DIELECTRIC ISOLATION (Dl) PROCESSING 

il2V POWER SUPPLY OPERATION 

MIL STD 883 PROCESSING AVAILABLE 



APPLICATIONS 



HIGH SPEED A/D CONVERTERS 
PRECISION INSTRUMENTATION 
CRT DISPLAY GENERATION 



The HI-5687 is a monolithic direct replacement for the popular 
DAC87-CBI wide temperature range d-to-a converter. Single 
chip construction, along with several design innovations make 
the HI-5687 the optimum choice for low cost, high reliability 
applications. 

Harris' unique Dielectric Isolation (Dl) processing reduces inter- 
nal parasitics resulting in fast switching times and minimum 
glitch. On board span resistors are provided for good tracking 
over temperature, and are laser trimmed to high accuracy. These 
may be used with the on-board op-amp (voltage output models; 
HI-5687V), or with a user supplied external amplifier (HI-56871). 

Internally, the HI-5687 eliminates code dependent ground cur- 
rents by routing current from the positive supply to the interna! 
ground mode, as determined by an auxiliary R-2R ladder. This 
results in a cancellation of code dependent ground currents 
allowing virtually zero variation in current through the package 
common, pin 21. 

The HI-5687 is available in both current and voltage out- 
put models which are 100% tested over the -55°C to +125°C 
temperature range. All models include a buried zener reference 
featuring low temperature coefficient. In addition, the voltage 
output models include an on-board output amplifier. Both ver- 
sions operate with a +5V logic supply and a +Vs in the range of 
±(11.4V to 16.5V). 

Processing to MIL-STD-883A CLASS B is available. 
See Ordering Information. 



PINOUTS 



TOP VIEW 




6.3V REF OUT 
GAIN ADJUST 
+Vs 

COMMON 
r JUNCTION 
20V RANGE 
10V RANGE 
BIPOLAR OFFSET 
REF INPUT 

VOUT 
-Vs 

LOGIC SUPPLY 



HI-5687V 
VOLTAGE OUTPUT 
Copyright (c) Harris Corporation 1982 



(MSB) 



TOP VIEW 




24 □ 6.3V REF OUT 
23 □ GAIN ADJUST 
22 □ +Vs 
21 □ COMMON 
20 □ SCALING NETWORK 
19 □ SCALING NETWORK 
18 3 SCALING NETWORK 
17 □ BIPOLAR OFFSET 
16 □ REF INPUT 
'15 □ loUT 
14 □ -Vs 

13 tl LOGIC SUPPLY 



HI-56871 



CURRENT OUTPUT 



2700 



© IC MASTER 1983 



FUNCTIONAL DIAGRAM VOLTAGE OUTPUT 



17 16 24 21 
BIPOLAR REF 
OFFSET IN OUT COMMON 



Q QQQ 




22 13 

BIT 1 IN 
tVs Vl imsbi 

Q 



GROUND 
CURRENT 
CANCELLATION 
CIRCUIT 



BIT 12 IN 

ILSBI 

12 



5 6 7 8 9 10 11 



DIGITAL INPUT LEVEL SHIFTERS 8. SWITCH DRIVERS 

1 r— 



..ITTTT 

3 i li 



6 

■vs 



— o 

^ SPAN R 
19 

5K SPAN R 
5K 

20 



-o 



SPAN £ 



15 
VOUT 



HI-5687V 



FUNCTIONAL DIAGRAM CURRENT OUTPUT 




© IC MASTER 1983 



2701 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS 



(1) 



Power Supply Inputs 



Reference 



Digital Inputs 



+Vs +20 V 

-Vs -20V 
+VLOGIC +20V 

Input (pin 16) ±Vs 
Output drain 2.5mA 



Power Dissipation Pd, Package 

Operating Temperature Range 

H!-5687l/V-2 
HI-5687I/V-8 

Storage Temperature Range 



lOOOmW 



-55°Cto +125°C 
-550Cto+1250C 

-65°Cto+150°C 



Bits 1 to 12 -1Vto+12V 
ELECTRICAL SPECIFICATIONS 

(Ta=+250C. Vs=±15V, VloGIC = PIN 16 CONNECTED TO PIN 24 UNLESS OTHERWISE SPECIFIED. 







HI-5687 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


DIGITALINPUTO) 












Resolution 
Logic Levels 
Logic "1" 
Logic "0" 


TTL Compatible 

at+1^A 

at-100^A 


+2 





12 

+5.5 
+0.8 


Bits 

V 
V 


ACCURACY (3) 












Linearity Error 


At +25°C 
-550Cto+1250C 




±% 


±% 

t/4 


LSB 
LSB 


Differential Lin. Error 

bam error U) 
Offset Error (2) 
Monotonicity 


at +25^0 
-550Cto+1250C 
— 5o"C to +lZo"L 
-550c to +1 250c 




±'/2 

+u. 1 
±0.05 
GUARANTEED 


±% 
±1 

±u.z 
+0.1 


LSB 
LSB (4) 

0/ cc D 

7oron 
%FSR 


DRIFT (3) 

Total Bipolar Drift 
(includes gain, offset 
offset and linearity drifts) 


-550Cto+1250C 




+15 


±30 


PPM/OC 


Total Error 
Unipolar 
Bipolar 






±0.13 
+0.12 


+0.3 
±0.24 


%FSR 
%FSR 


Gain 

including internal 
reference 






+10 


±25 


PPM/OC 


excluding internal 
reference 






±5 


±10 


PPM/OC 


Unipolar Offset 






±1 


+3 


PPM/OC 


CONVERSION SPEED 












Voltage Models 
Settling Time (3) 


to +0.01% of FSRfor 
FSR Change 










With lOKn Feedback 
With 5K12 Feedback 
For 1 LSB Change 
Slew Rate 






3 

1.5 
1.5 
15 




//s 

MS 
ps 

VZ/us 


Current Models 
Settling Time (3) 


to ±0.01% of FSR for 
FSR Change 










10 to 10012 load 
1K12 load 






300 
1.0 




ns 
ps 



\ 

2702 



© to MASTER 1983 



SPECIFICATIONS (continued) 







HI-5687 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNITS 


ANALOG OUTPUT 












Voltage Models 












Output Current 




+0 






nA 


Output Impedance (DC) 






0.05 




n 


Current Models 












Output Current 


Full Scale 










Unipolar 






-2 




mA 


K 1 nn 1 Q r 
DipUldl 






±1 




mA 


Output Impedance 












Unipolar 




5.0 


6.6 


8.2 


Kn 


Bipolar 




2.5 




A 1 

4.1 




Compliance (3) 




-1.5 




+ 10.5 


V 


INTERNAL REFERENCE 












Output Voltage 




+6.174 


+6.3 


+6.426 


V 


Output Impedance 






1.5 




a 


External Current 








+2.5 


mA 


Tempco of Drift 






±5 


+10 


PPM/°C 


POWER SUPPLY SENSITIVITY (3) 












+15V 






±.002 


±.003 


%FSR 












4Vs 


-15 V 






+.UU/ 


X nm 




+5V 






+.002 


+.003 




POWER SUPPLY REQUIREMENTS (5) 












Range 












+15V 




+11.4 


+15 


+16.5 


V 


-15V 




-11.4 


-15 


-16.5 


V 


+5V 




+4.5 


+5 


+16.5 


V 


Current 












+15V 






8 


16 


mA 


-15 V 






-12 


-24 


mA 


+5V 






4.5 


9 


mA 



NOTES: 

1. Absolute maximum ratings are limiting values, applied 
individually, beyond which the serviceability of the circuit 
may be impaired. Functional operation under any of these 
conditions is not necessarily implied. 

2. Adjustable to zero using external potentiometers. 

3. See Definitions. 



4. FSR is a "full scale range" and is 20V for+lOV range, 10V 
for +5V range, etc., or 2mA (+20%) for current output. 



5. The HI-5687 will operate with supply voltages as low as 
+11.4V. It is recommended that output voltage ranges -10V 
to +10V and not be used if the supply voltages are less than 
+12.5V. 



© IC MASTER 1983 



2703 



H 1-5712/5712 A 

High Performance 
72 Bit Analog to 
Digital Con verter 



FEATURES 



DESCRIPTION 



• MICROPROCESSOR COMPATIBLE 

• CONVERSION TIME 10/usecMAX 

OVER TEMP. 

• NO MISSING CODES OVER TEMPERATURE 

• INTERNAL+10V REFERENCE 

• INTERNAL CLOCK WITH EXTERNAL 
OVERRIDE CAPABILITY 

• SERIAL OUTPUT 

• TTL/CMOS COMPATIBLE 

• TRISTATE PARALLEL OUTPUTS 
#40 PIN DIP 

• MIL-STD-883 PROCESSING AVAILABLE 



APPLICATIONS 



• MULTI-CHANNEL DATA ACQUISITION 
SYSTEMS 

• STATUS MONITORING SYSTEMS 

• PROCESS CONTROL SYSTEMS 

• INSTRUMENTATION 

• HIGH RELIABILITY DAS's 



The HI-5712/5712A is a 12-bit successive approximation analog-to-digital 
converter (ADC) intended for high-speed, high-performance data conversion 
applications. An 8/is conversion time for an accurate 12 bit conversion with 
low gain and offset temperature coefficients are among its many features. 
Numerous functions can be software controlled to meet a variety of ADC 
requirements. 

The highly flexible input design accepts user programmed unipolar and bipolar 
inputs of: to +10V, to +20V, ±5V and +10V full scale signal levels. The 
internal precision +10V reference delivers up to 10mA of output current with 
ultra high temperature stability. This reference is intended for biasing the 
ADC reference input, although other configurations can be implemented. 
A remote sense line is provided for applications requiring usage of the precision 
reference elsewhere in the system. 

The output code select line and the short cycle control inputs are latched inter- 
nally for microprocessor compatibility and provide selection of either binary 
or 2's complement output code, and resolution of 6, 8, 10 or 12 bits, respec- 
tively. A flexible interface is provided for 8, 12 and 16 bit systems via the chip 
select line and the word length control pins. The latter allows independent 
tri-state enabling of parallel output bits 1-8 and 9-12. A serial data output line 
is provided for applications requiring remote data transmission. 

The HI-5712/5712A is manufactured with hermetically sealed leadless chip 
carriers (LCC's) mounted to both sides of a multi-layer ceramic substrate 
which results in a compact 40 pin dual-in-line package. The HI-5712A is 
intended for military, industrial and instrumentation applications. MIL-STD- 
883 class 6 and high reliability commercial grades are both available as standard 
products. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 11 



vps-[ 


1® 


40 


■j for Packaging 


Nc[j 


2 


39 


1 VREF 
J SENSE 


NC [ 


3 


38 


TVREF 
J OUT 


BIPOLAR r 

offsetL 


4 


37 


1 VBEF 
-1 IN 


20V Fs[ 


5 


36 


] NC 


10V Fs[j 


6 


35 


T ZERO 

J adj 


ANALOG |- 

pwrgndL 


7 


34 


] RLS 


ENABLE p 
BIT 9-12 L 


8 


33 


I CHIP 
-1 ENABLE 


ENABLE r 
BITI-SL 


9 


32 


] STATUS 


SERIALr 
OUT L 


^o H 1-571 2/ 


31 


-1 START 
J CONV. 


SHORT r 

cybL 


„ 5712A 


30 


-1 MSB/MSB 
J SELECT 


SHORT r 
CY aL 


12 


29 


T CLOCK 
->IN 


CLOCK r 

outL 


13 


28 


] NC 


BIT 12 r 
(LSBI L 


14 


27 


1BIT1 
J (MSB) 


BIT 11 Q 


15 


26 


]bIT2 


BITIoQ 


16 


25 


] BIT 3 


BIT 9^ 


17 


24 


] BIT 4 


BIT8[ 


IS 


23 


] BIT 5 


BIT7[| 


19 


22 


] BIT 6 


DIGITALr 
GNOL 


20 


21 


] vlogic 



CHIP enable; 

STATUS * 
START CONV.) 
CLOCK IN ) 
CLOCK OUT 4 
SERIAL OUT < 
MSB/MSB SEL ) 
SHORT CY a) 
SHORT CY B ) 




RLS 

ANALOG GNO 
DIGITAL GND 



2704 



© IC MASTER 1983 



SPECIFICATIONS 




















ABSOLUTE MAXIMUM RATINGS (NOTE 1) 














Power Supply Inputs 






Power Dissipation (Pd) 2 Watts 






Vps+ 


+20V 


Operating Temperature Range 






Vps- 


-20V 


Hl- 


5712-2, HI 


-5712A-2 




550Cto+1250C 


vlogic 


+10V 


Hl- 


5712-5, HI 


-5712A-5 




OoCto +750C 


Vref in (Pin 37) 


OV,Vps+ 


Hl- 


5712-7, HI 


-5712A-7 


0OCto+75OC(Hi Rei) 


Vref SENSE (Pin 39) 


OV, Vps+ 


Hl- 


5712-8, HI 


-5712A-8 


-550Cto+1250C (Hi Rel) 


Digital Inputs 


-iv,Vlogic 


Storage Temperature Range 






















65OCto+150OC 


ELECTRICAL CHARACTERISTICS 
















(Ta = +250C. Vps = +15V, Vps- = 


-15V, Vl0GIC^+5V, Vref In = Internal Vref, 








Full Scale = +10\/, Conversion Speed = 9/is TYP (Internal Clock), 12-BIT Conversion, Unless 






otherwise noted.) 






















HI-5712A-2 HI-5712-2 


HI-5712A-5 Hl- 


5712-5 








HI-5712A-8 H 


1-5712-8 


HI-5712A-7 HI-5712-7 






PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


























Full 






12 






12 


BITS 






NONLINEARITY ui mioA 


+250C 




+1/4 


+1/2 




+1/4 


+1/2 


LSB 








Full 




+1/4 


+1/2 




+1/4 


+1/2 


LS6 






HI 5712 


+250C 




+1/4 


+1/2 




+1/4 


+1/2 


LSB 






Full 




+1/2 


+1 




+1/2 


+1 


LSB 






DIFFERENTIAL „,_„,2A 
NONLINEARITY 


+250C 




+1/4 


+1/2 




+1/4 


+1/2 


LSB 






Full 




+1/4 


+1/2 




+1/4 


+1/2 


LSB 






HI-5712 


+250C 




+1/4 


+1/2 




+1/4 


+1/2 


LSB 






Full 




+1/2 


+1 




±1/2 


±1 


LSB 








NO MISSING CODES GUARANTEED OVER TEMPERATURE 






INHERENT QUANTIZATION 






















ERROR 


Full 






±1/2 






+ 1/2 


LSB 






UNIPOLAR OFFSET ERROR (Note 2) 






















(Adjustable to Zero) 


+250C 




.3 


.6 




.3 


.6 


%FSR 






BIPOLAR OFFSET ERROR (Note 2) 






















(Adjustable to Zero) 


+2 50 c 




.3 


.6 




.3 


.6 


%FSR 






GAIN ERROR (note 2) 






















(Adjustable to Zero) 


+250C 




.1 


.3 




.1 


.3 


%FSR 






ADJUSTMENT RANGE 






















UNIPOLAR OFFSET 


+250C 


+1 


+2 




+1 


±2 




%FSR 






BIPOLAR OFFSET 


+250C 


+1 


+2 




+1 


+2 




%FSR 






GAIN 


+250C 






.3 






.3 


%FSR 






TEMPERATURE STABILITY 






















(With Internal Vref) 






















UNIPOLAR OFFSETHI-5712A 


Full 




+2 


±5 




±2 


+5 


ppm FSR/OC 






DRIFT HI-5712 


Full 




±4 


+15 




+4 


+15 


ppm FSR/OC 






BIPOLAR OFFSET HI-5712A 


Full 




±4 


+10 




+4 


±10 


ppm FSR/OC 






DRIFT HI-5712 


Full 




+8 


+25 




+8 


+25 


ppm FSR/OC 






GAIN DRIFT HI-5712A 


Full 




+5 


+10 




±5 


±10 


ppm FSR/OC 






HI-5712 


Full 




tio 


+20 




+10 


±20 


ppm FSR/OC 








NO MISSING CODES GUARANTEED OVER TEMPERATURE 





© IC MASTER 1983 



2705 



SPECIFICATIONS (Continued) 



33 





HI-5712A-2/-8 
HI-5712-2/-8 


HI-5712A-5/-7 
HI-5712-5/-7 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


CONVERSION SPEED (Internal Clock) 


















12 BIT 


+250C 




9.0 


10.0 




9.0 


10.0 




10 BIT 






6.8 


8.5 




6.8 


8.5 




8 BIT 






5.6 


7.0 




5.6 


7.0 


MS 


6 BIT 






4.4 


5.4 




4.4 


5.4 


MS 


MAXIMUM CONVERSION SPEED AT 


















12 BITS WITH EXTERNAL CLOCK 


















(Notes) 


Full 




6.5 






6.5 




MS 


ANALOG INPUT CHARACTERISTICS 


INPUT VOLTAGE RANGE 


















UNIPOLAR 


Full 


10 






10 






V 




Full 


20 






20 






V 


BIPOLAR 


Full 


+5 


+5 




±5 


+5 




V 




Full 


±10 


+10 




+10 


±10 




V 


INPUT IMPEDANCE 


















10V FS (PIN 6) 


Full 


1.6 


2 


2.4 


1.6 


2 


2.4 


Kn 


20V FS(PIN 5) 


Full 


3.2 


4 


4.8 


3.2 


4 


4.8 


Kn 


Vref IN (PIN 37) 


Full 


6.4 


8 


9.6 


6.4 


8 


9.6 




ANALOG OUTPUT CHARACTERISTICS 


Vref output voltage 


+2 50 c 


9.970 


10.000 


10.030 


9.970 


10.000 


10.030 


V 


Vref OUTPUT CURRENT 


Full 


10 






10 






mA 


VREF OUTPUT HI-5712A 


Full 




+10 


±15 




+10 


+15 


ppm FSR/OC 


TC HI-5712 


Full 




±10 


±15 




±10 


+15 


ppm FSR/OC 


DIGITAL INPUT CHARACTERISTICS 


INPUT VOLTAGE (Note 8) 


















LOGIC 1 


Full 


3.3 


2.7 




3.3 


2.7 




V 


LOGIC 


Full 




1.2 


.8 




1.2 


.8 


V 


INPUT CURRENT(Note 8) 


















LOGIC 1 (VCC) 


Full 


-25 





+25 


-25 


. 


+25 


A'A 


LOGIC (GI\ID) 


Full 




-200 


-400 




-200 


-400 


ma 


ETERNAL CLOCK (Note 3) 


Full 






2.5 






2.5 


MHz 


DIGITAL OUTPUT CHARACTERISTICS 


OUTPUT VOLTAGE 


















LOGIC 1 loH = -800 A 


Full 


3.5 


4.0 




3.5 


4.0 




V 


LOGIC IoL = +3.2mA 


Full 


.2 


.4 






.2 


.4 


V 


OUTPUT CURRENT 


















LOGIC 1 VO = 3.5V 


Full 


-800 


-1000 




-800 


-1000 




MA 


LOGIC V0 = .4V 


Full 


3.2 


4.0 




3.2 


4.0 




mA 



DIGITAL INPUT TIMING CHARACTERISTICS 



CHIP ENABLE TO START CONVERT ted 


Full 


50 






50 






nsec 


START CONVERT PULSE LOW hz\ 


Full 


100 






100 






nsec 


START CONVERT PULSE HIGH tjch 


Full 


50 






50 






nsec 


CONTROL SETUPTIME ts 


Full 


100 






100 






nsec 


CONTROL HOLD TIME th 


Full 


100 






100 






nsec 


CLOCK INPUT LOW tpwl 


Full 


125 






125 






nsec 


CLOCK INPUT HIGH tpwh 


Full 


150 






150 






nsec 


CLOCK INPUTPERIOD td 


Full 


400 






400 






nsec 


ENABLE 1-8, 9-12 PULSE WIDTH tem 


Full 


100 






100 






nsec 



2706 



® IC MASTER 1983 



SPECIFICATIONS (Continued) 









H 


-5712A-2/-8 


HI-5712A-5/-7 










HI-5712-2/-8 


H 


-5712-5/-7 




PARAMETER 


TEMP 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


DIGITAL OUTPUTTIMING CHARACTERISTICS (See Figure 6) 


THREE STATE ENABLE DELAY 


toe 


hull 




4U 


bU 




A Ft 

40 


cn 
bU 


nsec 


THREE STATE DISABLE DELAY 


tod 


Full 




60 


100 




60 


100 


nsec 


START CONVERT TO STATUS DELAY tsd 


hull 




l\i 


1 nn 
lUU 




/O 


1 nn 
1UU 


nsec 


START CONVERTTO CLOCK OUT DELAY 




















tscd 






200 


500 




200 


500 


nsec 


CLOCKTO SERIAL OUT DELAY 


tpsd 


Full 


100 


150 


200 


100 


150 


200 


nsec 


LAST CLOCK TO STATUS DELAY 


tscdt 


Full 


50 


75 


100 


50 


75 


100 


nsec 


PARALLEL DATA TO 




















STATUS DELAY 


tds 


Full 


50 


75 




50 


75 




nsec 


LAST SERIAL BIT TO 




















STATUS DELAY 


tda 


Full 


50 


75 




50 


75 




nsec 


CLOCK INPUTTO CLOCK 




















OUT DELAY 


tdcl 


Full 




25 


50 




25 


50 


nsec 


PARALLEL DATA OUTPUT CODES 


UNIPOLAR (Note 4) 


Positive True Binary 


BIPOLAR (Note 4) 




Positive True Offset Binary 






Positive True Two's Complement Binary 


SERIAL DATA OUTPUT CODE 


Positive True NRZ Code 


POWER SUPPLY REQUIREMENTS (Note 5) 


Vps+ 


Full 


+13.5 


+15 


+16.5 


+13.5 


+ 15 


+16.5 


V 


Vps- 


Full 


-13.5 


-15 


-16.5 


-13.5 


-15 


-16.5 


V 


vlogic 


Full 


+4.5 


+5 


+5.5 


+4.75 


+5 


+5.25 


V 


lps+ 


Full 




27 


35 




27 


35 


mA 


Ips- 


Full 




42 


50 




42 


50 


mA 


'LOGIC 


Full 




4.5 


15 




4.5 


15 


mA 


POWER SUPPLY SENSITIVITY (Note 6) 


Vps+ = +13.5V to+16.5V 




















Vps- = -15V, Vl0GIC = +5V 




















UNIPOLAR OFFSET 






2 


5 




2 


5 


ppm of 


BIPOLAR OFFSET 






2 


4 




2 


4 


FSR/ 


GAIN 






1 


3 




1 


3 


%AP.S. 


Vps-= -13.5V to -16.5V 




















Vps+ = +15V, V LOGIC = +5V 




















UNIPOLAR OFFSET 






2 


5 




2 


5 




BIPOLAR OFFSET 






2 


4 




2 


4 




GAIN 






1 


3 




1 


3 




VLOGIC = +4.5Vto+5.5V 




















Vps+ = +15V,Vps- = -15V 




















CONVERSION SPEED (12 Bit with 




















Internal Clock) 








+5 


+10 




+5 


+10 


% 



© IC MASTER 1983 



2707 



NOTES: 1. 



Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the 
circuit may be impaired. Functional operation under any of these conditions is not necessarily implied. 

See Figure 2 for connections. The initial errors are adjustable to zero by using external trim potentiometers 
as shown in Figure 3, and 4. 

The HI-5712A will operate at these speeds (for 12 bit conversion), but parametric performance is not guaranteed. 
See operating instructions for details. 
After 60 seconds warm-up. 
See definitions. 

These terminals will be used in the future for additional functions. Do not make connections to these pins in 
your system. 

TTL compatibility guaranteed. 



PIN FUNCTIONS AND DESCRIPTIONS 



PIN 


SYMBOL 


DESCRIPTION 


1 


Vns- 


-1 5V Power Supply Terminal 


2 


NC 


IMu l/Onnc(/llUli Occ IMOlc / 


3 


NC 


IMn Pnnnoptinn Qoo Nnto 7 
1«U uUiillcUllUli Occ IvUlc / 


4 


BIPOLAR 


Connect to Vrep for Bipolar Input 




OFFSET 


iviuuc. OCC upcidiing iiisiruLiiuns 






for Details. 


5 


20V FS 


20V Full Sralp Anainn Inntit 


6 


lOV FS 


10V Full Scale Analog Input 


7 


ANALOG 


Analog Power Supply Return 




p M n 




8 


ENABLE 


Output 'Three State" Control. An 




BIT 9-12 


Input "0" Enables Bits 9 through 






1 2, whereas a "1 " Switches these 






Bits to a High Impedance State. 


9 


ENABLE 


Output "Three State" Control. An 




BIT 1-8 


Input "0" Enables Bits 1 through 






8, whereas a "\" Switches these 






Bits to a High Impedance State. 


10 


SERIAL 


NRZ Serial Data Output. 




OUT 


To be used in Conjunction with 






Clock Out for Remote Data 






Transmission 


11 


SHORT 


See Description for Pin 12 




CYB 




12 


SHORT 


Digital Inputs Applied to short 




CY A 


cycle A and B selects a conversion 






of 6,8, 10,orl2-bits: 






BITS SHORT CY A SHORT CYB 






6 






8 1 






10 1 






12 1 1 



PIN 


SYMBOL 


DESCRIPTION 


13 


CLOCK 


SAR Clock Output. Used for 




OUT 


Decoding Serial Out Data 


14 


BIT 12 


OiJtDut Data Bit (L*?B) 


IK 


RIT 11 
Dl 1 11 


UUipUl Uaia Dll 


1R 
1 D 


RIT in 

oil lU 


uuxpul uaia dit 


17 




Output Data Bit 


18 


BIT 8 


Output Data Bit 


19 


BIT 7 


Output Data Bit 


20 


DIGITAL 


Digital Power Supply Return 




GND 




91 


VLOGIC 


+5V Power Supply Terminal 


22 


BIT 6 


Output Data Bit 


23 


BIT 5 


Output Data Bit 


24 


BIT 4 


Output Data Bit 


25 


BIT 3 


Output Data Bit 


26 


BIT 2 


Output Data Bit 


27 


BIT 1 


Output Data Bit (MSB) 


28 


NC 


No Connection. See Note 7. 


29 


CLOCK IN 


An External Clock Signal Applied 






to this Input Overrides the 






Internal Clock. 


30 


MSB/MSB 


Digital Input Pin. A "1 " Applied 




SEL 


to this Terminal Selects a Straight 






Binary or Offset Binary Output 






Code. A "0" Inverts the MSB to 






Yield a 2's Complement Binary 






Output Code. 


31 


START CONV 


Digital Input Pin. A High to Low 






Transition Initiates the ADC 






Conversion Cycle. 


32 


STATUS 


Digital Output Pin. A "1" 






Indicates that the ADC is Busy, 






While a "0" Denotes that Con- 






version is Completed and Data is 






Ready for Retrieval. 



2708 



© IC MASTER 1983 



PIN FUNCTIONS AND DESCRIPTIONS 



PIN 


SYMBOL 


DESCRIPTION 




PIN 


SYMBOL 


DESCRIPTION 


00 


un ir 


ninit;il Inniit Pin A "1" Fnrrp^ 




ou 


NC 


No Connection. See Note 7. 




PNAR 1 P 


thp Otitniit n;itp fiPriAl Oiit and 




37 


Vnpp IN 
^ ntr 


+10V Reference Input to ADC, 






Status Terminals to a High Im- 




38 


VrEFOUT 


Internal +10\/ Reference Output, 






npHanrp StatP and thp Aflf! 








Normally Connected to Vrep IN 






Disabled. A "0" Enables these 








(Pin 37). 






ADC Functions. 




39 


Vref SENSE 


Internal +10\/ Reference Sensing 


34 


RLS 


Reference Low Sense. 








Terminal, Normally connected to 


35 


ZERO ADJ 


External Zero Adjustment Pin, 
See Operating Instructions for 








Vref Out (Pin 38). See Oper- 
ating Instructions for Details. 






Details. 




40 


Vps+ 


+15\/ Power Supply Terminal. 



APPLYING THE H 1-5 712/5 71 2A 



OPERATING INSTRUCTIONS 

Conventional ADC systems provide maximum performance 
when the analog and digital ground lines are tied together 
at the ADC terminals. This minimizes analog interference 
due to digital switching noise. For optimum performance, 
this external grounding procedure should be followed in 
HI-5712/5712A installations to reinforce the unit's internal 
analog-to-digital ground connections. Under no circum- 
stances should the Reference Low Sense (RLS) terminal 
(Pin 34) be connected to system ground. 

In practice, the Reference Low Sense (RLS) terminal (Pin 
34) normally is connected to zero adjust (or error amplifier) 
input terminal (Pin 35), either directly or through an appro- 
priate resistor network. See figures 3 and 4. 

On the HI-5712/5712A substrate, the power supply lines 
to each active component are bypassed to ground 
with 0.01 H F chip capacitors for high frequency noise rejec- 



tion. For best accuracy, the grounding and decoupling 
schemes shown in Figures 3 and 4 are recommended. The 
10/i F bypass capacitors shown should be connected as 
close as possible to the HI-5712/5712A, preferably at the 
device pin. 

For applications where usage of potentiometers is highly 
undesirable, the trim pots shown in Figures 3 and 4 can 
either be deleted or replaced by precision fixed resistors. 
(Delete R3 and R4; replace Ri with 25 ohms). When 
precision fixed resistors are used, the initial offset error 
and gain error contributions are as specified in page 2. 

NOTE: The HI-5712/5712A may latch up if the device 
is enabled before applying power. Disabling the device 
following power turn on will remedy this situation. Care 
supplies do not excessively overshoot their final value during 
turn on. 



CONTROL AND INTERFACE 

The HI-5712/5712A features a versatile set of controlling 
functions which allows a wide variety of applications, in- 
cluding microprocessor bus interfacing. 

When the chip enable is set to low, the internal registers 
are enabled, and the output data lines can be enabled via 
the output enable control lines. The conversion cycle 
is initiated at the falling edge of the start conversion pulse. 
At this time, the MSB/MSB Select, Short Cycle A, and 
Short Cycle B control information is latched into the internal 
registers. The status line is also forced into an active high 
state indicating that a conversion is taking place. At the 



end of the conversion cycle the status line will be set to low 
to signify that the data is ready at the tri-state buffers. The 
various timing relationships are shown in Figure 1. 

There are two distinct modes of operation, namely, contin- 
uous conversion and single step conversion. Continuous 
conversion can be easily achieved by connecting the Status 
line to the Start Convert pin. In this application, an in- 
decision state may occur during the initial power-on con- 
ditions. Normal operation is restored by pulsing the chip 
enable pin to logic high for a period greater, thaa 100 ns. 



© IC MASTER 1983 



2709 



APPLYING THE HI-5712/5712A 



CHIP ENABLE 



START CONVERT 



SERIAL OUT 



ENABLE 1-8 
ENABLE 9-12 



MSB/MSB 
SHORT CYA,B 



EXTERNAL 
CLOCK INPUT 
(IF USED) 



tcd-^ 



CONVERSION TIME 




toe J L♦ds^ 



h--th 



(data VALIt^ 



^ |-4 tpyyl ^ |>«tpwh 



tcl 



FIGURE 1. HI-5712/5712A TIMING DIAGRAM 



REMOTE DATA TRANSMISSION 



► +5V 



The Serial Data Out is mainly used for remote data trans- 
mission, where only a limited number of wires are available. 

Serial Output is bit by bit (MSB first, LSB last) in a NRZ 
(nonreturn-to-zero) format. It changes state only at the 
positive going edges of the Clock Out, and remains valid 
during the whole clock period. Parallel data can be con- 
structed by clocking the serial data into a receiving shift 
register. 

In order to minimize transmission error, the negative-going 
edge of theclockshould be used to clock data into the remote 
shift register. The parallel data will be valid once the status 
line returns to low. The clocking scheme is shown in 
Figure 1. 



SERIAL OUT 



SIGNALS CLOCK OUT 

TO/FROM > — -~ 

HI -57 12/ .STATUS 
571 2A >— 



74LS00 
START CONV. 



A 

74LS164 



CLEAR 



A 

74 LSI 64 



10 



BIT 5 



BIT 6 



BITS 



(MSB) 



PARALLEL 

DATA 

OUT 



*- (LSB) 

-< START CONV. | - 



FIGURE 2. DECODING SERIAL DATA OUT 



2710 



© IC MASTER 1983 



INPUT CONNECTIONS AND CALIBRATION PROCEDURES 



33 



HI-5712/5712A CALIBRATION CHART 



OPERATING 
MODE 


ANALOG 
INPUT 
CONNECTION 


R2BIAS 
RESISTOR 


MSB/MSB 
SELECT 
PIN 30 


OFFSET ADJUST 
ANALOG INPUT 
VOLTAGE 


ADJUST R3 FOR 
DITHER BETWEEN 
CODES 


GAIN ADJUST 
ANALOG INPUT 
VOLTAGE 


ADJUST R1 FOR 
DITHER BETWEEN 
CODES 


LSB 
WEIGHT 




UNIPOLAR STRAIGHT 

BINARY 

OVto+lOV 


10VFS 
PIN 6 


667n 


HIGH 


+1.22mV 


0000 0000 0000 
0000 0000 0001 


+9.9963V 


1111 1111 1110 
1111 1111 1111 


2.44mV 


UNIPOLAR STRAIGHT 

BINARY 

OV to+20V 


20VFS 
PIN 5 


soon 


HIGH 


+2.44mV 


0000 0000 0000 
0000 0000 0001 


+19.9927V 


1111 1111 1110 
1111 1111 1111 


4.88niV 


BIPOLAR OFFSET 

BINARY 

-5V to +5V 


10V FS 
PIN 6 


580n 


HIGH 


-4.9988V 


0000 0000 0000 
0000 0000 0001 


+4.9963V 


1111 1111 1110 
0111 1111 1111 


2.44mV 


BIPOLAR OFFSET 

BINARY 

-10V to+lOV 


20V FS 
PIN 5 


667S2 


HIGH 


-9.9976V 


0000 0000 0000 
0000 0000 0001 


+9.9927V 


nil 1111 1110 
1111 1111 1111 


4.88mV 


BIPOLAR 2's 
COMPLEMENT 
-5V to +5V 


10V FS 
PIN 5 


580f2 


LOW 


-4.9988V 


1000 0000 0000 
1000 0000 0001 


+4 .9963V 


0111 1111 1110 

0111 nil nil 


2.44mV 


BIPOLAR 2's 

COMPLEMENT 

lOVto+lOV 


20V FS 
PIN 6 


667n 


LOW 


-9.9976V 


1000 0000 0000 
1000 0000 0001 


+9.9927V 


0111 1111 1110 

0111 nil nil 


4.88mV 



CALIBRATION PROCEDURE- Refer to Calibration Chart and to FiguresS and 4 for appropriate analog input 
connections, value of bias resistor, and MSB/MSB select. 

STEPl OFFSET ADJUSTMENT 

• Set analog input to the appropriate value for offset adjustment. 

• Adjust R3 for dither between codes shown in calibration chart. 

STEP 2 GAjN ADJUSTMENT 

• Set analog input to the appropriate value for gain adjustment. 

• Adjust R 1 for dither between codes shown in calibration chart. 

NOTE: This calibration procedure insures that the transfer characteristic produced by connecting the midpoints 
of all quantization intervals passes through the origin. 





FIGURE 3. UNIPOLAR INPUT CONNECTIONS 
- STRAIGHT BINARY OUTPUT CODE 



FIGURE 4. BIPOLAR INPUT CONNECTIONS 



© IC MASTER 1983 



2711 



HI-574A 

Fast, Complete 12 -Bit 
J Analog to Digital Converter 
with Microprocessor Interface 



FEATURES 



DESCRIPTION 



• AD574A SECOND SOURCE 

• LOW POWER 



360mW 



• COMPLETE 12-BIT A/D CONVERTER WITH REFER- 
ENCE AND CLOCK 

• FULL 8 OR 16-BIT //P INTERFACE 

• FAST SUCCESSIVE APPROXIMATION 
CONVERSION 25MS 

• COMPOUND MONOLITHIC CONSTRUCTION 

• NO MISSING CODES OVER TEMPERATURE 

• LOW GAIN T.C. lOppm/oc 

• LOW COST 



APPLICATIONS 



• HIGH PERFORMANCE DATA ACQUISITION SYSTEMS 

• PRECISION INSTRUMENTATION 

• MILITARY AND INDUSTRIAL SYSTEMS 



The Harris HI-574A is a complete 12-bit analog-to-digital converter. 
Successive approximation conversion is performed by two monolithic 
chips housed in a 28-pin dual-in-line package. This compound mono- 
lithic circuit combines Harris' CMOS and Bipolar processes. 



Designed as a direct replacement for the AD574A, the device 
offers full microprocessor compatibility by both 8 and 16-bit systems 
via 'Three State" output buffer circuitry. Wafer level laser trimming 
techniques provide close match of ladder resistors, ensuring high 
accuracy plus a guarantee of no missing codes over temperature. 
Included in the A/D converter are a 12-bit, high performance digital- 
to-analog converter, a very stable voltage reference, and an accurate 
comparator. 

1n systems where power consumption must be minimized, Harris 
offers a significant improvement over other manufacturers units. 
The HI-574A dissipates typically 400mW. 



The HI-574A is available in versions which have guaranteed perfor- 
mance over both military and commercial temperature ranges. 
Screening to MIL-STD-883A, Class B is also available. 



PIN OUT 



FUNCTIONAL DIAGRAM 



TOP VIEW 



12/i CS AqR/CCE 



+5V SUPPLY VlogIC 






28 


DATA MODE SELECT 


2 




27 


12/8 




CHIP SELECT, CS 


3 




2S 


BYTE ADDRESS/SHORT 






25 


CYCLE, Ao 


4 
5 


HI-574A . 


READ/CONVERT, R/C 




24 


CHIP ENABLE, CE 


6 




23 


+15V SUPPLY, Vcc 


7 




22 


+10V REFERENCE 






21 


REF OUT 


8 




ANALOG COMMON, AC 


9 




20 


REFERENCE INPUT 


10 




19 


REF IN 






-15V SUPPLY, VeE 


11 




13 


BIPOLAR OFFSET 


12 




17 


BIPOFF 




10VSPAN INPUT, 10V IN — 


13 




16 


20V SPAN INPUT, 20V IN 


14 




15 



■ STATUS, STS 

■ DB11 MSB 

*- 

' DB10 
DB9 
DBS 

- 0B7 
066 

. 065 
064 

- DB3 
' 062 

DB1 

■ 060 LSB 

DIGITAL COMMON 
DC 



DIGITAL 

DATA 

OUTPUTS 



REF OUT . 
110.00V) 



DIGITAL CHIP 



CURRENT 
SUMMING 
JUNCTION 



V ■■ 



NIB. A j NIB.B I NIB.C 
•THREE STATE" OUTPUT BUFFER 



lATCH 

KEEP/ 
REJECT 



rv^MPAi 



ANALOG CHIP 
OACOUT 
REF IN 

ANALOG COMMON 



SUCCESSIVE 
APPROXIMATION 
REGISTER 
(SAR) 



2712 



© IC MASTER 1983 




HI-5900 

Analog Data Acquisition 
Signal Processor 



FEATURES 



DESCRIPTION 



• INPUT OVERVOLTAGE PROTECTION 

• 50kHz THROUGHPUT 

• 12-BIT ACCURACY 

• OUTPUTTRACK/HOLD AMPLIFIER 

• ZERO OFFSETADJUSTMENT 

• DIFFERENTIAL INPUTCHANNELS 

• SOFTWARE CONTROLLED GAIN AND 
CHANNELSELECT 

• 85dBCMRR 

• COMPACT 32 PIN DIP 

• MIL-STD-883 SCREENING AVAILABLE 



APPLICATIONS 



• HIGH PERFORMANCE DATA ACQUISITION 

• MILITARY SYSTEMS 



The HI-5900 comprises "front end" components of a data acquisition system 
including an eight channel differential multiplexer, programmable gain instru- 
mentation amplifier (PGA), and Track and Hold amplifier. Adding a timing 
circuit and one A to D converter yields a complete data acquisition system. A 
50kHz channel-to-channel throughput rate is achieved when the HI-5900 
is used with a fast 12 bit A to D converter such as HARRIS H 1-571 2. 

Each output line of the input multiplexer is buffered by a high-quality non- 
inverting amplifier. This isolates each line from source resistances external to 
the 5900, preserving the high CMRR of the instrumentation amplifier block. 
Also, the buffers provide a high input impedance for each channel. 

The PGA, which includes an op amp, a monolithic resistor network and a four 
channel differential multiplexer, offers precision gain values of 1,2,4, and 8. 
The voltage gain is selected by a two bit digital word. The output of the PGA 
drives the Track and Hold amplifier, and the ground side of the PGA is iso- 
lated by a buffer amplifier to maintain a high CMRR. 

The output Track/Hold amplifier is a monolithic device, internally connected 
for non-inverting unity gain. In the sample mode is operates as a high per- 
formance buffer amplifier. With an external holding capacitor, it may be 
switched to HOLD with an aperture delay of 50ns and lOpC of charge transfer. 

The packaging technique involves monolithic chips mounted in leadless chip 
carriers (LCC's) and soldered to both sides of a multilayer ceramic substrate. 
Each LCC may undergo reliability screening such as MIL-STO-883, Method 
5004/Class B, before assembly on the substrate. The resulting package is a 
compact 32 pin DIP. 

The HI-5900 is offered as a high performance front-end section for military 
and industrial data acquisition systems. It is designed for interface with com- 
puters and is well suited for high-rel applications. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 1 1 for Packaging 



TOP VIEW 




CHAN 

SELECT EN 
9 9 <? 




® IC MASTER 1983 



2713 



ABSOLUTE MAXIMUM RATINGS 


(Note 1) 








VoltsQG oStwBGn V+ and V- TGrminals 






Oiitniit Piirront 
UUL(JUL UUIICllL 


^hnrt nirniit Prntprtpri 


ninital Inniit nwon/nltnnp iMiiltlnlpyprQI 






OpBTdtiny T6mp6r3tur6 RsnQB 






VSupply (+) 


+4V 


HA-5900-5 


QOC < Ta < +750C 




VSupply (-) 


-4V 


HA-5900-2 


-550c < Ta < +1250C 


Analog Input Overvoltage 




Storage Temperature Range 


-650C < Ta < +150OC 




VSupply (+) 


+20V 


Internal Power Dissipation 


650mW 




VSupply {-) 


-20V 


T/H Control Input 


+8, -15V 



SPECIFICATIONS 



ELECTRICAL CHARACTERISTICS Unless otherwise specified: Vs =±15V; Ch = lOOOpF; V|h = 4.0V; Vil = 0.8V 







H 1-5900-2 




H 1-5900-5 










-550Cto+1250C 


QOC to +700C 






PARAMETER 


TEMP 


MIN 


TYP. 


MAX. 


MIN. 


TYP. 


MAX. 


UNITS 


ANALOG INPUT CHAR. , 


















EACH CHANNEL 


















UTTScI VOIloyc 


+25''C 




2 


7 




3 


10 


mV 




Full 






9 






12 


mV 


ui3S uurrBnt 


+25''C 




80 


300 




80 


300 


nA 




Full 




30 


600 




80 


600 


nA 


Offset Current 


+250C 




1 5 


150 




20 


150 


nA 




run 




30 


300 




30 


300 


nA 


Common Mode Range 


Full 


±10 






±10 






V 


Common Mode Rejection Ratio 


Full 


80 


85 




74 


85 




dB 


tXl^^m — +1fl\l\ Anil PaIh 

l"CM - — lUV) Any bam 


















DIGITAL INPUT CHAR. 


















Multiplexer Digital Input Current 


Full 




0.5 


1 




0.5 


1 




(High or Low) 


















Track/Hold Digital Input Current 




















Pull 

run 






0.8 






8 


mA 


V|N>4.0V 


Full 






20 






20 


MA 


TRANSFER CHARACTERISTICS 


















Small Signal Bandwidth (Gain = 1) 


+250C 




2 






2 




MHz 


Full Power Bandwidth (Gain =1, 


•+250C 




70 






70 




kHz 


Vo = +10V) 


















Crosstalk (Sample Mode, Gain = 8, 


+250C 


-80 


-90 




-80 


-90 




dB 


1kHz 20VP-P Input on all but 


















Selected Channel) 


















"nff Icniatinn fHnlH MnHp Hain ~ 1 
uii i^uidiiuii vnulu iviuuc, udii) i, 


+250C 




-76 






-76 




dB 


1kHz 20V P-P Input) 


















Acquisition Time(Note 2), to 0.01% 


+250C 




9 






9 




ps 


Gain - Absolute Error 


















Gain Of 1,2, 


Full 




0.01 


0.1 




0.01 


0.2 


% 


Gain Of 4 & 8 


Full 




0.01 


0.2 




0.01 


0.2 


% 


OUTPUT CHARACTERISTICS 


















Output Voltage Swing 


Full 


-lU 






+in 

_IU 






V 


Output Current 


+250C 


±10 






±10 






mA 


Output Resistance 


+250C 




5 






5 






DYNAMIC CHARACTERISTICS 


















tON, Enable (MUX) 


+250C 




300 






300 




ns 


tOFF- Enable (MUX) 


+250C 




300 






300 




ns 


Slew Rate 


+250C 




±4 






+4 




V/ps 


Droop Rate (T/H) 


+250C 




5 






5 




nV/ps 




Full 






20 






5 


MV/Ps 


Charge Transfer (T/H) 


250c 




10 






10 




pC 


Aperture Delay (T/H) 


+250C 




50 






50 




ns 


Aperture Uncertainty (T/H) 


+250C 




5 






5 




ns 


POWER SUPPLY CHARACTERISTICS 


















1+ / 


+250C 






13 






13 


mA 




Full 




8.5 


15 




8.0 


15 


mA 


L 


+250C 






13 






13 


mA 




Full 




6:5 


15 




6.0 


15 


mA 


Power Supply Rejection Ratio, V+ 


Full 


76 


90 




70 


90 




dB 


Power Supply Rejection Ratio, V- 


Full 


80 


100 




80 


100 




dB 



1 . Absolute maximum ratings are limiting values, applied individually beyond which the serviceability of the 
circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 

2. Acquisition Time is defined for a change of channel (+10V on chan. 1 to OV on chan. 8) with simultaneous 
change from HOLD to TRACK mode. Gain = 1. 



2714 



© IC MASTER 1983 



-TL/ 


^ HARRIS 

LyiJ SEMICONDUCTOR 
■ ■ PRODUCTS DIVISION 


HI-5901 

III w V V 1 


u 


^^^^V A DIVISION OF HARRIS CORPORATION 


Analog Data Acquisition 






Signal Processor 



FEATURES 



DESCRIPTION 



• INPUT OVERVOLTAGE PROTECTION 

• SOFTWARE CONTROLLED GAIN AND 
INPUT CHANNEL SELECTION 

• 16 PSEUDO-DIFFERENTIAL/SINGLE 
ENDED INPUT CHANNELS 

• GAINS 0F-1r274 AND-8 

• -90dB CROSSTALK 

• 0.01% GAIN ERROR 

• 9ps ACQUISITION TIME 
o DROOP RATE: 5nV//isec 

• LOW POWER DISSIPATION 250mW 

• COMPACT 32 PIN DIP 

o MiL-STD-883 SCREENING AVAILABLE 



APPLICATIONS 



• MULTI-CHANNEL DATA ACQUISITION 
SYSTEMS 

• STATUS MONITORING SYSTEMS 

• PROCESS CONTROL SYSTEMS 

• INSTRUMENTATION 

• HIGH RELIABILITY DAS's 



The HI-5901 is a data acquisiton front end subsystem intended for multisensor 
based high-level applications, requiring conversion of analog input data to digital 
form for computer processing. It provides sixteen single-ended or pseudo- 
differential channels of fault-protected multiplexed inputs, programmable gains 
of-1,-2r4,-8 and a buffered track and hold output block compatible with any 
commercially available A/D converter. All these functions are digitally selectable 
through appropriate coding of seven control terminals. Input channel expansion 
can be easily implemented through addition of external multiplexers and proper 
utilization of the enable-command pin. 

Being self-contained units except for the holding capacitor, they facilitate user 
applications and eliminate the need for selection of high-priced precision resistors 
or labor intensive adjustments to achieve the accuracy levels specified. 

This product provides channel to channel throughput rates of 50kHz at ±10 volt 
signal range when used in connection with a fast 12 bit A/D converter such as 
the H 1-57 12. In addition, it offers excellent input characteristics such as low 
input offset voltage with offset nulling capability, low input currents, very high 
input impedance, and very low crosstalk. Typical acquisition time and gain error 
are 9 microseconds and ±0.01%, respectively. The internal track and hold amp- 
lifier features aperture delay of 50ns, lOpC of charge transfer error, and a droop 
rate of SnVZ/isec. Total power dissipation is only 250mW. 

A complete high-speed and high precision data acquisition system with 15 bits of 
dynamic range can be easily implemented with only three components: the 
HI-5901, the HI-5712, and an offset nulling DAC. Board space required is'3 
square inches and total weight is less than 25 grams. 

The manufacturing technique adopted for the HI-5901 involves monolithic 
dice packaged in leadless chip carriers (LCC's) and soldered to both sides of a 
multilayer ceramic substrate. The resulting product is a compact and easy-to-use 
32 pin DIP. 

The HI-5901 is intended for military, aerospace, industrial and instrumentation 
applications. MIL-STD-883 Class B and high reliability commercial grades are 
both available as standard products. 



PINOUT 



FUNCTIONAL DIAGRAM 



TOP VIEW 













A2 


1 




32 


A, 


A3 


2 




31 


AO 


GND 


3 




30 


EN 


IN9 


4 




29 


IN, 


IN,o 


5 




28 


IN2 


IN11 


6 




27 


IN3 


IN12 


7 




26 


IN4 


IN, 3 


8 




25 


IN5 


IN, 4 


9 




24 


IN6 


IN, 5 


10 




23 


IN7 


IN, 6 


11 




22 


INs 


+v — 


12 




21 


-V 


MUX OUT 


13 




20 


Go 


SENSE 


14 




19 


G, 


vref low — 


15 




18 
17 


T/H OUT 


\ CONTROL 


16 




— Ch 



CHAN MUX 
SELECT EN OUT 
Q O O O O 





CAUTION: This device is sensitive to electrostatic 
discharge. 

Copyright (c) Harris Corporation 1 980 



© IC MASTER 1983 



2715 



ABSOLUTE MAXIMUM RATINGS 


(Note 1) 








Voltage Between V+ and V- Terminals 




40V 


Output Current 


Short Circuit Protected 


Digital Input Overvoltage (Multiplexers) 






Operating Temperature Range 






VSupply (+) 


+4V 


HA-5901-5, -7 


OOC < Ta < +750C 




VSupply <-) 


-4V 


HA-5901-2, -8 


-550c < Ta < +1250C 


Analog Input Overvoltage 




Storage Temperature Range 


-650C < Ta < +150OC 




VSupply (+) 


+20V 


Internal Power Dissipation 


650mW 




VSupply (-) 


-20V 


T/H Control Input 


+8, -15V 



SPECIFIC A 710 NS 



ELECTRICAL CHARACTERISTICS Unless otherwise specified: Vs = +15V; Ch = lOOOpF; V|h = 4.0V; V|l-0.8V 





HI-5901-2, -8 
-550c to+1250C 


HI-5901-5,-7 
OoCto+70OC 




rAKAMt 1 bn 


TEMP 


MIN 


TYP. 


MAX. 


MIN. 


TYP. 


MAX. 


UNITS 


ANALOG INPUT CHAR. , 
EACH CHANNEL 


















Offset Voltage 


+250C 
Full 




2 


7.5 
9.5 




3 


10.5 
13 


mV 
mV 


Bias Current 


+250C 
Full 




80 
90 


300 
600 




80 
80 


300 
600 


nA 
nA 


Offset Current 


+250C 
Full 




15 
30 


150 
300 




20 
30 


150 
300 


nA 
nA 


Common Mode Range 


Full 


±10 






±10 






V 


Common Mode Rejection Ratio 
(VcM = llOV) Any Gain 


Full 


80 


85 




74 


85 




dB ■ 


DIGITAL INPUT CHAR. 


















Multiplexer Digital Input Current 
(Higfi or Low) 


Full 




0.5 


1 




0.5 


1 


ma 


Track/Hold Digital Input Current 

V|n10.8V 

V|N > 4 0V 


Full 
Full 






0.8 
20 






0.8 
20 


mA 
|JA 


TRANSFER CHARACTERISTICS 


















Small Signal Bandwidtfi (Gain = 1) 


+250C 




2 






2 




MHz 


Full Power Bandwidth (Gain = 1, 
Vo = 110V) 


+250C 




70 






70 




kHz 


Crosstalk (Sample Mode, Gain = 8, 

9n\/P P Inniit nn M hut 
iKn£ iUvr -r input un dii uui 

Selected Channel) 


+250C 


-80 


-90 




-80 


-90 




dB 


"Off Isolation (Hold Mode, Gain = 1, 
IkHz 20V P-P Input) 


+250C 




-76 






-76 




dB 


Acquisition Time(Note 2), to 0.01% 


+250C 




9 






9 




ps 


Gain - Absolute Error 
Gain Of 1,2,4, & 8 


Full 




0,01 


0.1 




0.01 


0.2 


% 


OUTPUT CHARACTERISTICS 


















Output Voltage Swing 


Full 


±10 






±10 






y 


Output Current 


+250C 


±10 






±10 






mA 


Output Resistance 


+250C 




5 - 






5 






DYNAMIC CHARACTERISTICS 


















tON. Enable (MUX) 


+250C 




300 ■ 






300 




ns 


tOFF, Enable (MUX) 


+250C 




300 






300 




ns 


Slew Rate 


+250C 




±4 






±4 




V/^s 


Droop Rate (T/H) 


+250C 
Full 




5 


20 




5 


5 


nV/ps 
MV/AJs 


Charge Transfer (T/H) 


250c 




10 






10 




pC 


Aperture Delay (T/H) 


+250C 




50' 






50 




ns 


Aperture Uncertainty (T/H) 


+250C 




5 






5 




ns 


POWER SUPPLY CHARACTERISTICS 


















1+ 


+250C 
Full 




8.5 


13 
15 




8.0 


13 
15 


mA 
mA 


1. 


+250C 
Full 




6.5 


13 
15 




6.0 


13 
15 


mA 
mA 


Power Supply Rejection Ratio, V+ 


Full 


76 


90 




70 


90 




dB ' 


Power Supply Rejection Ratio, V- 


Full 


80 


100 




80 


100 




dB 



NOTES: 1. Absolute maximunn ratings are limiting values, applied individually beyond which the serviceability of the 
circuit may be impaired. Functional operability under any of these conditions is not necessarily implied. 
2. Acquisition Time is defined for a change of channel ( + 10V on chan. 1,to OV on chan.16) with simultaneous 
change from HOLD to TRACK mode. Gain=1. 



2716 



© IC MASTER 1983 




HI-DAC 801 

12-Bit High Speed Monolitiiic 
Digital-tO'Analog Converter 



FEATURES 



DESCRIPTION 



• DAC 80 CONFIGURATION 

• MONOLITHIC CONSTRUCTION 

• FAST SETTLING 260ns (TYP) TO 0.01% 

• GUARANTEED MONOTONIC 0OCTO75OC 

• WAFER LASER TRIMMED 

• APPLICATION RESISTORS ON CHIP 

• ACCEPTS 6.2V OR 10.24V REFERENCE 

• DIELECTRIC ISOLATION (Dl) PROCESSING 



APPLICATIONS 



• HYBRID DAC 80 BY ADDING REFERENCE 

• HIGH SPEED, SUCCESSIVE APPROXIMATION 
TYPE ADC'S 

• HYBRID DATA ACQUISITION SYSTEMS 



The Harris HI-DAC 801 is a 12-bit, monolithic digital to analog 
converter. Available in dice form, it is suitable as a component 
in hybrid or compound monolithic circuits. The HI-DAC 801 is a 
current output device, and the addition of a precision voltage ref- 
erence makes it the functional equivalent of the popular DAC 
80CBI-I. Two versions are available-DAC 801-A, laser trimmed 
to accept a +6.2V reference; and DAC 801-B, laser trimmed to 
accept a +1 0.24V reference. Both versions are guaranteed mono- 
tonic over the O^^C to 750C temperature range. Digital input code 
may be complementary binary, complementary offset binary, 
or complementary two's complement binary logic. 

Fast output current settling of 260ns is achieved using Dielectric 
Isolation (Dl) processing to reduce internal parasitics. The speed 
of the HI-DAC 801 combined with its guaranteed monotonicity 
and maximum 1/2 LSB linearity error ((9^250C) make it an ideal 
choice for high speed successive approximation analog-to-digital 
converters. Laser trimmed application resistors are provided 
on-chip for use with an external output amplifier. They allow 
bipolar operation as well as +5V, +10V and +20V output ranges. 



PAD CONFIGURATION/CHIP 



FUNCTIONAL DIAGRAM 



158 
MILS 



BIT 12 BIT 11 . 



■ 10.24V REF INPUT 

■ 6.2V REF INPUT 



|---(LSB end: 

GROUND 



■ LO 

I bipolar£ junction 

I 6.2V BIPOLAR R 
I 10.24V BIPOLAR R 
I 10V SPAN 
I 2CV SPAN 
I SPAN JUNCTION 
_ GAIN 
VPS+ tm ™ ADJUST 



BIT 1 (MSB) ■ 



? ??????????? 



-;j-0 spMii 




-O JUNCTION 



A Summing Junction (normally an inverting input) is formed at the control 
amplifier's noninverting input, since the amplifier's feedback is inverted by 
an external transistor. 



© IC MASTER 1983 



2717 



ABSOLUTE MAXIMUM RATINGS 


(Referred to Ground) (Note 1). 




Power Supply Inputs 


Vps+ 


+18V Operating Temperature Range 


-550C to+125oC 




Vps- 


-18V 




Reference Inputs 


VREF(Hi) 


+Vps Storage Temperature Range 


-650C to+150OC 


Digital Inputs 


Bits 1-12 


OV TO+10V 





SPECIFICATIONS 



ELECTRICAL CHARACTERISTICS (@+250C,Vps+ = +15V. Vps- = -15V, Vref = 6.2V, 
(Note 5) Unless otherwise noted) 



PARAMETER 


CONDITION 


HI-DAC 801 


MIN 


TYP 


MAX 


UNITS 


INPUT CHARACTERISTICS 


Digital Inputs 
(TTL Compatible) 
Input Voltage 
Logic "1" 
Logic "0" 


Bit ON = "Logic 0" 
Bit OFF = "Logic 1" 


2.0 




0.8 


V 
V 


Input Current 
Logic "1" 
Logic "0" 


Guaranteed, not tested 






10 
-100 


/iA 

JUA 


Reference Inputs (Note 2) 

Input Voltage 

HI-DAC80I-A 
HI-DAC 801-B 

Input Resistance 

HI-DAC 801 -A 
HI-DAC 801-B 






6.2 
10.24 

12.4K 
20K 




V 
V 

a 


TRANSFER CHARACTERISTICS 


Resolution 








12 


Bits 


Linearity (Note 2) 
Integral 
Differential 

Monotonicity 


0OCto+75OCGUARAr 


TEED 






LSB 
LSB 


Offset (Note 5) 
Unipolar 
Bipolar 


All bits OFF 




0.005 


0.01 
0.1 


% FSR 
% FSR 


Gain Error 


All bits OFF 




0.05 


0.1 


% FSR 


Temperature Stability 
Offset Drift (Note 2) 
Unipolar 
Bipolar 


All bits OFF 




0.2 
2 




ppm 
FSR/OC 


Differential Nonlinearity (Note 21 
Gain Drift (Note 2) 


All bits ON 




0.5 
2 




Settling Time (Note 2) ,t 1/2 LSB 


All bits ON to OFF or 
OFF to ON 




260 


400 


ns 



2718 



® IC MASTER 1983 



SPECIFICATIONS (Continued) 



PARAMETER 



Power Supply Sensitivity (Note 2) 
Offset 
Unipolar 

+Vps 
-Vps 
Bipolar 



Gain 



ps 
'ps 



ps 
'ps 



OUTPUT CHARACTERISTICS 



CONDITION 



-Vps = -15 V 
+Vps = +15V 

-Vps = -15 V 
+Vps = +15V 

-Vps = -15 V 
+Vps = +15V 



HI-DAC80I 



MIN 



TYP 



MAX 



0.05 
0.05 

0.05 
0.05 

10 
10 



UNITS 



% FSR/ 
%AVps 



Output Current 












Unipolar 




1.6 


2 


2.4 


mA 


Bipolar 




iO.8 


1 1 


+ 1.2 


mA 


Output Resistance 


Not including 


1.6 


2 


2.4 


KH 


Output Capacitance 


Feedback Resistor 






10 


pF 


Compliance Limit (Note 2) 




-3 




+10 


V 


Glitch (Note 2) 






1600 




mV-ns 



POWER SUPPLY REQUIREMENTS 



15 . 


16.5 


V 


-15 


-11.4 


V 


5 




mA 


-10 




mA 



Vps+ 
Vps- 



+ (Note 4) 
Ips- (Note 4) 



'ps 



4.5 
-16.5 



NOTES: 

1. Absolute maximum ratings are limiting values, applied individually, beyond which the serviceability of the circuit 
may be Impaired. Functional operation under any of these conditions is not necessarily implied. 

2. See Definitions. 

3. FSR Is "full scale range" and is 2mA (120%) for current output. 

4. After 30 seconds warm-up. 

5. Parameters may vary according to die bonding scheme used. See recommended bonding diagram. 



DEFINITIONS OF SPECIFICATIONS 



DIGITAL INPUTS 

The HI-DAC 801 accepts digital input codes in complementary 
binary, complementary offset binary, and complementary two's 
complement binary. 





ANALOG OUTPUT 


DIGITAL 


Complementary 


Complementary 


Complementary 


INPUT 


Binary 


Offset 


Two's 






Binary 


Complement* 


MSB LSB 
000...000 
100...000 

0II...111 


+Full Scale 
MidScale-ILSB 
Zero 
+'/2 Full Scale 


+Full Scale 

-ILSB 
-Full Scale 
Zero 


-LSB 
-t-Full Scale 

Zero 
-Full Scale 



'Invert MSB with external inverter to obtain 
CTC Coding 



ACCURACY 

NONLINEARITY - Nonlinearity of a D/A converter is an im- 
portant measure of its accuracy. It describes the deviation from 
an ideal straight line drawn between zero (all bits OFF)and full scale 
(all bits ON). 

DIFFERENTIAL NONLINEARITY - For a D/A converter, it is 
the difference between the actual output voltage change and the 
ideal (1 LSB) voltage change for a one bit change in code. A 
Differential Nonlinearity of ±1 LSB or less guarantees monoto- 
nicity; i.e., the output always increases and never decreases for 
an increasing input. 



© 10 MASTER 1983 



2719 



DEFINITIONS OF SPECIFICATIONS (Continued) 



SETTLING TIME 

Settling time is the time required for the output to settle to with- 
in the specified error band for any input code transition. It is 
usually specified for a full scale or major carry transition. 

DRIFT 

GAIN DRIFT - The change in full scale analog output over the 
specified temperature range expressed in parts per million of full 
scale range per OC (ppm of FSR/OQ). Gain error is measured 
with respect to +250C at high (Th) and low (Tl) temperatures. 
Gain drift is calculated for both high (Th -250C) and low ranges 
(+250C -Tl) by dividing the gain error by the respective change 
in temperature. The specification is the larger of the two represen- 
ting worst case drift. 

OFFSET DRIFT - The change in analog output with all bits OFF 
over the specified temperature range expressed in parts per million 
of full scale range per OC (ppm of FSR/OC). Offset error is meas- 
ured with respect to +250C at high (Th) and low (Tl) tempera- 
tures. Offset Drift is calculated for both high (Th-250C) and low 
(+250C -Tl) ranges by dividing the offset error by the respective 
change in temperature. The specification given is the larger of the 
two, representing worst-case drift. 



POWER SUPPLY SENSITIVITY 

Power Supply Sensitivity is a measure of the change in gain and 
offset of the D/A converter resulting from a change in -15V, or 
+15V supplies. It is specified under DC conditions and expressed 
as parts per million of fullscale range per percent of change in power 
supply (ppm of FSR/%). 

COMPLIANCE 

Compliance voltage is the maximum output voltage range that 
can be tolerated and still maintain its specified accuracy. Com- 
pliance limit implies functional operation only and makes no 
claims to accuracy. 

GLITCH 

A glitch on the output of a D/A converter is a transient spike 
resulting from unequal internal ON-OFF switching times. Worst 
case glitches usually occur at half-scale or the major carry code 
transition from 011...1 to 100. ..0 or vice versa. For example, 
if turn ON is greater than turn OFF for Oil... 1 to 100...0, an 
intermediate state of 000. ..0 exists, such that, the output mo- 
mentarily glitches toward zero output. Matched switching times 
and fast switching will reduce glitches considerably. 



OPERATING INSTRUCTIONS 



BONDING AND GROUNDING 



In order to ensure proper operation of the HI-DAC 801, care must 
be taken to bond it correctly. Primary in these considerations is 
the selection of a grounding scheme. The best approach is to 
distinguish between a general power ground and a reference, or 
precision ground. Figure 1 shows the recommended connections 
in a system using an operational amplifier (such as the Harris HA- 
2600) to achieve voltage output. Notice that a ground plane ex- 
tends along the chip, and all currents on the device flow through 
this plane. Any errors which arise along this plane are most sig- 
nificant at the MSB end. It is best then to choose this end as the 
reference point for the output. The opposite, or LSB end of the 



plane, is bonded to the general system or power ground. Varying 
currents through this point will give rise to voltages above those 
defined as reference; however, the only current flowing into pre- 
cision ground is the constant current drawn by the reference plus 
the negligible bias current of the op-amp. Remember that the 
magnitude of the reference current changes when switching from 
unipolar to bipolar operation and requires readjustment of offset 
and gain. The finite resistance of the bond wires themselves intro- 
duce an error at both ends of the ground plane, and this effect is 
reduced by double bonding of the ground pads. For effective by- 
passing tie the bypass capacitors close to' the pads of the chip. 



.01 (J F 



POWER 
GROUND 





'Wo- 





10.24V 
VREFLO 



-O Vo 



I"' 



FIGURE 1. SYSTEM GROUNDING AND SUPPLY BYPASSING 



2720 



© to MASTER 1983 



OPERATING INSTRUCTIONS (Continued) 33 



OFFSET GAIN ADJUSTMENT 

The offset and gain of the HI-DAC 801 may be externally adjusted (see Packaging the HI-DAC 801) connect the potentiometers as 
via potentiometers. With the device mounted in a suitable package indicated in Figure 2. 



G F 






OUTPUT 


CONNECTIONS 


BIAS RESISTOR (Rb) 




RANGE 






UNIPOLAR 


TO +10V 


BTO E ; 


1.43KJ2 


MODE 


TO +5V 


B TO E ; A TO C 


1.11Kf2 


BIPOLAR 


+10V 


F TO G ; H TO 1 ; A TO E 


1.31K n 


MODE 


+5V 


F TO G ; H TO 1 ; B TO E 


1.16Kn 




2.5V 


F TO G ; H TO 1 ; B TO E 


.94Kn 






ATOC 





FIGURE 2. OFFSET GAIN ADJUSTMENT 



UNIPOLAR CALIBRATION 

Stepl: Unipolar Offset 

Turn all bits OFF 

Adjust Ri for zero volts output 

Step 2: Gain 

Turn all Bits ON 

Adjust R2 for an output of FS-1 LSB 
That is, adjust for: 
9.9976V forOV to+lOV Range 
4.9988VforOV to+5V Range 



BIPOLAR CALIBRATION 

Stepl: Bipolar Offset 

Turn all bits OFF 
Adjust RI for an output of: 
-10V for +10V Range 
-5Vfor+5V Range 
-2.5V forj:2.5V Range 

Step 2: Gain 

Turn Bit 1 (MSB) ON; all other bits OFF 
Adjust R2 for zero volts output 



® 10 MASTER 1983 



2721 




HI-DAC16B/C 

16 -Bit D to A Converter 



FEATURES 



DESCRIPTION 



• 16 BIT RESOLUTION 

• MONOLITHIC Dl BIPOLAR CONSTRUCTION 

• FAST SETTLING TIME 

• LOWDIFF. NONLIN. DRIFT 

• LOW GAIN DRIFT 

• ON-CHIPSPAN& OFFSET RESISTORS 

• TTL/5V-CM0S COMPATIBLE 

• LOW UNIPOLAR OFFSET 

• LOW UNIPOLAR OFFSET T.C. 

• EXCELLENT STABILITY 



IjUsTO .003%FS 
±0.3ppm/oc 
± 1ppm/0C 



<1/2LSB@+250C 
±0.2ppm/oC 



APPLICATIONS 



• HIGH RESOLUTION CONTROL SYSTEMS 

• HIGH FIDELITY AUDIO RECONSTRUCTION 

• PRECISION FUNCTION GENERATION 
AND INSTRUMENTATION 



PINOUT 



TOP VIEW 



-Vps - 


1 




40 


— P.S. GND 


CONTROL AMP, -IN — 


2 




39 


— +Vps 


CONTROL AMP,+IN — 


3 




38 


— BIT 1 (MSB) 


10V SPAN R — 


4 




37 


— BIT 2 


BIPOLAR 0/S — 


5 




36 


— BIT 3 


lOUT — 


6 




35 


— BIT 4 


N.C.— 


7 




34 


— BIT 5 


N.C._ 


8 




33 


— BIT6 


20V SPAN R — 


9 




32 


— BIT 7 


N.C. — 


10 




31 


— BITS 


Vref in — 


11 




30 


— BIT 9 


ANALOG GND — 


12 




29 


— BIT 10 


N.C. — 


13 




28 


— BIT 11 


N.C — 


14 




27 


— BIT 12 


N.C — 


15 




26 


— BIT 13 


N.C — 


16 




25 


— BIT 14 


GND TERM — 


17 




24 


— BIT 15 


±5V TERM R — 


18 




23 


— BIT 16 (LSB) 


±10VTERM R — 


19 




22 


— N.C. 


N.C — 


20 




21 


— N.C. 



The HARRIS HI-DAC16 Is a 16-bit, current output D/A converter. 
Single chip construction includes thin-film application resistors 
for use with an external op amp. These permit standard output 
voltage ranges of to +5V, to +10V, ±2.5V, ±5V and ±10V. 

Reference and span resistors have adjacent placement on the chip 
for optimum match and thermal tracking. Futhermore, this layout 
feature helps minimize the superposition error caused by self- 
heating of the span resistor, reducing it to less than 1/10LSB. 
This and other design innovations have produced exceptionally 
stable operation over temperature. Typical temperature coefficients 
are t 1ppm/0C for gain error and 0.3ppm/oC for differential non- 
linearity error. 

The internal architecture is an extension nf the earlier HI-562 
with several major improvements. All code dependent ground 
currents are steered to a separate non-critical path, namely, power 
supply ground. This feature allows the precision ground of the 
converter to be sensed with virtually zero voltage drop referred to 
system ground. The result is the complete elimination of non- 
linearities due to code dependent ground currents while yielding an 
extremely low unipolar offset of less than 1/2LSB. Because of this 
separation, the user may route the precision ground some distance 
to the system ground without degrading converter accuracy. 

The HARRIS HI-DAC16 delivers a, stable, accurate output with- 
out sacrifice in speed. Settling time to within ±0.003% is one 
microsecond. Overall performance of this monolithic device should 
be attractive for applications such as high fidelity audio and high- 
resolution control systems. 

Typical power requirement is 450 MW, from the +15V and -15V 
supplies combined. The package is a 40 pin ceramic DIP. Two 
accuracy grades are offered. 



2722 



® IC MASTER 1983 



Vref analog 

IN GND 



BIT 1 IN 
+Vps (MSB) 



BIT 16 IN 
(LSB) 



< AA/ 



CONTR, AMP,+IN (3> 




10V 
■\J SPAN R 



20V 

SPAN R 



3.3K 



CONTR. AMP, -IN O 



*R = 1,25Kn 



-Vps 



O 'OUT 
O P.S. GND 



O BIPOLAR 

0/S 



O +10VTERM 
SPAN R 

O ±5VTERM 
SPAN R 



"O GND TERM 



2 



Harris Semiconductor 



INTERFACE 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS (Referred to Ground) 



Power Supply Inputs Vps+ 
Vps- 
VREF(Hi) 
Bits 1 to 16 



Reference Inputs 
Digital Inputs 



Outputs 



+20V 
-20V 
±Vps 

-1V,+12V 
±Vps 



Power Dissipation Pd, Package 
Operating Temperature Range 

HI-DAC 16B/C 
Storage Temperature Range 



1000 mW 

0°C to +75°C 
-65°Cto+150^C 



ELECTRICAL CHARACTERISTICS (Ta = +25°C, Vps = +15V, Vref = +10V, unless otherwise specified) 







HI-DAC 168 


H 


l-DAC 16C 




PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


INPUT CHARACTERISTICS 






Digital Inputs 


Bit ON "Logic 1" 


















Bit OFF "Logic 0" 
















Input Voltage 


















Logic "1" 




2.0 






2.0 






V 


Logic "0" 


Over full 






0.8 






0.8 


V 




temp, range 
















Input Current 


















Logic "1" 






20 


500 




20 


500 


nA 


Logic "0" 




-50 






-50 






^^ 


Reference Input 


















Input Resistance 






10 






10 




Ki> 


Input Voltage 






10 






10 




V 



TRANSFER CHARACTERISTICS 



Resolution 


Over full temp, range 




16 






16 




Bits 


Nonlinearity 


(?H-25°C 
Over full temp, range 




+.0023 


+ .0045 




+ .0045 


1.009 


%FSR{3) 


Differential 
Nonlinearity 


(5M-25°C 
Over full temp, range 




t.0015 


1.003 




1.003 


1.006 


%FSR 


Relative Accuracy (5) 
Gain Error 
Bipolar Offset Error 
Unipolar Offset Error 


With 100S2(1%) Trim Resistors 
All Bits ON 

All Bits OFF 




+.1 
+ .5 
±;002 






+ .1 
1.5 
1.002 




%FSR 


Adjustment Range 
Gain 

Bipolar Offset 


See Operating Instructions 
Using trim potentiometers 
as sfiown in Figure 1 




.02 
2 






.02 
I 




%FSR 


Temperature Stability 

Gain Drift 12) 
Offset Drift (2) 

Unipolar Offset 

Bipolar Offset 
Differential Nonlinearity 


Drift specified with internal 
span resistors for voltage output 

Over full temp, range 

All Bits OFF 
Over full temp, range 




+1 

+.2 
+ .5 

±0.3 


+ 5 




11 

1.2 
1.5 

10.3 


±5 


ppm of 
FSR/°C 


Settling Time (2) 
to +.003%FS 


All Bits ON-to OFFor 
OFF-to-ON 




1.0 






1.0 




;is 



2724 



© IC MASTER 1983 



SPECIFICATIONS (continued) 







HIDAC 16B 


HIDAC 16C 




PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 


Glitch (2) 


From on ... 1 to 100 ... 
or 100 ...0 to Oil... 1 
(Ro = 2.5Kn) 




0.52 






0.52 






Power Supply (2) 


















Rejection Ratio, PSRR (3) 


















Vps^ 
Vps- 






1.5 
1.5 






1.5 
1.5 




ppm of 
FSR/% Vps 



OUTPUT CHARACTERISTICS 



Output Current 
Unipolar 
Bipolar 






-2 
t1 






-2 
+ 1 




mA 


Resistance 






2.5K 






2.5K 




ofims 


Capacitance 






10 






10 




pF 


Output Voltage Ranges 
Unipolar 

Bipolar 


Using external op amp 
and internal scaling 
resistors. See Figure 1 
and Table 1 for connections 




Oto 4S 
Oto+10 
l2.5 

±5 

+ 10 






Oto +5 
D to +10 

+ 2.5 
+ 5 
+ 1U 




V 


Compliance Limit (2) 




-3 




+ 10 


-3 




+ 10 


V 


Compliance Voltage (2) 


Over full temp, range 




±1 






+ 1 




V 


Output Noise 


0.1 to 5MHz (All Bits ON) 




30 






30 




/iVRMS 


POWER REOUIREMENTS 


Vps+(7) 
Vps- 


Over full 
temp, range 


13.5 
-13.5 


+15 
-15 


16.5 
-16.5 


13.5 
-13.5 


+ 15 
-15 


16.5 
-16.5 


V 


lps+(4) 
lps-(4) 


All Bits ON or OFF 
full temp, range 


-25 


+ 13 
-18 


+ 18 


-25 


+ 13 
-18 


+ 18 


mA 


Power Dissipation 






465 






465 




mW 



NOTES: 

1. Absolute maximum ratings are limiting values, applied 
individually, beyond which the serviceability of the circuit 
may be impared. Functional operation under any of these 
conditions is not necessarily implied. 

2. See Definitions. 

3. FSR is "full scale range" and is 20V for +10V range, 10V 
for +5V range, etc., or 2mA (+20%) for current output. 



4. After 30 seconds warm-up. 

5. Using an external op amp with internal span resistors and 
specified external trim resistors in place of potentiometers 
Rl and R2. Errors are adjustable to zero using H] and R2 
potentiometers. (See Operating Instructions Figure 2.) 



© IC MASTER 1983 



2725 



DEFINITIONS OF SPECIFICATIONS 



DIGITAL INPUTS 



DRIFT 



The HI-DAC 16B/C accepts digital input codes in binary format 
and may be user connected for any one of three binary codes. 
Straight Binary, Two's Complement, or Offset Binary. (See 
Operation Instructions). 



DIGITAL 
INPUT 


ANALOG OUTPUT 


Straight 
Binary 


Offset 
Binary 


Two's 
Complement * 


MSB LSB 
000...000 
100...000 
111...111 
011...111 


Zero 

'/2FS 
+FS- 1 LSB 
y2FS - 1 LSB 


-FS9(Full Scale) 

Zero 
+ FS - 1 LSB 
Zero - 1 LSB 


Zero 
-FS 
y2FS - 1 LSB 
+ FS- 1 LSB 


*lnvert MSB with external inverter to obtain Two's 
Complement Coding 



ACCURACY 

NONLINEARITY - Nonlinearity of a D/A converter is an 
important measure of its accuracy. It describes the deviation 
from an ideal straight line transfer curve drawn between zero 
(all bits OFF) and full scale (all bits ON). 

DIFFERENTIAL NONLINEARITY - For a D/A converter, it 
is the difference between the actual output voltage change and 
the ideal (1 LSB) voltage change for a one bit change in code. 
A Differential Nonlinearity of +1 LSB or less guarantees mono- 
tonicity; i.e., the output always increases and never decreases 
for an increasing input. 

SETTLING TIME 

Settling time is the time required for the output to settle to 
within the specified error band for any input code transition. 
It is usually specified for a full scale or major carry transition. 



GAIN DRIFT - The change in full scale analog output over the 
specified temperature range expressed in parts per million of 
full scale per °C (ppm of FSR/°C). Gain error is measured with 
respect to +25°C at high (Th) and low (Tl) temperatures. 
Gain drift is calculated for both high (Th-25°C) and low 
ranges (+25°C-Tl) by dividing the gain error by the respective 
change in temperature. The specification is the larger of the 
two representing worst case drift. 

OFFSET DRIFT - The change in analog output with all bits 
OFF over the specified temperature range expressed in parts 
per million of full scale range per °C (ppm of FSR/°C). Offset 
error is measured with respect to +25°C at high (T^) and low 
(Tl) temperatures. Offset Drift is calculated for both high 
(Th -25°C) and low (+25°C -Tl) ranges by dividing the 
offset error by the respective change in temperature. The 
specification given is the larger of the two, representing worst- 
case drift. 

POWER SUPPLY SENSITIVITY 

Power Supply Sensitivity is a measure of the change in gain and 
offset of the D/A converter resulting from a change in -15V, 
or +15V supplies. It is specified under DC conditions and 
expressed as parts per million of full scale range per percent of 
change in power supply (ppm of FSR/%). 

COMPLIANCE 

Compliance voltage is the maximum output voltage range that 
can be tolerated and still maintain its specified accuracy. Com- 
pliance limit implies functional operation only and makes no 
claims to accuracy. 

GLITCH 



A glitch on the output of a D/A converter is a transient spike 
resulting from unequal internal ON-OFF switching times. Worst 
case glitches usually occur at half-scale or the major carry code 
transition from 011...1 to 100... or vice versa. For example, 
if turn ON is greater than turn OFF for 011...1 to 100...0, an 
intermediate state, of 000...0 exists, such that, the output 
momentarily glitches toward zero output. Matched switching 
times and fast switching will reduce glitches considerably. 
(Calculated as the product of duration and amplitude.) 



2726 



® IC MASTER 1983 



OPERATING INSTRUCTIONS 



UNIPOLAR AND BIPOLAR VOLTAGE OUTPUT 
CONNECTIONS 



FIGURE 1 



OFFSil 
>OJUST 




GAIN AND ZERO CALIBRATION 

The HI-DAC16B/C input reference resistor, bipolar offset 
resistor and span resistors are optimized for excellent tracking 
over temperature. LASER trimming of the reference circuit 
resistors corrects the unipolar Gain and Offset errors to high 
accuracy. The remaining error can be adjusted with trimming 
potentiometers. The bipolar Gain and Offset errors are greater 
since the LASER correction is done in the unipolar mode, how- 
ever these too are easily adjusted. Figure 1 illustrates the 
connections for unipolar and bipolar operation. Trimming 
potentiometers Ri, R2, and R3 are required for adjustment. 



TABLE 1 





OUTPUT 


CONNECTIONS 




RANGE 


PIN5 


PIN4 


PIN9 


PIN B 






to 


to 


to 


to 


UNIPOLAR 


Oto+lOV 


D 


A 


N.C. 


19 


MODE 


to +5V 


D 


A 


PIN6 


« 


BIPOLAR 


±10V 


C 


N.C. 


A 


19 


MODE 


±5V 


C 


A 


N.C. 


18 




+2.5V 


C 


A 


6 


« 



UNIPOLAR CALIBRATION 



Stepi: Offset 

• Turn all bits OFF (00..0) 
•Adjust R3 for zero volts output 

Step 2: Gain 

• Turn all bits ON (11. .1) 

• Adjust R2 for an output of FS'1 LSB 
That is, adjust for: 

9.999847 for+lOV range 
4.999924 for+SV range 



BIPOLAR CALIBRATION 



Step 1: Offset 

Turn all bits OFF (00..0) 
Adjust R] for an output of 
-10V for± 10V range 
-5V for ± 5V range 
-2.5V for ± 2.5V range 

Step 2: Gain 

Turn all bits ON (11..1) 
Adjust R2 for FS-1 LSB output 
That is, adjust for: 

9.999695 for ±10V range 
4.999847 for± 5V range 
2.499924 for ± 2.5V range 



^Connect an external 1.1 K ohm resistor to ground. 



OTHER CONSIDERATIONS 



GROUNDS 

The HI-DAC16 has two ground terminals, pin 12 (REF GND) 
and pin 40 (PWR GND). These should not be tied together 
near the package unless that point is also the system signal 
ground to which all returns are connected. (If such a point exists, 
then separate paths are required to pins 12 and 40). 



The current through pin 12 is near-zero DC*, but pin 40 carries 
up to 1.75mA of code - dependent current from bits 1, 2, and 3. 
The general rule is to connect pin 12 directly to the system 
signal, or analog ground. Connect pin 40 to the local digital 
or power ground. Then, of course, a single path must connect 
the analog/signal and digital/power grounds. 



© 10 MASTER 1983 



2727 



OTHER CONSIDERATIONS (continued) 



•Current cancellation is a two-step process in which code- 
dependent variations are eliminated, then the resulting DC 
current is supplied internally. First, an auxiliary 13-bit R-2R 
Ladder is driven by the complement of the DAC's input code. 
Together the main and auxiliary ladders draw a continuous 
3.25mA from the internal ground node, regardless of input code. 
Part of this DC current is supplied by the zener voltage refer- 
ence, and the remainder is sourced from the positive supply 
via a current mirror which is laser trimmed for zero current 
through the external terminal (pin 12). 



COMPOSITE AMPLIFIER 

It is desirable at times to have an output amplifier which 
combines the qualities of those op-amps available to the designer. 
For instance one may wish to combine the excellent front-end 
characteristics of the HA-5130 with the speed of a device such 
as the HA-2540 (tjettle =250ns to 0.1%). In these instances 
there is the option of the composite amplifier. The basic 
configuration is shown in Figure 2. 



LAYOUT 



COMPOSITE AMPLIFIER 



Connections to pin 6 (Iqut) HI-DAC16 are most 

critical for high speed performance. Output capacitance of the 
DAC is only lOpF, so a small additional capacitance will alter 
the op amp's stability and affect settling time. Connections to 
pin 6 should be short and few. Component leads should be 
short on the side connecting to pin 6. 



BYPASS CAPACITORS 

Power supply bypass capacitors on the op amp will serve the 
HI-DAC16 also. If no op amp is used, a O.OIuF ceramic capa- 
citor from each supply terminal to pin 40 is sufficient, since 
supply current variations are small. 





-O Vo 



FIGURE 2 



SELECTING AIM OPERATIONAL AMPLIFIER 

The HI-DAC16 is a high resolution, high accuracy DAC. Many 
applications will require an QP-Amp used as a current-to-voltage 
converter at the DAC output. (Careful consideration should be 
given the choice of this amplifier as a poor selection can seriously 
degrade the inherent qualities of the DAC.) 



The HA-5130 is an excellent choice to maintain high accuracy 
with an average Offset Drift of only 0.4/iV/°C leading to an 
error over temperature of 30a/V (.0003% FSR for a lOV FS). 
Inital offset and bias current are 10/iV and 3nA respectively, 
while input noise current of 0.2pAA/H7. Settling time is 
adequate for most audio applications. (1 1/is typ. to 0.1%). 



The composite amplifier may be used to achieve a compromise 
depending on the requirements of a design. Trade-offs in per- 
formance can be made and the following equations apply: 



Offset; VqfF = V0FF2 + VqfFI 
AOI 

Bias; IbiaS " IBIAS2 + 'BIASI 

Gam; ^ ^ ^^^^^ ^ ^^^^^^ ^ Avi(S)] 



The amplifier A2 should be of wide bandwidth and fast settling 
time. 



2728 



© IC MASTER 1983 



PACKAGE DIMENSIONS 



SI 




LEAD 
COUNT 


DIM. 
A 


Dm. 

B 


DIM. 
C 


DIM. 
D 


DIM. 
E 


DIM. 
F 


DIM. 
G 


DIM. 
H 


DIM. 
L 


DIM. 
Q 


DIM. 
S 


40 




,014 


008 




500 


590 


.030 


.100 


120 


015 






225 


023 


015 


1 990 


610 


620 


070 


BSC 


.200 


075 


.098 



o 

Z3 
•D 
C 

o 
o 

"e 

(D 
CO 

(0 



CO 
X 



ORDERING INFORMATION 



MODELNUMBER 


OPERATING TEMP. RANGE 


NONLINEARITY 


HI-DAC16B-5 


0°C to +75°C 


±.003% FSR 


HI-DAC16C-5 


0°Cto+75°C 


±.006% FSR 



© IC MASTER 1983 



2729 



HI-5660 

High Speed Monolithic 
Digital'tO'Analog Converter 



FEATURES 



DESCRIPTION 



VERY HIGH SPEED: SETTLES TO 1/2 LSB IN 350ns 
FULL SCALE SWITCHING 
TIME 30ns 

MONOTONICITY GUARANTEED OVER 
TEMPERATURE 

1/2 LSB MAX NONLINEARITY GUARANTEED 
OVER TEMPERATURE 



LOW GAIN DRIFT 

LOW POWER DISSIPATION 

LOW COST 

LOW psr 



10ppm/oC 
230mW 

1ppm/%PS 



APPLICATIONS 



• CRT DISPLAYS 

• HIGH SPEED A/D CONVERTERS 

• VIDEO SIGNAL RECONSTRUCTION 

• WAVEFORM SYNTHESIS 



The HI-5660. 12-bit digital-to-analog converter is a similar second 
source to the AD566, yet offers improved power dissipation per- 
formance. 

Twelve high speed bipolar switches route the current from each 
bit cell either to ground or to the laser trimmed thin film R-2R 
ladder network, depending on the logic level of the bit input. 

The Harris dielectric isolation process is used to fabricate the HI- 
5660, providing minimal stray capacitance and latch-free operation. 
The chips are trimmed at the wafer level to a maximum linearity 
error of 1/4 LSB at 250C, making the HI-5660 an ideal choice when 
both high speed and high accuracy are essential. 

For a +10V reference, Harris recommends using the HA-1610. 
This highly stable precision reference is laser trimmed to an absolute 
accuracy of ± 0.05% and a temperature coefficient of ± 3ppm/0C. 
For designs where an external reference is impractical, the Hl- 
565A DAC is recommended. 

The HI-5660 is available in both commercial and military tempera- 
ture grades, and is packaged in a ceramic 24 pin DIP. Power re- 
quirement is +5V, -15V. 



PINOUT 



FUNCTIONAL DIAGRAM 



TOP VIEW 
24 LEAD DIP 



Vps+ II 
N.C. C 2 

ANALOG GND □ 3 
AMP SUMMING r- . 
JUNCTION 
Vref(HI IN) C 

Vps- C 

BIPOLAR R IN C 

N.C. C 

IDACOUT [I 

10V SPAN R C 

20V SPAN R C 

DIGITALGND C 




□ BIT 1 (MSB) IN 

□ BIT 2 IN 

□ BIT 3 IN 

□ BIT4IN 

□ BIT 5 IN 
19 □ BIT6IN 
18 □ BIT 7 IN 
17 □ BITS IN 
16 □ BIT9 IN 
15 □ BIT 10 IN 
14 □ BIT 11 IN 
13 □ BIT 12(LSB) IN 



AMP 
SUMMING * 

JUNCTION O 

5 19.95K 

VrefO — VW^ 

(HII IN 



VREFQ vVA- 

(LO) IN 



BIPOLAR R IN 

or 



_q20V 
^ SPAN R 



_Q10V 

^ SPAN R 




DAC 

'out = 

4x Iref xCODE 



06 012 024 

Vps- POWER MSB 

GND IN 



'DAC 
"VOUT 



" V 



2730 



© IC MASTER 1983 




H 1-7541 



12-BIT MULTIPLYING 
MONOLITHIC DIGITAL 
TO ANALOG CONVERTER 



FEATURES 



DESCRIPTION 



• FULL FOUR QUADRANT MULTIPLICATION 

• .01% RELATIVE ACCURACY OVER TEMPERATURE 

• LOW OUTPUT CAPACITANCE lOOpF MAX 

• TTL/CMOS COMPATIBLE 

• MONOLITHIC CONSTRUCTION 

• VERY LOW OUTPUT LEAKAGE CURRENT ilOOnAMAX 

• LOW GAIN ERROR 0.1% 



The Harris HI-7541 is a 12-Bit Monolithic Digital to Analog 
converter, offering full four quadrant multiplying capability. 
The chip features dielectrically isolated CMOS technology 
to assure fast settling time and freedom from latch-up. Inclu- 
ded are thin film ladder and applications resistors, laser trimmed 
for accuracy over the full operating temperature range. 

The HI-7541 is recommended as a high performance direct 
replacement for the AD7541 device. It operates on a single 
+15V supply and is available in an 18-pin ceramic package 
as well as in dice form. Screening to MIL-STD-883 method 
5004 class B is available. 



APPLICATIONS 



o PROGRAMMABLE GAIN AMPLIFIERS 

• PROGRAMMABLE FUNCTION GENERATION 



PINOUT 



FUNCTIONAL DIAGRAM 



TOP 



vref O- 



'OUT! □ 
'0UT2C 
GNDC 
(MSB) BIT Id 
BIT 2 CI 
BIT 311 
BIT4II 
BIT5CI 
BIT6C 



HI-7541 



□ rpeedback 

□ Vref in 

□ Vdd+ 

□ BIT 12 (LSB) 

□ BIT 11 

□ BIT 10 

□ BIT 9 

□ BITS 

□ BIT 7 




DIGITAL INPUTS IDTL.TTL. CMOS COMPATIBLE) 
LOGIC: A SWITCH IS CLOSED TO IflUTI f OR ITS 
OIGITAL INPUT IN A HIGH (LOGIC II STATE. 



Copyright (c) Harris Corporation 1982 
© IC MASTER 1983 



2731 



SPECIFICA TIONS 



ABSOLUTE MAXIMUM RATINGS (Referred to Ground)1 














Power Supply Inputs Vqq 

Rpfprpnrp'lnniitc VRFP {WW 

Digital Input Range Bits 1-12 
Output Voltage (Pins 1 and 2) 


+17V 
+ 25V 
Vqq to GNO 

-lOOmV to Vqd 




Power Dissipation (Package) up to +750C , 450mW 

Derate above +750C by 6mW/0C. 

Operating Temperature Range 
HI-7541SD/TD/S0 -550C to +1250C 
HI-7541AD/BD -250Cto+850C 
HI-7541JN/KN/J0 QOC to +750C 
HI-7541SD/883 AND TD/883. -550C to +1250C 
- Storage Temperature Range -650C to +1500C 


ELECTRICAL CHARACTERISTICS ( @25oc, Vqd 


= +15V, Vref - Unless otherwise noted) 








HI-7541KN/BD/TD 


HI-7541JN/AD/SD/JO/SO 








PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


MIN 


TYP 


MAX 


UNITS 






INPUT CHARACTERISTICS 


















Digital Inputs 


Bit ON = "Logic 1" 
Bit OFF = " Logic 0" 




















Input Voltage 
Logic 1 
Logic 




2.4 




0.8 


2.4 




0.8 


V 
V 






Input Current 
Logic 1 
Logic 


V|N=15V 
ViN=OV 






1 

-1 






1 

-1 


n^ 
^I^ 






Reference Input 
Input Resistance 
Input Voltage 




5 

-10 


9 


20 
+10 


5 

-10 


9 


20 
+10 


Kn 

V 






TRANSFER CHARACTERISTICS 


















Resolution 


Over Full Temp. Range 


12 






12 






Bits 






Integral (2) 
Nonlinearity 


@+250C 
Over Full Temp Range 






+.01 






+.02 


'%FSR 






Differential (2) 
Nonlinearity 


@+250C 
Over Full Temp Range 






+ 01 






+.02 


%FSR 






Gain Error (2) 


@+250C 
Over Full Temp. Range 






+.01 
+0.15 






+0.2 
+0.25 


%FSR 






Gain Tempco (2)(5) 


Over Full Temp. Range 






+5 






+5 


PPM/OC 






Settling Time (2) (5) 
to +1/2 LSB 








1 






1 


/iS 






PSRR (2) 


14.5V<Vdd<15.5V;250C 
Over Full Temp. Range 




.01 


+.01 
1.02 




.01 


+.01 
+.02 


%FSR/ 
%AVdd 






OUTPUT CHARACTERISTICS 


















Output (2) 
Leakage Current 


VREF=i10V 
(s)+250C 
Over Full Temp. Range 






+50 
+100 






+50 
+100 


nA 
nA 






Capacitance (2) (5) 








100 






100 


pF 






Feed Through (2)(5) 


VreF = 20 Vpp@ 10kHz 






+1 






+1 


mVpp 






POWER REQUIREMENTS 




















Vdd 




+5 


+15 


+16 


+5 


+ 15 


+16 


V 






IDD (3) 








2 






2 


mA 





2732 



© IC MASTER 1983 





HD-0165 




Keyboard Encoder 



FEATURES 



DESCRIPTION 



• STROBE OUTPUT 

• KEY ROLLOVER OUTPUT 

• EXPANDABLE: 2 PACKAGES REQUIRED FOR FULL 

TELETYPEWRITER, EIGHT-BIT ENCODING 

• SINGLE +5.0V SUPPLY REQUIRED 

• DTL/TTL OUTPUTS 

• MONOLITHIC RELIABILITY 



APPLICATIOniS 



• MICROPROCESSOR DATA ENTRY (16 KEY TO 

HEX CODE) 

• BCD DATA ENTRY 

• TYPEWRITER TYPE KEYBOARDS 

• CONTROL PANELS 



The HD-0165 Keyboard Encoder is a 16 line to four-bit parallel 
encoder intended for use with manual data entry devices such as 
calculator or typewriter keyboards, in addition to the encoding 
function, there is a Strobe output and a Key Rollover output 
which energizes whenever two or more inputs are energized 
simultaneously. Any four-bit code can be implemented by 
proper wiring of the input lines. Inputs are normally wired 
through the key switches to the +5.0\/ power supply. Full 
typewriter keyboard encoding up to eight bits can be accomp- 
lished with two Encoder circuits by the use of double pole key 
switches or single pole switches with two isolation diodes per 
key. Outputs will interface with all popular DTL and TTL logic 
families. The circuit is packaged in a hermetic 24-pin dual-in- 
line package and operates over the temperature range of QOC 
to +750C. 



PINOUT 



EQUIVALENT CIRCUITS 



Section 11 for Packaging 



INPUT 



Top View 




PARALLEL 
2/ BINARY 
INPUT 




OUTPUT 



2Kfi 



ANY OUTPUT 



• EQUIVALENT RESISTORS FOR OTHER 

INPUTS ARE BETWEEN THESE TWO VALUES 



® IC MASTER 1983 



2733 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS 



Supply Voltage 
Input Voltage 
Output Voltage 



+7.0V 
+5.5V 
+5.5V 



Output Current 
Storage Temperature 
Operating Temperature (Case) 



30mA 

-65Oto+150OC 
0OCto+75OC 



ELECTRICAL CHARACTERISTICS 

Test Conditions: Vqq = +5.0V±5% 

"•"Case = 0°C to +75OC 
Unless otherwise specified 



PARAMETER 


SYM. 


LIMITS 


UNITS 


TEST CONDITIONS 


MIN. 


TYP. 


MAX. 


Input Current "1" 


>IH 






17 


mA 


V|N = +5.0V 


"0" 

Output Voltage 

"1" 


Vol 

VOH 


+2.4 


+0.2 
+4.0 


+0.4 
+0.4 


V 


V|H = +4.5V loL=10mA 
V|H = +3.5V loL = 3.?mA 
V|L = Open Circuit, Iq^ = -240yA 


Operating 

Power Supply Current 

Maximum 


'cc 

'CCM 






52 
88 


mA 
mA 


One Input at+5.25V 
Alllnputsat+5.25V 


Skew Time (Note 1) 


TSK 




80 


200 


ns 


Tcase=250C 
Vcc = V,N = +5.0V 
Cl< 50pF 



D.C. 



A.C. 



NOTE: (1 ) Skew time is the maxim um t ime d ifferential between propagation delay times of any 
outputs including strobe and KpQ. 



TRUTH TABLE 



1 2 3 4 5 6 


7 


INPUTS 
8 9 10 11 


12 


13 


14 15 


16 


1 


2 


3 


OUTPUTS 
4 St. 


Kro 


L L L L L L 














H 


H 


H 


H 


H 


H 


H L L L L L 














H 


H 


H 


H 




H 
















L 


H 


H 


H 




H 
















H 




H 


H 




H 
















L 




H 


H 




H 
















H 




L 


H 




H 
















L 




L 


H 




H 
















H 




L 


H 




H 
















L 




L 


H 




H 
















H 




H 






H 
















L 




H 






H 
















H 




H 






H 
















L 




H 






H 
















H 




L 






H 
















L 




L 






H 












L H 




H 




L 






H 












L L 


H 


L 




L 






H 


ANY TWO OR MORE HIGH 














X 


X 


X 


X 




L 



INPUTS: L = Open Circuit or <+ 1.0V H = > +4.5V Current Source 
OUTPUTS: L = <+0.4V H = > +2.4V X = Erroneous Data 



2734 



© IC MASTER 1983 



^ h-lARRIS 


HC-5502 




SLIC-LC Subscriber Line 




1 ntp tfsii*P i mu it 


Preliminary 





FEATURES 



DESCRIPTION 



• MONOLITHIC INTEGRATED DEVICE 

• UNIQUE Dl HIGH VOLTAGE PROCESS 

• COMPATIBLE WITH WORLDWIDE PABX 
PERFORMANCE REQUIREMENTS 

• CONTROLLED SUPPLY OF BATTERY FEED 
CURRENT FOR SHORT LOOPS 

• INTERNAL RING RELAY DRIVER 

• LOW POWER CONSUMPTION DURING STANDBY 

• SWITCH HOOK, GROUND KEY AND RING TRIP 
DETECTION FUNCTIONS ■ 

• SELECTIVE DENIAL OF POWER TO SUBSCRIBER 
LOOPS 



APPLICATIONS 



The HARRIS SLIC-LC incorporates many of the BORSHT 
functions on a single IC chip. This includes DC battery 
feed, a ring relay driver, supervisory and hybrid functions. 
Using the unique HARRIS dielectric isolation process, the 
SLIC-LC can operate directly with a wide range of station 
battery voltagees. 

The SLIC-LC also provides selective denial of power. If the 
PABX system becomes overloaded during an emergency, 
the SLIC-LC will provide system protection by denying 
power to selected subscriber loops. 

The HARRIS SLIC-LC is ideally suited in the design of new 
digital PABX systems, by eliminating bulky, expensive 
hybrid transformers. 

SLIC-LC is available in either a 24 pin dual-in-line plastic 
or ceramic package. 



• SOLID STATE LINE INTERFACE CIRCUIT FOR 
DIGITAL PBX SYSTEMS 



PINOUT 



FUNCTIONAL DIAGRAM 



TOP VIEW 



UNG VOLTAGE 



T 
R 

CAP r 

CAP 3 
DG 
RS 
RD 



TF a 

RF 



Vb- 
BG 



II 



"^^^ 

2 23 

3 22 

4 21 

^ HC-5502 20 

6 (SLIC-LC) 19 

7 18 

8 17 

9 16 

10 15 

11 14 

12 13 



□ tx 

U AG 

□ CAP 4 

□ Rx 

□ +IN 

□ -IN 

□ OUT 

□ CAP 2 

□ RC 

□ PD 

□ GKD 

□ SHD 



' RELAY -VW T 



PROTECTION ""^VBAT 



o /W- 



POWER DENIAL >- 



lATTEHY 




'Optional 



SLIC MICROCIRCUIT 



Copyright ©Harris Corporation 1981 



® IC MASTER 1983 



2735 





1 1 A IT r n ii 

HC-5504 




SUC-LC Subscriber 


Preliminary 


Line Interface Circuit 



FEATURES 



DESCRIPTION 



• MONOLITHIC INTEGRATED DEVICE 

• UNIQUE Dl HIGH VOLTAGE PROCESS 

• COMPATIBLE WITH WORLDWIDE PABX 
PERFORMANCE REQUIREMENTS 

• CONTROLLED SUPPLY OF BATTERY FEED 
CURRENT FOR SHORT LOOPS 

• INTERNAL RING RELAY DRIVER 

• ALLOWS INTERFACING WITH NEGATIVE 
SUPERIMPOSED RINGING SYSTEMS 

• LOW POWER CONSUMPTION DURING STANDBY 

• SWITCH HOOK, GROUND KEY AND RINGTRIP 
DETECTION FUNCTIONS 

• SELECTIVE DENIAL OF POWER TO SUBSCRIBER 
LOOPS 



APPLICATIONS 



The HARRIS SLIC-LC Incorporates many of the BORSHT 
functions on a single IC chip. This includes DC battery 
feed, a ring relay driver, supervisory and hybrid functions. 
Using the unique HARRIS dielectric isolation process, the 
SLIC-LC can operate directly with a wide range of station 
battery voltages. 

The SLIC-LC also provides selective denial of power. If the 
PABX system becomes overloaded during an emergency, 
the SLIC-LC will provide system protection by denying 
power to selected subscriber loops. 

The HARRIS SLIC-LC is ideally suited in the design of new 
digital PABX systems, by eliminating bulky, expensive 
hybrid transformers. 

SLIC-LC is available in either a 24 pin dual-in-line plastic 
or ceramic package. The SLIC-LC is also available in die form. 



• SOLID STATE LINE INTERFACE CIRCUIT FOR 
DIGITAL PBX SYSTEMS 



PINOUT 



FUNCTIONAL DIAGRAM 



TOP VIEW 



T 
R 

RFS 

VB+ C 

CAP 3 C 
DG C 
RS 
RD 
TF 
RF 
Vb- 
BG 



C 
C 



5 HC-5504 20 

6 (SLIC-LC) 19 

1 . 18 

8 17 

9 16 

10 15 

11 14 

12 13 



DETECTION 
GROUND KEY 



□ tx 

□ AG 

□ CAP 4 

□ Rx 

□ -IN 

□ OUT 

□ CAP 2 

□ RC 

□ PD 

□ GKD 

□ SHD 




Copyright (C) Harris Corporation 1982 



2736 



© IC MASTER 1983 





HC-5116A/5117A 




/5156A 


MUVMiyUC 


Monolithic CODECS 



FEATURES 



DESCRIPTION 



LOW OPERATION POWER 50mWTYP. 
+5V OPERATION 

TTL COMPATIBLE DIGITAL INTERFACE 

INTERNAL PRECISION REFERENCE ON HC-5116A, 
HC-5117AandHC-5156A 

INTERNALSAMPLE AND HOLD CAPACITORS 

INTERNAL AUTO-ZERO CIRCUIT 

HC-5116A-/J-LAW CODING (SIGN PLUS MAGNITUDE 
FORMAT) 

HC-51 1 7A-Ai-LAW, D3 COMPATIB LE FO RMAT 

HC-5156A-A-LAW CODING 

SYNCHRONOUS OR ASYNCHRONOUS OPERATION 



The HC-51 16A, HC-51 17A and HC-5156A are monolithic PCM 
CODECS implemented with double-poly CMOS technology. 
The HC-5116A and HC-5117A are intended for /i-law applica- 
tions. The HC-51 17A has a D3 compatible format for line card 
compatibility with the HC-5156A. 

Each device contains separate D/A and A/D circuitry, all neces- 
sary sample and hold capacitors, and internal auto-zero circuits. 
Each device also contains a precision internal voltage reference, 
eliminating the need for an external reference. There are no 
internal connections to pins 15 or 16, making them directly inter- 
changeable with CODECS using external reference components. 

All devices are intended to be used with the HC-5512 monolithic 
PCM filter which provides the input anti-aliasing function for the 
encoder and smooths the output of the decoder and corrects 
for the sin x/x distortion introduced by the decoder sample and 
hold output. 



PINOUT 



FUNCTIONAL DIAGRAM 



ANALOG INPUT- 



MASTER CLOCK — 



XMITSYNC — 



XMITCLOCK-i- 



DIGITAL OUTPUT— 




jl^NC 
iiNC 

JI aNALOG GROUND 
13 

I— ANALOG OUTPUT 

— DIGITAL INPUT 
I^DIGITAL GROUND 

— RCV CLOCK 
9 

— RCV SYNC 



ANALOG 
INPUT 



ANALOG^ 
OUTPUT 



TOP VIEW 



Copyright© Harris Corporation 1982 



s& H 

A/D 



COMPARATOR 



SERIAL 
BUFFER 



^DIGITAL 
OUTPUT 



. XMIT CLOCK 

XMIT SYNC 
MASTER 
' CLOCK 
RCV CLOCK 
RCV SYNC 



DIGITAL 
INPUT 



© IC MASTER 1983 



2737 



HC-5512/5512A 

PCM Monolithic Filter 



FEATURES 



DESCRIPTION 



o 

ZJ 
■D 
C 

o 
o 

E 

0) 
CO 
w 

x_ 
CO 

I 



• EXCEEDS ALL D3/D4 AND CCITT SPECIFICATIONS 

• +5V,-5V POWER SUPPLIES 

• LOW POWER CONSUMPTION: 

45mW (600n OdBm LOAD) 
30mW (POWER AMPS DISABLED) 

• POWER DOWN MODE: 0.5mW 

• 20dB GAIN ADJUST RANGE 

• NO EXTERNAL ANTI-ALIASING COMPONENTS 

• SIN x/x CORRECTION IN RECEIVE FILTER 

• 50/60HZ REJECTION IN TRANSMIT FILTER 

• TTL AND CMOS COMPATIBLE LOGIC 

• ALL INPUT PROTECTED AGAINST STATIC DISCHARGE 
DUETO HANDLING 



PINOUT 



DUAL-IN-LINE PACKAGE 
TOP VIEW 



VFxl+ 1 




— VFxO 


VFxl 






GSx— 2. 




14 

— CLKO 


VFnO_l 






PWRI ^ 




i2-CLK 


PWRO+— ^ 




I2_GNDD 


PWR0--J1 






Vbb— ^ 




— Vcc 



The HC-5512/HC-5512A filter Is a monolithic circuit contain- 
ing both transmit and receive filters specifically designed for 
PCM CODEC filtering applications in 8kHz sampled systems. 

The filter is manufactured using double-poly silicon gate 
CMOS technology. Switched capacitor integrators are used 
to simulate classical LC ladder filters which exhibit low 
component sensitivity. 

TRANSMIT FILTER STAGE 

The transmit filter is a fifth order elliptic low pass filter in 
series with a fourth order Chebyshev high pass filter. It pro- 
vides a flat response in the passband and rejection of signals, 
below 200Hz and above 3.4kHz. 

RECEIVE FILTER STAGE 

The receive filter is a fifth order elliptic low pass filter designed 
to reconstructthe voice signal from the decoded/demultiplexed 
signal which, as a result of the sampling process, is a stair- 
step signal having the inherent sin x/x frequency response. 
The receive filter approximates the function required to com- 
pensate for the degraded frequency response and restore 
the flat passband response. 



FUNCTIONAL DIAGRAM 



VFxl-. 
VF.I+. 



i>4 



TRANSMIT FILTER 



I 



PWRO-2 ^ \ 1 



HLOW 
Fll 



H 



I 



CLOCK 
SELECT 
LOGIC 



• 1 



RECEIVE FILTER J 



PWRI VFrO 



-p p 

Vcc ^BB 

FIGURE 1 



Copyright (C) Harris Corporation 1982 



2738 



© IC MASTER 1983 




All-Digital Continuously 
Variable Slope Delta Modulator (CVSD) 



FEATURES 



• REQUIRES FEWER EXTERNAL PARTS 

• LOW POWER DRAIN: 6mW FROM SINGLE 5V-7V 

SUPPLY 

• TIME CONSTANTS DETERMINED BY CLOCK 

FREQUENCY; NO CALIBRATION OR DRIFT 
PROBLEMS; AUTOMATIC OFFSET ADJUST- 
MENT 

• HALF DUPLEX OPERATION BY DIGITAL CONTROL 

• FILTER RESET BY DIGITAL CONTROL 

• AUTOMATIC OVERLOAD RECOVERY 

• AUTOMATIC "QUIET" PATTERN GENERATION 

• AGC CONTROL SIGNAL AVAILABLE 



APPLICATIONS 



• VOICE TRANSMISSION OVER DATA CHANNELS 

• VOICE ENCRYPTION/SCRAMBLING 

• VOICE I/O FOR DIGITAL SYSTEMS 

AND SPEECH SYNTHESIS 

• AUDIO MANIPULATIONS: DELAY LINES, TIME 

COMPRESSION, ECHO GENERATION/ 
SUPPRESSION, SPECIAL EFFECTS, ETC. 



The HC-55516 Is a half duplex modulator/demodulator CMOS 
Integrated circuit used to convert voice signals into serial NRZ 
digital data, and to reconvert that data into voice. The conver- 
sion is by delta modulation, using the continuously variable 
slope (CVSD) method of companding. 

While signals are compatible with other CVSD circuits, internal 
design is unique. The analog loop filters have been replaced by 
digital filters, using very low power, and requiring no external 
timing components. This approach allows inclusion of many 
desirable features which would be difficult to implement using 
other approaches. 

The HC-55516 has internal time constants optimized for a 16K 
bits/sec data rate and is usable from 9K bits/sec to above 64K 
bits/sec. The unit is available in 14 pin DIP (HC1) packages 
in two temperature ranges: -550C to +1250C (-2 or -8), and 
-40OC to +850C (-9). It is also available in chip form. 



PINOUT 



FUNCTIONAL DIAGRAM 



Section 1 1 for Packaging 



Top View 



vdd|j_ 




hJ Dig. Out 


Sig. Gnd.|T 




jT|fz 


Aud. Out [T 




~n\ Dig. In 


AGC |T 




TT] Apt. 


Aud. In [T" 




To] Enc-Dec 


NC[T 




T] Clock 


NC pT 




T\ Gnd 




© IC MASTER 1983 



2739 




SEMICONDUCTOR 

A DIVISION OF HARRIS CORPORATION 



Preliminary 



HC-5541 

Pulse /Tone Dialer 



FEATURES 



DESCRIPTION 



GENERATES EITHER DTMF TONES OR DIAL PULSES 

INTERFACES WITH STANDARD KEYPADS (FORM A 
CONTACT OR 2 OF 8) OR 4 BIT CMOS uP BUS. 

17 DIGIT LAST NUMBER REDIAL 

1mA PEAK OUTPUT DRIVE 

USES INEXPENSIVE 3.5795 MHz TV COLOR BURST 
CRYSTAL 

REGULATED TONE OUTPUT AMPLITUDES 

2.5 TO 6V OPERATION 

TONE FREQUENCIESWITHIN 1% 

SINGLE TONE CAPABILITY 

MEETS INTERNATIONAL STANDARDS FOR TONE 
LEVELS AND DISTORTION 

AUTOMATIC RECEIVER MUTE OUTPUT DURING 
SIGNALING 

MUTE, PAUSE AND CANCEL SPECIAL FUNCTIONS 



The HC-5541 is a CMOS monolithic integrated circuit telephone dialer design- 
ed for applications where it is needed to produce either dial pulses or dial tones 
at will. 

OUTPUTS 

The HC-5541 outputs dial pulses or dial tones on separate pins. Sixteen 
standard DTMF frequency pairs are provided, accurate to ±1%. For pulse out- 
puts, the make/break ratio can be selected with a single pin to conform to 
either US or European standards. A mute output is provided to mute the 
receiver while output signals are being generated. 

INPUTS 

Data can be entered from a 4x4 keypad or a 4 bit microprocessor bus. In addi- 
tion, the circuit can be driven from a standard 3x4 keypad plus one additional 
switch to select tones or pulses. Selection of keypad or microprocessor entry is 
controlled from a single pin. 

The pulse/tone dialer is available in either a 20 pin dual-in-line plastic or 
ceramic package. 



PINOUT 



FUNCTIONAL DIAGRAM 



TOP VIEW 



v+ c: 


1 ^ 


20 


□ 


TONE OUT 


SF c 


2 


19 


□ 


PULSE OUT 


ci i: 


3 


18 


□ 


H/S 


C2 c 


4 


17 


□ 


Rl 




5 


16 


□ 


R2 


GIMD C 


6 


15 


□ 


R3 


OSC OUT c 


7 


14 


□ 


R4 


OSC IN C 


8 


13 


□ 


MUTE OUT 


TONE/PULSE C 


9 


12 


□ 


C4 


K/P C 


10 


11 


□ 


M/B 




FUNCTIONAL DIAGRAM 



Copyright Harris Corporation 1982 



2740 



© IC MASTER 1983 




HV-1000/1005/1010 



SEMICONDUCTOR ANALOG PRODUCTS DIVISION 



Preliminary 



Induction Motor 
Energy Saver 



FEATURES 



DESCRIPTiON 



OPERATES DIRECTLY OFF nO/220V AC LINE - NO 
POWER SUPPLY REQUIRED 

PRODUCES POWER SAVINGS OFF FROM 10% TO 50% 
FOR MOTORS WITH LIGHT OR VARIABLE LOADS 

SCR OUTPUT STAGE TRIGGERS TRIAC DIRECTLY 

LOAD ANTICIPATOR SENSES SHOCK LOADS AND 
RESPONDS INSTANTLY WITH FULL POWER 

WITHSTANDS LINE SURGES TO 2000V 

CAUSES MOTOR TO RUN QUIETER, COOLER 

CAN BE MOUNTED INSIDE MOTOR 

NEEDS ONLY 3 RESISTORS, 2 CAPACITORS AND A 
TRIAC TO ASSEMBLE COMPLETE CONTROLLER 



The HV-1000/1005/1010 are energy saving induction motor 
controller circuits specifically designed for use with 110/220 
volt AC single phase induction motors to reduce power 
consumption. 

The controller circuit senses the load on the motor and then 
controls a TRIAC to apply reduced voltage to lightly loaded 
motors, full voltage to heavily loaded motors. 

The HV-1000/1005/1010 is available in a 16 lead DIP. 
Ideal for mounting inside induction motors. It can also be 
mounted in a heat sunk circuit box for external, after market 
application. 



APPLICATIONS 



PINOUT 



• POWER TOOLS 

• WATER PUMPS 

• HEAT PUMPS 

• PRESSES 

• CONVEYORS 

• COMPRESSORS 

► ANY APPLICATION WHERE FOR SOME OF THE 
TIME THE MOTOR IS DRIVING LESS THAN ITS 
RATED LOAD 



TOP VIEW 



AC LO 
CAP B 
CAP A 
POT 3 
POT 2 
POT 1 

CONTROL RETURN 
GATE LO 



c 

EZ 
IZ 
IZ 
d 
C 
C 



16 Q AC HI 
15 
14 
13 
12 
11 
10 
9 



SENSE 



GATE HI 



FUNCTIONAL DIAGRAM 



IN HI 

O- 
110/220V 
A.C. 



P0T1 POT 2 POT 3 CAP A CAP B SENSE 

? n ? T T 



PHASE TO VOLTAGE CONVERTER 



A.C. SERIES 
REGULATOR 



IN 
LO 



O 



RAMP 
GENERATOR 



FEEDBACK 



COMPARATOR 



■o 



SCR. OUTPUT 
STAGE 



GATE 
HI 



GATE 
LO 



Copyright (c) Harris Corporation 1981 
© IC MASTER 1983 



2741 



SPECIFICATIONS 



ABSOLUTE MAXIMUM RATINGS 



Input Voltage (With Input Resistor) 

Input Voltage (Without Input Resistor) 

Power Dissipation 

Operating Temperature Range 

Storage Temperature 

Lead Temperature (Soldering, 10 seconds) 

Output Current (10 microsecond pulse) 



±2000V 
iGOOV 
500mW 
-25oCto +850C 
-40OC to+100oc 
300OC 
500mA 



O 
3 
"D 
C 

o 
o 

E 

(D 
CO 

CO 

i_ 
(0 
X 



ELECTRICAL CHARACTERISTICS 

These characteristics apply to the HV-1000/1005/1010 operating off 60Hz AC line power. HV-1000/1005/1010 
respectively should be selected so that the full load power factor of the controller approximately matches that of 

Watts 



the motor. The motor power factor = 



Volt Amperes 



at full load, which should be measured experimentally. 



FULL LOAD POWER FACTOR 


HV-1000 


HV-1005 


HV-1010 


.86 


.78 


.68 



PARAMETER 


MINIMUM 


MAXIMUM 


UNITS 


Difference Between Positive and Negative 
Triggering Times, Measured from Line 
Voltage Zero Crossing 




75 


/isec 


Output Stage Breakover Voltage 


±600 




V 



NOTES: 



1. Selection of HV-1000/1005/1010 by matching the full load power factor of the motor to that of the controller 
ensures that the controller will apply full voltage to the motor at its full rated load. At reduced loads, the 
controller will then apply appropriately reduced voltage to the motor so that its power consumption is reduced. 

2. No guarantee of power savings can be given since the savings achievable depend entirely on the motor and its 
application. For a motor driving only a flywheel (e.g. a circular saw or a bench grinder) a power reduction of 
50% may often be observed when the tool is switched on but not in use. For typical variable load applications, 
an overall power reduction of 10% is likely to be observed. 



2742 



© IC MASTER 1983 



The 

Contender's 

Winninjgi 
Combination 




t % • * I » 



When you're The Contender, you have to have 
technological superiority and strength to go the 
distance. IVIost of all, you have to deliver. 

We've rolled these key factors into a hard-hitting 
combination punch that scores technical knockouts 
over the competition every time. 

FIRST WE NAIL'EM WITH THE RIGHT We're the only 
converter manufacturer with a patented commer- 
cial package guaranteed to be leak-proof! We're 
on the leading edge of A/D and D/A technology. 
Our products feature innovative, state-of-the-art 
circuit design, and we've incorporated the most 
advanced manufacturing techniques available. 

THEN WE PUT'EM AWAY WITH THE LEFT No one else 



goes to the extremes we do to assure quality. We 
full power burn-in every product at -f85° C. That's 
15° C higher than the maximum specified operating 
temperature range. We have to, because every 
commercial data conversion product we build must 
meet an Acceptable Quality Level (AQL) of 0.4%. 
This commits us to guarantee that there will be no 
rejects in a sample of 100 pieces. That's more than 
twice as tough as it has to be— even for military 
applications. 

Hybrid Systems not only makes the products shown 
here but hundreds of other data acquisition com- 
ponents . . . including custom hybrids. Coll for 
details. 



Industry Standard 574 $34 



SOOOO's) 



12-Bit, 25MSec Hybrid ADC 

FEATURES 

• Complete 12-Bit A/D Converter 

• 25MSec Conversion Time 

• Power 600mW 

• No Missing Codes 

• ISOnSec Bus Access Time 

• \x? BUS Compatible 

• Commercial and MIL-STD-883B Processing 

• Hermetic, 28 pin DIP, Metal Package 



FUNCTIONAL DIAGRAM 



SPECIFICATIONS 

Resolution 
Linearity Error 

Differential 

Integral 
End Point Error^ 

Offset Bipolar 
Unipolar 

Full Scale 
Conversion Time 
Temperature Stability 

Linearity 

Offset 

Full Scale 
Power 
Package 

'Adjustable to zero 



12-Bits 

No Missing Codes 
±0.013% F.S.R. 

±0.25% F.S.R. 
±0.05% F.S.R. 
±0.3% F.S.R. 
25^560 

5ppm/°C F.S.R. 
5ppm/°C F.S.R. 
25ppm/°C F.S.R. 
±15V, -(-5V/600mW 
28 pin DIP 




ORDERING GUIDE 



MODEL 


RESOLUTION 


LINEARITY ERROR 
NMX OVER TEMP 


TEMP RANGE 


PROCESSING 


PRICE(IOO'S) 


HS 574J 


12 Bits 


±1 LSB 


0°Cto +70°C 


0.4% AQL' 


S 34.50 


HS 574K 


12 Bits 


±'72 LSB 


0°Cto +70°C 


0.4% AQL' 


$ 44.50 


HS 574L 


12 Bits 


±72 LSB 


O-Cto +70°C 


0.4% AQL' 


S 65.50 


HS574S 


12 Bits 


±1 LSB 


-55°Cto +125°C 


0.4% AQL* 


S 95.00 


HS 574T 


12 Bits 


±1 LSB' 


-55°Cto +125<'C 


0.4% AQL' 


SI 30.00 


HS 574U 


12 Bits 


±1 LSB' 


-65°Cto +125°C 


0.4% AQL' 


S190.00 


HS 74S/B 


12 Bits 


±1 LSB' 


-65°Cto +125°C 


MIL-STD-883B 


S1 15.00 


HS 574T/B 


12 Bits 


±1 LSB' 


-55°Cto +125°C 


MIL-STD-883B 


S 160.00 


HS 574U/B 


12 Bits 


± 1 LSB' 


-55°Cto +125°C 


MIL-STD-883B 


S230.00 



' Note: ±y2 LSB max error from -25°C to -85°C 



0.4% A.Q.L* All units have full power burn-in at + 85°C. Acceptable quolilY level (AQL) of 0.4% means ttiat Hybrid Systems guarantees ttiat ttiere will be no 
rejects in a sample lot of 100 pieces. That's more than twice as tough as it has to be— even for military applications. 



Ul Ql lcl"AmC Linnell Circle, Billerica, MA 01821 

ni|OllO ^ySWnO (617)667-8700, TWX 710-347-1575 



© IC MASTER 1983 



2743 



12-Bit Adjustment Free ADC's 

HS 5200 Series 



FEATURES 

• 12-Bit Conversion in 10/^Sec (Typical) 

• Adjustment-Free (±0.0125%) Linearity 

• Low Power 670mW (Typical) 

• Hermetic, 24-pin DIP, Metal Package 

• MIL-STD-883B Processing 

• Pin Compatible to MN5200 




FUNCTIONAL DIAGRAM 



$160.00(1-9) 



SPECIFICATIONS 

Resolution 
Linearity 

Absolute Accuracy^ 
Conversion Time 
Temperature Range 

C-versions 

B-versions 
Power 
Package 



12 Bits 
±V2 LSB 
±0.4% 
la^Sec 

0°C to +70°C 
-55°C to -t-125°C 
-I- 15V. -f5V/870mW 
24-pin DIP, Metal 



MSB 
IT 1 2 
<? <? 



N/CC 
ANA, 
GNDt 
ANAc 



■ LSB 

5 6 7 8 9 10 11 12 
OOOOOOOQ 



I COMP 



22 STATUS 
— O (EOC) 
-!-OSTAHT 
linCLOCK 



ORDERING GUIDE 



' Includes all errors, gain, zero, and linearity over temperature. 



0.4% A.Q.L* All units have full power burn-in at +85°C. 
Acceptable quality level (AQL) of 0.4% means ttiot Hybrid 
Systems guarantees ttiot ttiere will be no rejects in a sample 
lot of too pieces. Ttiot's more ttion twice as tougti as It tias 
to be-even for military applications. 





RESOLUTION/ 


INPUT 








MODEL 


CONVERSION TIME 


RANGE 


TEMP RANGE 


PROCESSING . 


PRICE (1-9) 


HS 5210C-12 


12 Bits, 13»jSec 


Oto -lOV 


0°Cto+70°C 


0.4% AQL* 


S 160.00 


HS 5211C-12 


12 Bits, IS^Sec 


± 5V 


0°C to +70°C 


0,4% AQL* 


S 160.00 


HS 5212C-12 


12 Bits, 13(jSec 


±10V 


0°Cto +70°C 


0.4% AQL' 


S 160 00 


HS 5213C-12 


12 Bits, 13HSec 


Oto -lOV 


0°Cto -(-70°C 


0.4% AQL" 


S 160.00' 


HS 5214C-12 


12 Bits, ISmSgc 


± 5V 


0°C to +70°C 


0.4% AQL* 


S 160.00' 


HS 5215012 


12 Bits, IS^Sec 


±10V 


0°C to +70°C 


0.4% AQL* 


S 160.00" 


HS 52160-12 


12 Bits, 13MSec 


Oto +10V 


0°Cto +70°C 


0.4% AQL* 


S 160.00 


HS 5210B-12 


12 Bits, 13HSec 


Oto -10V 


-55°C to +125°C 


MIL-STD-883B 


S190.00 


HS 5211B-12 


12 Bits, 13^560 


± 5V 


-55°C to +125°C 


MIL-STD-883B 


S 190.00 


HS 5212B-12 


12 Bits, IS^Sec 


±10V 


-55°C to +125°C 


MIL-STD-883B 


S 190.00 


HS 5213B-12 


12 Bits, 13f;Sec 


Oto -10V 


-55°C to -(-125°C 


M1L-STD-883B 


S 190.00' 


HS 52148-12 


12 Bits, 13MSec 


± 5V 


-55°C to +125°C 


MIL-STD-883B 


S 190.00' 


HS 5215B-12 


M2 Bits, 13fjSec 


±10V 


-55°C to +125°C 


MIL-STD883B 


S190 00' 


HS 5216B-12 


12 Bits, 13MSec 


Oto +10V 


-bb^C to +125°C 


MIL-STD-883B 


S 190 00 



' 10V external reference user supplied 



Technical knockouts from the Contenders! 



12-Bit lOiuSec Hi Rel ADC 



ADC85 Series 

FEATURES 

• -55°C to-i-125°C Operation 

• No Missing Codes 

• Replaces ADC84/85, HX12B, HZ12B 

• Low Power 1.2W (maximum) 




$134.00(1-9) 



SPECIFICATIONS 

Resolution 
Analog Inputs 

Unipolar 

Bipolar 
Outputs 
Coding 
Linearity 
Conversion Time 
Scale Factor Drift 
Linearity Drift 
Temperature Range 
Power 
Package 



FUNCTIONAL DIAGRAM 



12 Bits 

Oto +5V. Oto +10V 
±2.5V. ±5V, ±10V 
Parallel. Serial/HL 
CBIN/COBIN 

±0.012% F.S.R. (maximum) 
8.8/iSec, lOfiSec (maximum) 
15ppm/°C (maximum) 
2ppm/°C (maximum) 
— 55°C to +125°C 
±15V, +5V/1.2W (maximum) 
32-pln DIP 



SB MSB MSB 
1 2 3 4 5 6 7 8 910111213 
poor 



ANAL GND 
DIG GND 



■HSVe 
-16Ve 



COMP CLOCK 



1 



i27i24{,25 ^23 
GAIN 10V 20V BIPOLAR 
ADJ RANGE OFFSET 



jO SHORT CYCLE 
TO START 



CLOCK 

RATE CONTROL 
CLOCK OUT 



-O BUFFER OUT 
2c BUFFER IN 



COMPARATOR IN 



ORDERING GUIDE 



MODEL 


RESOLUTION 


ACCURACY 


TEMP RANGE 


PROCESSING 


PRICE 


HS ADC85B 
HS ADC85C 


12 Bits 
12 Bits 


12 Bits 
12 Bits 


-56°Cto +125°C 
0°Cto +70°C 


MIL-STO-883B 
0.4% AQL* 


S205.00 
$134.00 



III iKri/l IcI-AmC UrineW Circle, Billerica, MA 01821 

nijOlKJ i^l|5Wmb (617)667-8700, TWX 710-347-1575 



2744 



© IC MASTER 1983 



14,15 and 16 

Latched 

DAC933M6 Series 



FEATURES 

• Up to 16-Bit (0.0008%) Linearity 

• Two-Ctiip Construction 

• Input Registers 

• 24-pin DIP, Metal Package 

• 2 and 4-Quadrant Multiplication 

• Single Supply Operation 

• Low Power 60mW 



SPECIFICATIONS 



Linearity 

s 




$69.00(1-9) 



FUNCTIONAL DIAGRAM 



Resolution 


16 Bits 


Coding 


BIN, OBIN 


Logic 


CMOS, TTL 


Reference Input 


to ±25V 


Output 


200mA/V,ep 


Linearity 




DAC9331-16-4 


±0.003% F.S.R. 


DAC9331-16-5 


±0.0015% F.S.R 


DAC9331-16-6 


±0.0008% F.S.R 


Settling Tinne 


2MSec 


Scale Factor Drift 


2ppnn/°C 


Temperature Range 


0°C to +70°C 


Power 


-i-15V/60mW 


Package 


24-pin DIP 



IT9 10 11 12 13 14 16 16 AMAGND 'ISV 

09090000 9 O 

4 3 | 2 r ?4 i 23 22 21 | 18 17| 



INPUT REGISTERS 



PRECISION 16 BIT 
RESISTOR NETWORK 
8. SWITCHES 



INPUT REGISTERS 




10 11 12 
060 
3 2 BIT 1 



ORDERING GUIDE 



MODEL 


I^LSOLUIION 


LINtARIIY 


TtMP RANGE 


PROCESSING 


PRICE (1-9) 


DAC9331 16-4 


16 Bits 


14 Bits 


0"C to + 


4% AQL' 


S 69.00 


DAC9331 16-5 


16 Bits 


16 Bits 


0"C to +70X 


0.4% AQL* 


S 109.00 


l)AC9331-16-6 


16 Bits 


16 Bits 


0"C to +70"C 


4% AQL" 


SI 69 00' 



■S99 00 (100's) 



Technical knockouts from the Contenders! 



Complete Buffered 
16 and 18 Bit BAC's 



DAC9377 377 Series 

FEATURES 

• True 16-Bit (0.0008%) Linearity 

• ^P Compatible 

• Connplete DAC 

• 24-pin DIP, Metal Package 

• Low Power 450mW 

SPECIFICATIONS 

Resolution 
Coding 
Logic 
Output 
Linearity 

DAC377-18 

DAC9337-16-6 

DAC9337-16-5 

DAC9337-16-4 

DAC9377-4D 
Settling Time 
Scale Factor Drift 
Temperature Range 
Power 
Package 




FUNCTIONAL DIAGRAM 



$89.00(1-9) 



DIGITAL INPUTS 



16 Bits, 18 Bits 
BIN, OBIN 
CMOS, TTL 
to -i-lOV, ±10V 

±0.0008% F.S.R. 
±0.0008% F.S.R. 
±0.0015% F.S.R. 
±0.003% F.S.R. 
±0.002% F.S.R. 
20MSec 
5ppm/°C 
0°C to -i-70°C 
-i-15V/450mW 
24-pin DIP (9377) 
28-pin DIP Metal (377) 



9 10 11 12 13 14 
23'j'2z'| 21*1 ;o| 19| 1 



INPUT REGISTER 



VOLTAGE REF 




OVOUT 



ORDERING GUIDE 



MODEL 


RESOLUTION 


LINEARITY 


TEMP RANGE 


PROCESSING 


PRICE (1-9) 


DAC9377-4D 


4 BCD 


±0.002% 


0°Cto +70°C 


0.4% AQL* 


S 99.00 


DAC9377-16-4 


16 Bits 


14 Bits 


0°Cto +70°C 


0.4% AQL* 


S 89.00 


DAC9377-16-5 


16 Bits 


16 6115 


0°Cto +70°C 


0.4% AQL* 


S 129.00 


DAC9377-16-6 


16 Bits 


16 Bits 


0°C to +70°C 


0.4% AQL* 


SI 99.00 


DAC377B-18 


18 Bits 


16 Bits 


-55°Cto +125''C 


MIL-STD-883B 


S395.00 


DAC377C-18 


18 Bits 


16 Bits 


0°C to +70°C 


0.4% AQL* 


S205.00 



Hybrid Systems 

W W CORPORATION 



22 Linnell Circle, Billerica, MA 01821 
(617)667-8700, TWX 710-347-1575 



© IC MASTER 1983 



2745 



Monolithic 





HS 3140 Series 




$29.00 (lOO's) 



FEATURES 

• Monolithic CMOS Circuit 

• On-Chtp Resistors 

• Linearity ±0.003% 

• Monotonic Over Temperature 

• Latch-Up Protected 

• 20-pin DIP, Metal Package 

• Pin Compatible to DAC-HA 14B 

• Commercial and MIL-STD-883B Processing 

SPECIFICATIONS 



FUNCTIONAL DIAGRAM 



Resolution 

Coding 

Logic 

Reterence Input 

Output 

Linearity 

HS 3140-4 

HS 3140-3 
Settling Time 
Scale Factor Drift 
Temperature Range 

C-versions 

B-versions 
Power 
Package 



14 Bits 
BIN, OBIN 
CMOS. HL 

to ±25V 
200mA/V,ep 

±0.003% 
±0.006% 

1 .S^Sec 
2ppm/°C 

0°C to -t-70°C 
-55°C to -t-125°C 
-i-15V/@1mA 
20-pin DIP 




SWITCHES ARE 
SHOWN IN THE 
HIGH STATE 



•SIMPLIFIED CMOS SWITCH 



ORDERING GUIDE 



MODEL 


RESOLUTION 


UNEAraiY 


TEMP RANGE 


PROCESSING 


PRICE (1-9) 


HS3140C-3 


14 Bits 


13 Bits 


0°C to +70°C 


4% AQL* 


S 35.00' 


HS 3140C-4 


14 Bits 


T4 Bits 


0°C to + 70°C 


4%'AQL' 


S 39.00 


HS 3140B-3 


14 Bits 


13 Bits 


-55°C to +125°C 


MIL-STD-883B 


S 80 00 


HS 3140B 4 


14 Bits 


14 Bits 


-55°C to +125°C 


MIL-STD-883B 


SI 08 00 



'S29 00 (100 s) 



Technical knockouts from the Contendero! 



Monolitliic 
16-Bit MDAG 



HS 3160 




FEATURES 

• Monolithic CMOS Circuit 

• On-Chip Resistors 

• Linearity ±0.003% (14-Bits) 

• Monotonic Over Temperature 



$39.00(100's) 



• Latch-Up Protected 

• Small Size, 22 pin DIP 

• Commercial and 
MIL-STD-883B Processing 



FUNCTIONAL DIAGRAM 



SPECIFICATIONS 




Resolution 


16-Bits 


Coding 


BIN, OBIN 


Logic 


CMOS, TTL 


Reference Input 


to ±25V 


Output 


200mA/V REF 


Integral Linearity (Accuracy) , 


HS 3160-4 


±0.006% F.S.R. Max 


HS 3160-3 


±0.012% F.S.R. Max 


Differential Linearity 




HS 3160-4 


±0.006% F.S.R. Max 


HS 3160-3 


±0.012% F.S.R. Max 


Settling Time 


1 .SmScc 


Scale Factor Drift 


2ppm/°C 


Temperature Range 




C-versions 


0°C to -i-70°C 


B-versions 


-55°C to +125°C 


Power 


+ 15V@1mA 


Package 


22 pin DIP Ceramic 



GNDO- 
20 




~° 'out 2 



SWITCHES ARE 
SHOWN IN THE 
HIGH STATE 



R FEEDBACK 



'This schematic is simplified for clarity. 



ORDERING GUIDE 



MODEL 


RESOLUTION 


LINEARITY 


TEMP RANGE 


PROCESSING 


PRICE (1-9) 


HS3160C-3 
HS 3160C-4 
HS3160B-3 
HS3160B-4 


16 Bits 
16 Bits 
16 Bits 
16 Bits 


13 Bits 

14 Bits' 

13 Bits 

14 Bits' 


0°Cto +70°C 
0°C to -h70°C 
-55°C to -i-125°C 
-55°C to +125°C 


0,4% AQL* 
0.4% AQL* 
MIL-STD-883B 
MIL-STD-883B 


S 45.00' 
$,.49.00 
$ 90.00 
S119.00 



'Integral Linearity (Accurocy); 0.006% F.S.R. Max 
Differential Linearity: 0.006% F.S.R. Max . 



'$39.00 (lOG's) 



Ml iKrirl Ql IcI^AmC UnneW Circle, Billerica, MA 01821 

nyOlKJ i^ljbWnO (617)667-8700, TWX 710-347-1575 



2746 



© IC MASTER 1983 



Double Buffeied 
12-Bit MDAC 

HS 3120 Series 



FEATURES 

• Monolithic Construction 

• 12-Bit Resolution 

• Linearity 0.01% 

• ^iP Compatible 

• 4-Quadrant Multiplication 

• Latcti-Up Protected 

SPECIFICATIONS 



Resolution 

Coding 

Logic 

Reterence Input 

Output 

Linearity 

HS 3120-0 

HS 3120-2 
Settling Time 
Scale Factor Drift 
Temperature Range 

C-versions 

B-versions 
Power 
Package 



12 Bits 
BIN. OBIN 
CMOS, TTL 
to ±25V 
200mA/V,jp 

±0.05% 
±0.01%> 
I^Sec 
2ppm/°C 

0°C to -i-70°C 
-55°C to -1-125^ 
-^15V/@2.5mA 
28-pin DIP 




$29.00(1-9) 



FUNCTIONAL DIAGRAM 



ct O- 
2 

HBE 0-= 
MBEO^ 

LOACO-^ 



IIZ J <l D O / D ^ lull Dill 

loj' 111 "I '^I '^I '^I '^I ''I '"I '^I 



JNPUT l_| INPUT l_l 1^" 

REGISTER [| ■ REGISTER | ~ ] REG 



DAC REGISTE 



12 BIT MDAC 



F F Y 




ORDERING GUIDE 



MODEL 


RESOLUTION 


UNEARITY 


TEMP f^ANGE 


PROCESSING 


PRICE (1-9) 


HS3120C-0 


12 Bits 


10 Bits 


0°Cto +70°C 


0.4% AQL* 


329.00 


HS3120C-2 


12 Bits 


12 Bits 


0°Cto +70°C 


0.4% AQL" 


S36.00 


HS3120E-0 


12 Bits 


10 Bits 


-25°C to +85°C 


0".4% AQL- 


S33.00 


HS3120E-2 


12 Bits 


12 Bits 


-25''C to +85 °C 


0.4% AQL* 


$42.00 


HS3120B-0 


12 Bits 


10 Bits 


-55°Cto +125°C 


MIL-STI>883B 


S72.00 


HS3120B-2 


12 Bits 


12 Bits 


-55°Cto +125°C 


MIL-STD-883B 


382.00 



Technical knockouts from the Contenders! 



Industry StandanI DAC 80 



FEATURES 

• 12-Bit Resolution 

• Fast Output Settling 

• ±y2 LSB Linearity 

SPECIFICATIONS 

Resolution 
Coding 
Logic 
Output 

Current 

Voltage 
Total Error 

Unipolar 

Bipolar 
Settling Time 

Power 

Temperature Range 
Package 

ORDERING GUIDE 



• Voltage or Current Output 

• TTL and CMOS Compatible 

• Wide Operating Supply Range 



12 Bits 

CBIN, COBIN 
CMOS, TTL 

±1mA. to -2mA 

±2.5V, ±5V. ±10V, to +5V 

±0.08% F.S.R. 
±0.06% F.S.R. 
300nSec (-1) 
3MSec (-V) 
± 15V/750mW 
0°C to +70°C 
24-pin DIP 




$15.95 ANY QTY. 



FUNCTIONAL DIAGRAM 



MODEL 


DESCRIPTION 


PROCESSING 


PRICE (1 up) 


HS DAC80-CBI-I 


Current Output 


0.4% AQL' 


315.95 


HS DAC80-CBIV 


Voltage Output 


0.4% AQL* 


316.95 



BIT 1 

(MSB I 



BIT 12 

(LSB) 



10 11 12 



CURRENT SWITCHES 
AND 

12 BIT RESISTOR LADDER NETWORK 



16 20 18 
6 O 




HS DAC80-CBI-V 



UllKri^ QllclAmC 22 Unnell Circle, Billerica, ma 01821 

niJOllO ^IJSwmb (617)667-8700, TWX 710-347-1575 



® IC MASTER 1983 



2747 



Complete /uP Compatible 
IZBltDAC 

DAC338, HS 9338 Series 




FEATURES 

• mP bus Compatible 

• to + 10V, to +5V. ±10V. ±5V Output Ranges 

• Binary Coding 

• Linearity ±0.01% 

• 2.5HSec Settling Time 



$39.00(1-9) 



FUNCTIONAL DIAGRAM 



B SPECIFICATIONS 

>, Resolution 

CO Coding 

73 Logic 

*v. Output 

■P Linearity 

^ :? 

-2 

Settling Time 
Scale Factor Drift 
Temperature Range 
Power 
Package 



12 Bits 
BIN, OBIN 
CMOS. HL 

to +10V, ±10V, ±5V 

±0.05% F.S.R. 
±0.02% F.S.R. 
±0.01% F.S.R. 
20MSec 
15ppm/°C 
0°Cto +70°C 
+ 15V/450mW 
28-pin DIP 



DATA INPUTS 



— 2 
HBE O— 
MBE 
LBEoi 
LDAC cA- 



'i'n'i'ls'j'ig'j' 20'j>2l'j'22|239 24'j'25'i'?6'j'27'j' I2' 




□ AC REGISTE 



12 BIT MDAC 



REFERENCE 



*5V -15V t15V GND 




ORDERING GUIDE 



MODEL 


RESOLUTION 


LINEARITY 


TEMP RANGE 


PROCESSING 


PRICE (1-9) 


DAC338B-12-0 


12 Bits 


10 Bits 


-55°Cto + ^25°C 


MIL-STD-883B 


S118.00 


DAC338B-12-1 


12 Bits 


1 1 Bits 


-55°Cto + ^25°C 


MIL-STD-883B 


SI 26.00 


DAC338B-12-2 


12 Bits 


12 Bits 


-55°Cto -i-125°C 


MIL-STD-883B 


$137.00 


HS 9338-0 


12 Bits 


10 Bits 


0°Cto -t-70°C 


0.4% AQL- 


S 39.00 


HS 9338-1 


12 Bits 


1 1 Bits 


0°Cto -t-70°C 


0.4% AQL* 


S 44.00 


HS 9338-2 


12 Bits 


12 Bits 


0°Cto •f70°C 


0.4% AQL' 


S 49.00 



Technical knockouts from the Contenders! 



Complete Buffered 12-Bit BAC's 



HS 3860 Series 



SPECIFICATIONS 




Resolution 


12 Bits 


Coding 


CBIN. COBIN 


Logic 


CMOS, m 


Output 


Oto -h10V. ±5V, ±10V 


Linearity Error 




0°C to +70°C 


±Va LSB (typical) 




tVi LSB (maximum) 


-55°C to +125''C 


±V2 LSB (maximum) 


Monotonicity 


Guaranteed Over Temp. 


Full Scale Absolute Error 


+ 25°C 


±0.05% F.S.R. (typical) 




±0.1% F.S.R. (maximum) 


-55°Cto +125°C 


±0.15% F.S.R. (typical) 


(B-version) 


±0.3% F.S.R. (maximum) 


Zero Error 




+ 25°C 


±0.025% F.S.R. (typical) 




±0.05% F.S.R. (maximum) 


-55°C to 125°C 


±0.05% F.S.R. (typical) 


(B-version) 


±0.1% F.S.R. (maximum) 


Gain Error 


±0.1% 


Gain Drift 


±10ppm/°C 


Settling Time 


3/iSecL- 


Temperature Range 




C-version 


Q°Cto +^70°C 


B-version 


-55°C to -i-125°C 


Power 


±15V, +5V/1000mW 


Package 


24-pin DIP, Ceramic 



FEATURES 

• ±V2 LSB Linearity (maximum) 

• ±0.3% Absolute Accuracy Over Temperature 

• 3f^Sec Settling Time 

• MIL-STD-883B Processing 

• Superior Replacement for MN3860 

FUNCTIONAL DIAGRAM 




$148.00(1-9) 



BEGtSTE.RQl9 



INPUT REGISTERS 



12 SIT NETWORK & SWITCHES 




REF GAIN 



ORDERING GUIDE 



MODEL 


RESOLUTION 


UNEARITY 


TEMP RANGE 


PROCESSING 


PRICE (1-9) 


HS 3860B 


12 Bits 


12 Bits 


-55°Cto +125''C 


MIL-STD-883B 


S225.00 


HS3860C 


12 Bits 


12 Bits 


0°C.to +70°C 


0.4% AQL* 


S140.00 



Hybrid Systems 

W WCORPORATiON 



22 Linnell Circle, Billerica, MA 01821 
[617)667-8700, TWX 710-347-1575 



2748 



© 10 MASTER 1983 



DAC's, ADC's, Mux's & Switches 



MICRO 
POWER 

SYSTEMSl 



Note: See other MPS parts in Linear and Military Sections. 



Analog Multiplexers 

□ Second source to Analog Devices, 
Harris and Siliconix 

□ Low leakage; dielectric isolation 

□ 25 volt over-voltage protection 

□ Low ON resistance 



Model 



Ron (max, 
full temp) 



Access 
Time 



Off Output 
Leakage 



Replaces 







ohm 


nsec 


(max, full temp) 


MP7501 


8 Channel 


375 


800 


250 nA 


AD7501 


MP7502 


4 Channel Diff. 


375 


800 


125 nA 


AD7502 


MP7503 


8 Channel 

(Inv. Enable) 
16 Channel 


375 


800 


250 nA 


AD7503 


MP7506 


500 


800 


500 nA 


AD7506 
DG506 


MP7507 


8 Channel Diff. 


500 


800 


250 nA 


AD7507 
DG507 


MP7508DI 


8 Channel 


350 


500 


500 nA 


HI508A 
DG508 


MP7509Dr 


4 Channel Diff. 


350 


500 


500 nA 


HI509A 
DG509 



^(typ, 25°C) 



Analog-to-Digital Converters 

□ Second source to Analog Devices 

□ Bright display digital panel meter 

□ Microprocessor compatible 





Model 


Type CMOS 


Resolution Accuracy Replaces 



MP7138 3V2 Digit Panel Meter 


100 mV 


±.05% 








full temp) 


full temp) (typ, 25°C) 




MP7550 


Quadslope, 2's Complement 


13 Bit 


±1 L.S.B. 


AD7550 


MP200DI 


Dual.SPST 


500 nA 


100 ohm 


240 nsec 


DG200 


,MP7570 


Successive Approximation 


10 Bit 


±.05% 


AD7570 












HI 200 


MP7574 


Successive Approximation 


8 Bit 


±.75 L.S.B. 


AD7574 


MP201DI 


Quad.SPST 


500 nA 


125 ohm 


185 nsec 


DG201 
HI201 

AD7510DI 


MP7581 


8 Channel, 8 Bit 


8 Bit 


± .5 L.S.B. 


AD7581 


MP7510DI 


Quad, SPST 


500, nA 


175 ohm 


180 nsec 












MP7511DI 


Quad, SPST 


500 nA 


175 ohm 


180 nsec 


AD7511DI 












MP7512DI 


Dual, SPOT 


500 nA 


1 75 ohm 


180 nsec 


AD7512DI 



Dielectrically isolated multiplexers and switches 
are indicated by "DI" suffix. 



Digital-to Analog Converters 

□ Second source to Analog Devices and PMI 

□ Improved temperature drift characteristics 

□ Superior stability— no laser trimming 

□ .5ppm gain tempco for MP7621 



Model 



Type 



Resolution Accuracy Replaces 



MP370 


CMOS, High Resolution 


18 Bit 


±.0008% 


DAC-370-18 


MP377-18 


CMOS, Buffered 


18 Bit 


±.0008% 


DAC-377-18 


MP562 


Bipolar, Low Power 


12 Bit 


±.006% 


AD562 


MP3140 


CMOS, Multiplying 


14 Bit 


±.006% 


HS3140 


MP5520 


CMOS and Bipolar 


6 Bit 


±.2% 


DAC01 


MP5560 


Bipolar, Low Noise 


10 Bit 


±.05% 


DAC100 


MP7520 


CMOS, Multiplying 


10 Bit 


±.05% 


AD7520 


MP7521 


CMOS, Multiplying 


12 Bit 


±.05% 


AD7521 


MP7522 


CMOS, ijP Compatible 


10 Bit 


±.05% 


AD7522 


MP7523 


CMOS, Multiplying 


8 Bit 


+ .05% 


AD7523 


MP7524 


CMOS./iP Compatible 


8 Bit 


±.05% 


AD7524 


MP7530 


CMOS, Multiplying 


10 Bit 


±.05% 


AD7530 


MP7531 


CMOS, Multiplying 


12 Bit 


±.05% 


AD7531 


MP7533 


CMOS, Multiplying 


10 Bit 


±.05% 


AD7533 


MP7541 


CMOS, Multiplying 


12 Bit 


±.012% 


AD7541 


MP7614 


CMOS, Multiplying 


14 Bit 


±.012% 


AD7546 


MP7616 


CMOS, Multiplying 


16 Bit 


±.006% 


AD7546 


MP7621 


CMOS, Untrimmed 


12 Bit 


±.012% 


AD7541 


MP7622 


CMOS, Multiplying 


12 Bit 


±.012% 


HS3120 


MP7623 


CMOS, Multiplying 


12 Bit 


±.012% 


AD7541 


MP9331 


CMOS, High Resolution 


16 Bit 


±.0008% 


DAC-9331-16 


MP9377-16 


CMOS, Buffered 


16 Bit 


±.0008% 


DAC-9377-16 



Analog Switches 

□ Second source to Analog Devices, 
Harris and Siliconix 

□ Low ON resistance 



Model 



Off Output Ron Switch 
Type Leakage (max, (nnax, ON Time 



Replaces 



All Micro Power System's IC's are available with 883 B 
processing, in dice form, or to customer's specifications. 



® IC MASTER 1983 



MICRO 3100 Alfred Street 
POWER Santa Clara, CA 95050 
SYSTEMS (408) 727-5350 

2749 



CD 

o 

Q. 
O 

o 



SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



Specifications andL 
Applications Information 



FLOPPY DISK READ AMPLIFIER 

The MC3470 is a monolithic READ Amplifier System for obtaining 
digital information from floppy disk storage. It is designed to accept 
the differential ac signal produced by the magnetic head and pro- 
duce a digital output pulse that corresponds to each peak of the input 
signal. The gain stage amplifies the input waveform and applies it 
to an external filter network, enabling the active differentiator and 
time domain filter to produce the desired output. 

• Combines All the Active Circuitry To Perform the Floppy Disk Read 

Amplifier Function in One Circuit 

• Guaranteed Maximum Peak Shift of 2.0% — MC3470A 

• Improved (Positive) Gain Jq and Tolerance 

• Improved Input Common Mode 



TYPICAL APPLICATION 



Filter Network 



Active 
Differentiator 
Components 



5 V Digi^a' 
Output 



Magnetic i 
Head, 




Lil H LiJ LiJ LiJ H 

UT 5 V 



Analog Inputs 



Gain Select 



5 V 



Mono #1 



Mono #2 



FLOPPY DISK SUPPORT 

MC3470P 
MC3470AP 



FLOPPY DISK 
READ AMPLIFIER SYSTEM 



SILICON MONOLITHIC 
INTEGRATED CIRCUIT 




P SUFFIX 
PLASTIC PACKAGE 
CASE 701-01 



Amplifier 
Inputs 



Offset 
Decoupling 



One-Shot 
Components 



One-Shot 
Components 



Amplifier 
Outputs 



1 Active 
Differentiator 
Inputs 



Li 

1j] Vc 



Differentiator 
Components 



Output 



) MOTOROLA INC.. 1982 



DS9588 
(Replaces ADI-512) 



2750 



© 10 MASTER 1983 



(M) MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



Specifications and 
Applications Information 



FLOPPY DISK WRITE CONTROLLER 

The MC3469 and MC3471 are monolithic WRITE Current Control- 
lers designed to provide the entire interface between floppy disk heads 
and the head control and write data signals for straddle-erase or tunnel- 
erase heads. 

Provisions are made for selecting a range of accurately controlled 
write currents and for head selection during both read and write op- 
eration. Additionally, provisions are included for externally adjusting 
degauss period and inner/outer trace compensation. 

The MC3471 provides the erase delay and inhibit functions required 
to interface with tunnel-erase heads. 

• Head Selection — Current Steering Through Write Head and Erase 
Coil in Write Mode 

o Provides High Impedance (Read Data Enable) during Read Mode 

• Head Current (Write) Guaranteed Using Laser Trimmed Internal 
Resistor (3.0 mA using Rgxt = 1 kO) 

• IRW Select Input Provides for Inner/Outer Track Compensation 

• Degauss Period Externally Adjustable 

• Specified with ±10% Logic Supply and Head Supply (Vge) ^rom 
10.8 V to 26.4 V 

• Minimizes External Components 

• MC3471 Provides On-Chip Adjustable Erase Delays 



MC3469 
BLOCK DIAGRAM 



R/W1 R/W2 
Q 

6 



Toggle 
Select 



IRWS 



Current 
Select 



Vref 



-O WG 



Select 
Enable 



13 ^ 
^ E0 



1 1 



14 



16 



El 



CT0 



CT1 



2 
ref 



HS 



WD O- 



FLOPPY DISK SUPPORT 

MC3469P 
MC3471P 



FLOPPY DISK 
WRITE CONTROLLERS 

SILICON MONOLITHIC 
INTEGRATED CIRCUIT 





MC3469 only 








innf PLASTIC PACKAGE 




•J ^ CASE 648 








Sfff? rr 








U 11 " PLASTIC PACKAGE 


CASE 738 







MC3471 
BLOCK DIAGRAM 



R/W1 R/W2 
O 



Toggle 
Select 



IRWS O- 



Current 
Select 



Erase 
Delays 



Vref 'ref WG 

© MOTOROLA INC., 1 982 



12 



-O D1 



11 



-O D2 



Select 
Enable 



kl3 



»-E0 



18 



20 



10 



CTO 



CT1 



Inhibit 



HS 



DS9577 



® 10 MASTER 1983 



2751 



^M) MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



OCTAL THREE-STATE BUFFER/LATCH 

This series of devices combines four features usually found 
desirable in bus-oriented systems: 1) High impedance logic inputs 
insure that these devices do not seriously load the 
bus; 2) Three-state logic configuration allows buffers not being 
utilized to be effectively removed from the bus; 3) Schottky 
technology allows for high-speed operation; 4) 48 mA drive 
capability. 

• Inverting and Non-inverting Options of Data 

• SN74S373 Function Pinouts 

• Eight Transparent Latches/Buffers in a Single Package 

• Full Parallel-Access for Loading and Reloading 

• Buffered Control Inputs 

• All inputs Have Hysteresis to Improve Noise Rejection 

• High Speed - 8.0 ns (Typ) 

• Three-State Logic Configuration 

• Single -t-5 V Power Supply Requirement 

• Compatible with 74S Logic or M6800 Microprocessor Systems 

• High Impedance PNP Inputs Assure Minimal Loading of the Bus 



MICROPROCESSOR BUS EXTENDER APPLICATION 

(Clock) 
Gnd +5 V 01 02 
P 



X 



m 



M6800 
MPU 



MC6882A/MC3482A 
MC6882B/MC3482B 
Octal 
Buffer/Latch 



Address 

and 
Control 

Bus 



MC6880A/MC8T26A 
Bus Extender 



MC6830 
ROMs 



MC6810 
RAMs 



MC6820 
PIAs 



MC6850 
ACIAs 



To DAA 



MC6860 
Modem 



Data 
Bus 



MC3482A/MC6882A 
MC3482B/MC6882B 

This device may be ordered under 
either of the above type numbers. 



OCTAL THREE-STATE 
BUFFER/LATCH 




L SUFFIX 
CASE 732 



INPUT EQUIVALENT 
CIRCUIT 



OUTPUT EQUIVALENT 
CIRCUIT 




ORDERING INFORMATION 

(Temperature Range for the following 
devices = to ■^75°C.I 



Device 


Alternate 


Package 


MC6882AL 


MC3482AL 


Ceramic DIP 


MC6882BL 


MC3482BL 


Ceramic DIP 



©MOTOROLA INC., 1979 



2752 



© IC MASTER 1983 



(g) 



MOTOROLA 



MOTOROLA BROADLINE 



BUS STANDARD LINE DRIVERS 
& RECEIVERS 



STANDARD 


INTRODUCED 


1982 INTRODUCTION 


1983 INTRODUCTION 


RS232C 


MC1488 DR 

ftA/^i AQd Dcr* 

Mu 1 4oa ncL 






RS422 


MC3486 REC 
MC3487 DR 
AM26LS31 DR 


AM26LS32 REC 




RS423 


MC3487 DR 


;nA9636A(MC3488A) 




RS-aaa 
(PARTY LINE) 




SN75172 REC 
SN75174 REC 


SN75173 DR 
SN75175 DR 
SN75176-8 


IEEE 488-1 978 


MC3440-43A 
MC3446A 
MC3448A 
MC3447 






IBM GA-22-6974-3 


MC3481 
MC3485 
MC75125-9 







o 

ZJ 

•a 
c 
o 
o 

E 

(D 
CO 

i3 

o 
1— 

o 

• 

o 



PERIPHERAL DRIVERS 



PART 






INPUT 


NUMBER 




DESCRIPTION 


COMPATIBILITY 


MC1411P(ULN2001A) 


-> 


Seven Element 


General 


MC1412P(ULN2002A) 




>- Darlington 

Array (0.5 A Max) 


PMOS 


MC1413P(ULN2003A) 




TTL/CMOS 


MC1416P(ULN2004A) 




NMOS 


MC1472U/P1 




Dual Positive NAND 


HI Z(l) 


ULN2801A 






General 


ULN2802A 




^ Octal Darlington 


PMOS 


ULN2803A 




Array (0.5 A Max) 


TTL/CMOS 


ULN2804A 






CMOS/PMOS 


ULN2068B 


Quad 1 .5 A Darlington{2) 


TTL/CMOS/DTL 


ULN2074B 


Quad 1 .5 A Darlingtonl^) 


General 



(1 ) PNP Bufferer for TTL/MOS Compatibility 

(2) Open Collector — Diode Clamped 

(3) Open Collector — Open Emitter 



© IC MASTER 1983 



2753 



^ MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



MICROPROCESSOR/COMPUTER 
INTERFACE 
MC3481 
MC3485 



QUAD SINGLE-ENDED LINE DRIVER 

The MC3481 and MC3485 are quad single-ended line drivers 
specifically designed to meet the IBM 360/370 I/O specification 
(GA22-6974-3). 

Output levels are guaranteed over the full range of output load 
and fault conditions. Compliance with the IBM requirements for 
fault protection, flagging, and power up/power down protection for 
the bus make this an ideal line driver for party line operations. 

• Separate Enable and Fault Flags — MC3481 

• Common Enable and Fault Flag — MC3485 

• Power Up/Down Does Not Disturb Bus 

• Schottky Circuitry for High-Speed — PNP Inputs 

• Internal Bootstraps for Faster Rise Times 

• Driver Output Current Foldback Protection 



• MC3485 has LS Totem Pole Driver Output 



IBM 360/370 
QUAD LINE DRIVER 

SILICON MONOLITHIC 
INTEGRATED CIRCUIT 





L SUFFIX 




CERAMIC PACKAGE 




CASE 620 


P SUFFIX 




PLASTIC PACKAGE 




CASE 648 





MC3481 
DUAL ENABLE 
INDIVIDUAL FAULT FLAG 



MC3485 
COMMON ENABLE 
COMMON FAULT FLAG 



Driver Output A p~ 
Fault Flag A 
Input A 
Enable AB [£_ 



Input B 

Fault Flag B [^-<h 

Driver Output B |^ T [_ 

Gnd [T 





Driver Output D 
T] Fault Flag D 



T] Input D 
T] Enable CD 
T] Input C 



p[>o — jj Fault Flag C 
__1 ^ ^ Driver Output C 




i]vcc 

"7] Driver Output D 
Driver Output D 
T] Input D 



Fault Flag 
(Open Collector) 



~T] Input C 
T] Driver Output C 
"■T] Driver Output C 



SUPPORTING IBM 360/370 LINE RECEIVERS 



Device 
Number 


No. of 
Channels 


Input 
Resistance 

Min/Max 


l|H(R) 

@V,H = 3.11 V 
mA lyiax 


*PLH 

@Cl=50 pF 
ns Max 


MC751 25/751 27 


Seven 


7.4/20 


0.42 


25 


MC751 28/751 29 


Eight 


7.4/20 


0.42 


25 



©MOTOROLA INC., 1980 



2754 



© IC IVI ASTER 1983 




M) MOTOROLA 

SEMICOIMDUCTORS 

P.O. BOX 20912 • PHOENIX. ARIZONA 85036 



BIDIRECTIONAL INSTRUMENTATION 
BUS (GPIB) TRANSCEIVER 

This bidirectional bus transceiver is intended as the interface 
between TTL or MOS logic and the IEEE Standard Instrunnentation 
Bus (488-1978, often referred to as GPIB). The required bus termi- 
nation is internally provided. 

Low power consumption has been achieved by trading a minimum 
of speed for low current drain on non-critical channels. A fast 
channel is provided for critical ATN and EOl paths. 

Each driver/receiver pair forms the complete interface between 
the bus and an instrument. Either the driver or the receiver of each 
channel is enabled by a Send/Receive input with the disabled output 
of the pair forced to a high impedance state. The receivers have 
input hysteresis to improve noise margin, and their input loading 
follows the bus standard specifications. 

• Low Power — Average Power Supply Current = 30 mA Listening 

75 mA Talking 

• Eight Driver/Receiver Pairs 

• Three-State Outputs 

• High Impedance Inputs 

• Receiver Hysteresis — 600 mV (Typ) 

• Fast Propagation Times — 15-20 ns (Typ) 

• TTL Compatible Receiver Outputs 

• Single -1-5 Volt Supply 

• Open Collector Driver Output with Terminations 

• Power Up/Power Down Protection (No Invalid 

Information Transmitted to Bus) 

• No Bus Loading When Power is Removed From Device 

• Required Termination Characteristics Provided 



MAXIMUM RATINGS (Ta = 25°C unless otherwise noted) 



Instrument 
A 

(With GPIB) 



Instrument 
B 

(With GPIB) 



TYPICAL MEASUREMENT 
SYSTEM APPLICATION 



Programmable 
Calculator 
(With GPIB) 



16 Lines Total 



GPIB 
INSTRUMENTATION 
BUS INTERFACE 
MC3447 



OCTAL BIDIRECTIONAL 
BUS TRANSCEIVER 
WITH 

TERMINATION NETWORKS 

SILICON MONOLITHIC 
INTEGRATED CIRCUIT 




L SUFFIX 

CERAMIC PACKAGE 
CASE 623 



P3 SUFFIX 

PLASTIC PACKAGE 
CASE 724 




Rating 


Symbol 


Value 


Unit 


Power Supply Voltage 


Vcc 


7.0 


Vdc 


Input Voltage 


V| 


5.5 


Vdc 


Driver Output Current 


'O(D) 


150 


mA 


Junction Temperature 


Tj 


150 


°C 


Operating Ambient Temperature Range 


Ta 


Oto +70 


°C 


Storage Temperature Range 


"•"stg 


-65 to +150 


°C 



PIN ASSIGNMENTS 




17 S/R (1-4) 



Logicf^J 



T O Bus — Indicates 



I 'Gnd 



r 



-O Bus 

Terminations 



'MOTOROLA INC., 1980 



© 



10 MASTER 1983 



2755 



^ MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



TELEPHONE LINE FEED AND 2- TO 4-WIRE 
CONVERSION CIRCUIT 

. . . designed to replace the hybrid transformer circuit in Central 
Office, PABX and Subscriber carrier equipment, providing signal 
separation for two- wire differential to four-wire single-ended 
conversions and suppression of longitudinal signals at the two-wire 
input. It provides dc line current for powering the telset, operating 
from up to a 56 V supply 

• AH Key Parameters Externally Programmable 

• Current Sensing Outputs Monitor Status of Both Tip and 

Ring Leads 

• On-Hook Power Below 5.0 mW 

• Digital Hook Status Output 

• Power Down Input 

• Ground Fault Protection 

• Size and Weight Reduction Over Conventional Approaches 

• The sale of this product is licensed under patent No. 4,004,109. 

All royalties relatedtothispatentare included inthe unit price. 



IVIC3419 

IVIC3419A 

MC3419C 



SUBSCRIBER LOOP 
INTERFACE CIRCUIT 
(SLIC) 

BIPOLAR LASER-TRIMMED 
INTEGRATED CIRCUIT 




L SUFFIX 

CERAMIC PACKAGE 
CASE 726 



FUNCTIONAL BLOCK DIAGRAM 

? Vcc 




A1 Mirror 



A4 



Hook 
Status 
Control 
Circuit 



Bias 



Bias 



A2 Mirror 



A3 

X 



vee 



vag 



-oRSO 
-oTSO 



RX Rrx 



-oHSO 



-oHST 

-opdT 



Balance 
Network 



:Rtxi 



TX 



Analog Ground 
□ 



Receive Input 
□ 



RtX2 



Transmit 
Output 



RVTX 



Vqb 



' MOTOROLA INC., 1981 



2756 



© IC MASTER 1983 



(M) MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



Advance Information 



COMPLETE 12-BIT 
HIGH-SPEED MONOLITHIC D/A CONVERTER 

The MC3412/3512 is a monolithic 12-bit resolution D/A con- 
verter. It contains a high stability bandgap reference capable of 
supplying 1.5 mA externally, trimmed to ±0.25% maximum error. 
Active laser trimming of thin film ladder network, reference, span, 
bipolar offset, and bandgap resistors at wafer level provide ac- 
curacy and linearity of better than ±V2 LSB. An innovative bit 
switching scheme provide fast settling time yet enables selection 
of CMOS or TIL thresholds. TIL threshold levels are retained 
over a wide Vcc range from 13.5 to 16.5 volts. Precision internal 
span resistors allow output voltage options of to 5.0 V, to 10 
V, ±2.5 V, ±5.0 V, and ± 10 V. 12-bit accuracy and a fast settling 
time of typically 200 ns (to ±V2 LSB) make this converter ideal 
for applications such as a fast A/D building block or display driver. 

o True 12-Bit Linearity: ±V2 LSB Max 

• Fast Settling Time: ±V2 LSB in 200 ns Typ 

• Fully Monotonic Over Temperature Range 

• High-Stability Bandgap Voltage Reference On Chip 

• Linearity Guaranteed Over Temperature 

• Low Power Consumption: 210 mW 

• Pinout Compatible with AD563 and AD565 

• Selectable Digital Thresholds 

• Internal Span Resistors for Generating Output Voltage 



BLOCK DIAGRAM 



v 



CMOS/TTL 
CC Threshold 
3Q 29 ..23 



Reference 
Out 
4 O- 



Reference 



10 Volt 
Reference 



24- 



MSB 







Current Switches 





R2R Ladder 



76Vee 



612 
Digital Com 



thjaLi&.a£lYance Information and specifications are subject to change without notice. 
© IC MASTER 1983 



DATA CONVERSION 
MC3412 
MC3512 



LASER TRIMMED 
HIGH-SPEED 
12-BIT D/A CONVERTER 



SILICON MONOLITHIC 
INTEGRATED CIRCUIT 




L SUFFIX 

CERAMIC PACKAGE 
CASE 623 



PIN CONNECTIONS 



NO I 
CMOS/TTL , 
Threshold 

Vcc 

Ref Out I 
Ana Com [ 
Ref In 1 

Bipolar 
Offset 
DAC Out I 

10 V Span I 

20 V Span I 
Dig Com . 
(Gnd) 



24 
23 
22 
21 
20 



6 MC3412 19 

7 18 

8 17 

9 16 

10 15 

11 14 

12 13 



I Bit 1 (MSB) 
I Bit 2 
I Bit 3 
I Bit 4 
I Bit 5 
I Bit 6 
I Bit 7 
I Bit 8 
I Bit 9 
I Bit 10 
I Bit 1 1 
Bit 12 (LSB) 



ORDERING INFORMATION 



Device 


Temperature Range 


Package 


MC3412L 


0°Cto +70°C 


Ceramic DIP 


MC3512L 


-55°Cto +125°C 


Ceramic DIP 



©MOTOROLA INC., 1980 



2757 



MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



Advance Information 



MPU-BUS-COMPATIBLE 
8-BIT D-TO-A CONVERTER 

The MC6890 is a self-contained, bus-compatible, 8 bit {±0.19% 
accuracy) D-to-A converter system capable of interfacing directly 
with 8-bit microprocessors. 

Available in both commercial and military temperature ranges, this 
monolithic converter contains master/slave registers to prevent 
transparency to data transitions during active enable; a laser- 
trimmed, low-TC, 2.5 V precision bandgap reference; and high 
stability, laser-trimmed, thin-film resistors for both reference input 
and output span and bipolar offset control. 

A reset pin provides for overriding stored data and forcing lout 
to zero. 

• Direct Data Bus Linl< with All Popular TTL Level MPU's 

• ±1/2 LSB Nonlinearity Over Temperature 

• Fast Settling Time: 200 ns Typ 

• Internal 2.5-V Precision Laser-Trimmed Voltage Reference (May 

Also Be Used Externally) 



• Minimum Enable Pulse Width: 70 ns 



Fast Enable: 10 ns Maximum Data Hold Time 



Reset Pin to Override Data 

Output Voltage Ranges: +5, +10, +20, or ±2.5, ±5, ±10 Volts 

Low Power: 90 mW Typ 

+5 V and -5 V to -1 5 V Supplies 



OPERATION WITH AN MPU 



Clock, 
Control, 

and 
Address 

Bus 



Microprocessor 



Data Bus Reset 




Data 
Bus 



Decode 
Circuitry 



0-200 n 




D0-D7 
REFoUT Reset 



REFiN MC6890 



Reset 
Circuitry 



Enable 




DATA CONVERSION 

MC6890 



8-BIT 

MPU-BUS-COMPATIBLE 
DAC 



SILICON MONOLITHIC 
INTEGRATED CIRCUIT 




L SUFFIX 
CASE 732 



out 



PIN CONNECTIONS 




(LSB) DO \T 










vcc 


Dl (T 












D2 (T 










REFiN 


D3 (T 








Z] 


Analog Gnd 


D4 [7 










20 V Span 


D5 U 










10 V Span 


D6 \T 










'out 


(MSB) D7 u 










Bipolar 
Offset 


Reset ^ 










Enable 


Digital Gnd [^o 










Vee 















ORDERING INFORMATION 



Device 


Temperature Range 


Package 


MC6890L 


0° to +70° C 


Ceramic DIP 


McesgoAL 


-55° to+125oC 


Ceramic DIP 



This document contains information on a new product. Specifications and information herein 
are subject to change without notice. 



'MOTOROLA INC.. 1982 



ADI-592R2 



2758 



© 10 MASTER 1983 



(M) MOTOROLA 

ADDITIONAL D-A CONVERTERS 

General Purpose 



8-Bit 



A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 

T T T ? r ? T T ? T 



Device 
Number 


Error 
(%Max) 


Pd 

@ Vee = 

-5 V 
(mW Max) 


^Settling 
(ns Typ) 


lo 

(mA) 


Suffix 


Case 


6-Bit 


MCI 506* 
MCI 406 


±0.78 


120 


150 


1.9 to 2.1 


L 


632 



Current Switches 



nr 



I I I I i~ 



8-Bit 



Ladder Terminators 
and 

Trimming Networl(S 



''ref(+) 




DAC-08A 
DAC-08* 


±0.1 
±0.19 






2.984 to 
2.880 


Q 


620 


or 


DAC-08H 
DAC-08 E 
DAC-08C 


±0.1 
±0.19 
±0.39 


48 


85 


1.940 

to 
2.040 


P, Q 


648,620 


duct 


MC1508L8* 
MC1408L8 


±0.19 








L 


620 


con 


MC1408L7 
MC1408L6 


±0.39 
±0.78 


170 


300 


1.9 to 2.1 


L, P 


620, 648 


Semi 


MC3408 


±0.5 








L 


620 



10- Bit 



MC3510* 


±0.05 








L 


690 


MC3410 


220 


250 


3.8 to 4.2 






MC3410C 


±0.1 








L, P 


690, 648 



12-Bit 



o 
o 
o 



'ref(-) 



A0562SD* 

AD562AD# 

A0562KO 


±0.006 
±0.01 


210 


200 


1.6 to 2.4 


D 


716 


AD563TD* 
A0563SD* 
AD563KD 
AD563JD 


±0.006 
±0.01 


210 


200 


1.6 to 2.4 


D 


716 



"TA=-55to + 125°C #TA=-25to+85°C Devices without symbol: TA = 0to+70°C 
Bold Part Numbers Indicate New Products. 



D-A CONVERTERS — HIGH SPEED 



MCI 031 8 series — A high speed 8-bit D/A converter capable 
of data conversion rates in excess of 25 MHz. It is intended 
for applications in high speed instrumentation and commu- 
nication equipment, graphics displays, storage oscilloscopes, 
radar processing, and TV broadcast systems. The inputs are 
compatible with MECL 10,000 series logic, while the com- 
plementary current outputs have 51 mA full scale capability. 
Monotonic over the full temperature range, the outputs typ- 
ically settle in 10 ns. 

Ta = to 70X 

Packages: 

L Suffix — Case 620/690 



LSB BS [T 
87 [T 
86 [T 
85 [T 
84 [T 
83 [T 



82 



MS8 81 [T 



Te] Gnd 

111 W" 

23 lout 

Ti] NC 

TT] Comp 













Device 
Numk)er 


Error 
% Max 


Pd 

@ Vee = -5.2 V 
mW Max 


^Settling 
ns Typ 
(to Va LSB) 


lo & lo 
©Vfief = 10.56 V 
mA Typ 


MC10318CL6 


±0.78 


675 


10 


51 


MC10318CL7 


±0.39 


675 


10 


51 


MCI 031 8L 


±0.19 


675 


10 


51 


MC10318L9 


±0.10 


675 


10 


51 



Bold Part Numbers Indicate New Products. 



® IC MASTER 1983 



2759 



(M) MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX, ARIZONA 85036 



Advance Information 



SEVEN-BIT PARALLEL 
HIGH SPEED A/D CONVERTER 
{WITH OVERRANGE) 

The MC10315L/MC10317L is a 7-bit high speed parallel A/D 
converter which employs ECL processing. The device consists of 128 
parallel latched comparators across a high quality input reference 
network. The 128 comparator outputs are then fed to a 128-to-7 
encoder and latched to the outputs which are ECL compatible. An over- 
range bit is provided to allow overrange sensing, or to facilitate the 
connection of an MC10315L and MC10317L in parallel to produce an 
8-bit A/D converter. The MC10315L and MC10317L are identical 
devices except for the method of overranging used, which simplifies the 
utilization of two 7-bit converters to produce an 8-bit conversion. (See 
ordering information and technical description.) 

Applications include video display and radar signal processing, high 
speed instrumentation, and TV broadcast video encoding. 

• 7-Bit Resolution/8-Bit Accuracy Plus Overrange 

• Direct Interconnection for 8-Bit Conversion 

• 15 MHz Sampling Rate 

• Wide Range of Input Voltage: ±2.0 Volts 

• Low Input Capacitance: <70 pF 

• 1 .2 Watt Power Dissipation 

• No Sample and Hold Required for Video Bandwidth Signals 

• Standard 24-Pin Package 



MC10315L/MC10317L DEVICE/APPLICATION CONFIGURATION 



(11) 
Ain 
O 



(5) Vrt O- 



(3) VRjac O- 



(6) Vrm O- 



(8) VRBac O- 



(7) Vrb O- 



(9) 
CLK 



(10,24) 

vcc 



1 




I 1 



I 
I 

128 
Latched 
Comp. 
I 
I 



I 

128 I 



tput 
Latches 



[AJ to rAj ou 

I I Encode K | 

h^W li i 

J I I I I I I 

r 



-O OVR (14) 



-O OVR (15) 



-O D6 (16) 

i 



! 

-O DO (22) 



Gnd2 
(1,13) 



Gndl 
(23) 



Vee 

(2,12) 



DATA CONVERSION 

MC10315L 
MC10317L 



This document contains information on a new product. Specifications and Information herein 

are subject to change without notice. © motorola inc.. 1982 



HIGH SPEED 
7-BIT ANALOG-TO-DIGITAL 
FLASH CONVERTER 

SILICON MONOLITHIC 
INTEGRATED CIRCUIT 




1 L SUFFIX 

CERAMIC PACKAGE 
CASE 623 



PIN DIAGRAM 



Gnd2" pT 




24] Vcc* 




vee-U 




23] Gndl 


VRjac |T 




22I DO (LSB) 


N.C. |T 




21] D1 


VrtR" 




20I D2 


Vrm 6 




"19) D3 


VrbIl 




"is] D4 


VRBac [T 




Tt] D5 


CLK [T 




le] D6 (MSB) 


Vcc* fio 




Is] OVR 


Ain til 




"14] OVR 


Vee*[i2 




"13] Gnd2* 



*VcC' Vee and Gnd2 are each available on two 
pins. Interconnections for the respective 
function are made on chip. To minimize l»R 
drops on chip and in the bonding wires, 
utilization of both pins for each function is 
recommended. 



ORDERING INFORMATION** 





Overrange Function 




Analog Input 


Logic Levels 


Device 


Condition 


OVR Bit 


D0-D6 Bits 


MC10315L 


Overranged 


High 


High 


MC10317L 


Overranged 


High 


Low 



** For information regarding an evaluation board, contact 
Linear Marketing. ADI-654R1 



2760 



© 10 MASTER 1983 



MOTOROLA 

SEMICONDUCTORS 

P.O. BOX 20912 • PHOENIX. ARIZONA 85036 



PRECISION CIRCUITS 
MC1400 MC1400A 
MCI 500 MC1500A 



Advance Information 



Tight-Tolerance, Low-Drift Voltage Reference Family 

The MC1400 series of ICs is a family of temperature-compen- 
sated voltage references for precision data conversion and in- 
strumentation applications. Advances in thin-film resistors, laser- 
trimming techniques, ion-implanted devices, and monolithic fab- 
rication techniques make this reference both temperature and 
time stable in applications demanding accuracy to the 12-bit level. 



PRECISION 
VOLTAGE REFERENCES 

2.5, 5.0, 6.25 and 10-VOLT 

LASER-TRIMMED SILICON 
MONOLITHIC 
INTEGRATED CIRCUIT 



Features 






• Four Different Output Voltages: 2.5, 5.0, 6.25, 10 V 


• Two-Terminal Operation: 


• Tight Absolute Accuracy: ±0.2% Maximum Initial 




Positive or Negative References 


Tolerance 




Floating References 


• Single-Component Output Trimming Without 


• 


Low Current Consumption: 1.0 mA Typical 


Degrading Temperature Coefficient 


• 


Very Low Temperature Coefficient 


o Wide Input Voltage Range: (Vout + 1.0V)=s Vin « 40 V 





Low Output Noise Voltage 


• Three-Terminal Operation: 


e 


Excellent Ripple Rejection: 87 dB Typical at 120 Hz 


Positive References That Can Source and Sink 


o 


Excellent Long Term Stability: 25 ppm/1000 Hrs 


Current 




Typical 



Device Selection Table 



Vout 
Volts 
Typ 


10 
mA 
Max 


AVout/AT 
ppm/°C 
Max 


Device 
Number 


Regline 
mV Max 


Regioad 
mV Max 


TA 

°C 


2.5 ± 5.0 mV 


±10 


25 


MC1400U2 


3.0 
(Note 1) 


10 
(Note 4) 


to + 70 


10 


MC1400AU2 


40 


MC1500U2 


-55 to +125 


10 


MC1500AU2 


2.5 ± 25 mV 


10 


40 


IVIC1403 


3.0/4.5 
(Note 2) 


10 
(Note 5) 


Oto +70 


25 


IVIC1403A 


55 


MCI 503 


-55 to +125 


25 


MC1503A 


5.0 ± 10 mV 


±10 


25 


MC1400U5 


4.0 
(Note 1) 


20 
(Note 4) 


to +70 


10 


MC1400AU5 


40 


MC1500U5 


-55 to +125 


10 


MC1500AU5 


5.0 ± 50 mV 


10 


40 


MC1404U5 


6.0 
(Note 3) 


10 
(Note 5) 


Oto +70 


25 


MC1404AU5 


55 


MC1504U5 


-55 to +125 


25 


MC1504AU5 


6.25 ± 10 mV 


±10 


25 


MC1400U6 


4.0 
(Note 1) 


20 
(Note 4) 


to +70 


10 


MC1400AU6 


40 


MC1500U6 


-55 to +125 


10 


MC1500AU6 


6.25 ± 60 mV 


10 


40 


MC1404U6 


6.0 
(Note 3) 


10 
(Note 5) 


Oto +70 


25 


MC1404AU6 


55 


MC1504U6 


-55 to +125 


25 


MC1504AU6 


10 ± 20 mV 


±10 


25 


MC1400U10 


4.0 
(Note 1) 


20 
(Note 4) 


to +70 


10 


MC1400AU10 


40 


MC1500U10 


-55 to +125 


10 


MC1500AU10 


10 ± 100 mV 


10 


40 


MC1404U10 


6.0 
(Note 3) 


10 
(Note 5) 


to +70 


25 


MC1404AU10 


55 


MC1504U10 


-55 to +125 


25 


MC1504AU10 



Notes: 

1. (Vout + IV) ^ Vin «40 V 

2. 4.5V:sVin« 15 V 
15V« Vin=e40V 

3. (Vout + 2.5 V) ^ Vin ^ 40 V 

4. -10 mA« IL« +10 mA 

5. mA « IL « 10 mA 



'MOTOROLA INC.. 1980 



This is advance information and specifications are subject to change without notice. 



© 10 MASTER 1983 



2761 



^ National 

JjI Semiconductor 



o 

D 
T3 
C 

o 
o 

E 


CO 

15 
c 
o 

•4— < 



DP8340 Serial Bi-Phase Transmitter/Encoder 
DP8341 Serial Bi-Phase Receiver/Decoder 

General Description 

The DP8340 generates a complete encoding of parallel 
data for high speed serial transmission which conforms 
to the protocol as defined by the IBM 3270 information 
display system standard. The DP8340 converts parallel 
input data into a serial data stream. Although the IBM 
standard covers bi-phase serial data transmission over a 
coax line, the DP8340 also adapts to general high speed 
serial data transmission over other than coax lines, at 
frequencies either higher or lower than the IBM standard. 

The DP8341 provides complete decoding of data for 
high speed serial data communications. In specific, the 
DP8341 recognizes serial data that conforms to the IBM 
3270 Information Display System Standard and converts 
it into ten (10) bits of parallel data. Although this stand- 
ard covers Bi-Phase serial data transmission over a 
coax line, this device easily adapts to generalized high 
speed serial data transmission on other than coax lines 
at frequencies either higher or lower than the IBM 3270 
standard. 

The DP8341 receiver and its complementary chip, the 
DP8340 transmitter, are designed to provide maximum 
flexibility in system designs. The separation of trans- 
mitter and receiver functions allows addition of more 
receivers at one end of the Bi-Phase line without the 
necessity of adding unused transmitters. This is advan- 
tageous specifically in control units where typically Bi- 
Phase data is multiplexed over many Bi-Phase lines and 
the number of receivers generally outnumber the number 
of transmitters. The separation of transmitter and re- 
ceiver function provides an additional advantage in flex- 
ibility of data bus organization. The data bus outputs of 
the receiver are TRI-STATE®, thus enabling the bus con- 
figuration to be organized as either a common transmit/ 
receive (bi-directional) bus or as separate transmit and 
receive busses for higher speed. 




1:1.1 PULSE 
TRANSFORMER 
FIG. 12 



Typical Application for IBM 3270 Interface 



DP8342 High Speed Serial Transmitter/Encoder 
DP8343 High Speed Serial Receiver/ Decoder 



General Description 



The DP8342 generates a complete encoding of parallel 
data for high speed serial transmission. It generates a 
five bit starting sequence, three bit code violation, fol- 
lowed by a syn bit and eight bit per byte of data plus a 
parity bit. A three-bit ending code signals the termination 
of the transmission. 

The DP8343 provides complete decoding of data for 
high speed serial data communications. In specific, the 
DP8343 receiver recognizes Bi-Phase serial data sent 
from its complementary chip, the DP8342 transmitter, 
and converts it into eight (8) bits of parallel data. These 
devices are easily adapted to generalized high speed 
serial data transmission systems that operate at bit 
rates up to 3.5 MHz. 

The DP8342 and its complementary cliip, the DP8343 
(receiver/decoder) have been designed to provide maxi- 
mum flexibility in system designs. The separation of the 
transmitter/receiver functions provides convenient addi- 
tion of more receivers at one end of a bi-phase line with- 
out the need of unused transmitters. This is specifically 
advantageous in control units where typical bi-phase 
data is multiplexed over many bi-phase lines and the 
number of receivers generally exceeds the number of 
transmitters. 



AUTO RESPONSE 



ivcc 



DP834Z 
TRANSMITTER/ 
ENCODER 



DATA BUS D1-D8 



DATA 
AVAILABLE 



OUTPUT CONTROL 



OUTPUT ENABLE 



REG READ 



RECEIVER ACTIVE 



i 



DP8343 
RECEIVER/ 
DECODER 



mr 

DELAY 



cm 



OPTIONAL 
INTERFACE 
LOGIC 



TRANSMITTER 
ACTIVE 



RECEIVER 
DISABLE 



OPTIONAL 
INTERFACE 
LOGIC 



TRANSMISSION 
MEDIUM 



COAX LINE 
TWISTED PAIR LINES 
FIBER-OPTIC 
MAQNniC 
INFRARED 
RF 

ULTRASONIC 
AUDIO 
CURRENT CARRYING 



Typical Application 



2762 



® IC MASTER 1983 



National 
JtjA Semiconductor 

DP8350 Series CRT Controllers 



JUNE 1981 



General Description 

The DP8350 Series of CRT Controllers are single-chip 
bipolar (I^L technology) circuits in a 40-pin pacl<age. They 
are designed to be dedicated CRT display refresh cir- 
cuits. Three standard products are available, designated 
DP8350, DP8352, DP8353. Custom devices, however, are 
available in a broad range of mask programmable options. 

The CRT Controller (CRTC) provides an internal dot rate 
crystal controlled oscillator for ease of system design. 
For systems where a dot rate clock is already provided, 
an external clock may be inputted to the CRTC. In either 
case system synchronization Is made possible with the 
use of the buffered Dot Rate Clock Output. 

The DP8350 Series has 11 character generation related 
timing outputs. These outputs are compatible for sys- 
tems with or without line buffers, using character ROMs, 
or DM86S64-type latch/ROM/shift register circuits. 

12 bits (4k) of bidirectional TRI-STATE® character mem- 
ory addresses are provided by the CRTC for direct inter- 
face to character memory. 

Three on-chip registers provide for external loading of the 
row starting address, cursor address, and top-of-page 
address. 

A complete set of video outputs is available including 
cursor enable, vertical blanking, horizontal sync, and 
vertical sync. 

The DP8350 Series CRTC provides for a wide range of 
programmablllity using internal mask programmable 
ROMs: 

TRI-STATE is a registered trademarl< of National Semiconductor Corp. 



• Character Field (both number of dots/character and 
number of scan lines/character) 

• Characters per Row 

• Character Rows per Video Frame 

• Format of Video Outputs 

The CRTC also provides system sync and program inputs 
Including Refresh Control, Reset, and Address Mode. 

Features 



Internal crystal controlled dot rate oscillator 

External dot rate clock input 

Buffered dot rate clock output 

Timing pulses for character generation 

Character memory address outputs (12 bits) 

Internal cursor address register 

Internal row starting address register 

Internal top-of-page address register (for scrolling) 

Programmable horizontal and vertical sync outputs 

Programmable cursor enable output 

Programmable vertical blanking output 

2 programmable refresh rates, pin selectable 

Programmable characters/row (128 max.) 

Progammable character field size (up to 16 dots x 16 

scan line field size) 

Programmable scan lines/frame (512 max.) 

Programmable character rows/frame 

Single -t-5V power supply 

Inputs and outputs TTL compatible 

Direct interface with DM86S64 character generator 

Ease of system design/application 



o 

D 
C 

o 
o 

E 
o 
CO 

To 
c 

CO 
Z 



Connection Diagrarh 



UNE 
COUNTER • 
OUTPUTS 



REGISTER SELECT B 
VERTICAL BLANKING 
REFRESH CONTROL 
VERTICAL SYNC 
FULL/HALF 
LC3 
LC2 
LCi 
LCo 

CLEAR UNE COUNTER 
ADDRESS MODE 
UNE BUFFER 
RECIRCULATE ENABLE 
LINE RATE CLOCK 
HORIZONTAL SYNC 
RESET 

UNE BUFFER CLOCK 
EXTERNAL CHAR/ 

UNE CLOCK 

LOAD VIDEO SHin REGISTER 

CURSOR ENABLE 

GNO 



-T KJ- 



DP 8350 
DP 8352 
DP 8353 



Ordering Information: 

DP8350N 
DP8352N 
DP8353N 



VCC (+5 V) 
REGISTER SELECT A 
REGISTER LOAD 
RAM ADDRESS ENABLE 
AO ^ 
Al 
A2 
A3 
A4 
A5 
A6 
A7 
A8 
Ag 

AlO 

All7 
LATCH CHARACTER 
GENERATOR ADDRESS 
DOT RATE CLOCK 

XI ) CRYSTAL 

} OSCILLATOR 
X2 INPUTS 



RAM ADDRESS 
. COUNTER 
VOUTPUTS/ 

REGISTER 

INPUTS 



© IC MASTER 1983 



2763 




National 
Semiconductor 



September 1982 



DP8400 — E^C^ Expandable Error Checker and Corrector 



General Description 



The DP8400 Expandable Error Checker and Corrector 
(E^C^) aids system reliability and integrity by detecting er- 
rors in memory data and correcting single or double-bit er- 
rors. The E^C^ data I/O port sits across the processor- 
memory data bus as shown, and the check bit I/O port con- 
nects to the memory check bits. Error flags are provided, 
and a syndrome I/O port is available. Fabricated using 
high speed Schottky technology in a 48-pin dual-in-line 
package, the DP8400 has been designed such that its in- 
ternal delay times are minimal, maintaining maximum 
memory performance. 



DATA BUS 



16/32/4B/64 
7^ 



PROCESSOR I 




I MEMORY 



ERROR FLAGS 



For a 16-bit word, the DP8400 monitors data between the 
processor and memory, with its 16-bit bidirectional data 
bus connected to the memory data bus. The DP8400 uses 
an encoding matrix to generate 6 check bits from the 16 
bits of data. In a WRITE cycle, the data word and the cor- 
responding check bits are written into memory. When the 
same location of memory is subsequently read, the E^C^ 
generates 6 new check bits from the memory data and 
compares them with the 6 check bits read from memory to 
create 6 syndrome bits. If there is a difference (causing 
some syndrome bits to go high), then that memory loca- 
tion contains an error and the DP8400 indicates the type of 
error with 3 error flags, fi the error is a single-bit error, the 
DP8400 will automatically correct it. 

The DP8400 is easily expandable to other data configura- 
tions. For a 32-bit data bus with 7 check bits, two DP8400s 
can be used in cascade with no other ICs. Three DP8400S 
can be used for 48 bits, and four DP8400s for 64 data bits, 
both with 8 check bits. In all these configurations, single 
and double-error detection and single-error correction are 
easy to implement. 

When the memory is more unreliable, or better system in- 
tegrity is preferred, then in any of these configurations, 
double-error correction can be performed. One approach 
requires a further memory WRITE-READ cycle using com- 
plemented data and check bits from the DP8400. If at least 
one of the two errors is a hard error, the DP8400 will correct 
both errors. This implementation requires no more 
memory check bits or DP8400s than the single-error cor- 
rect configurations. 



The DP8400 has a separate syndrome I/O bus which can 
be used for error logging or error management. In addition, 
the DP8400 can be used in BYTE-WRITE applications (for 
up to 72 data bits) because it has separate byte controls 
for the data buffers. In 16 or 32-bit systems, the DP8400 will 
generate and check system byte parity, if required, for in- 
tegrity of the data supplied from or to the processor. There 
are three latch controls to enable latching of data in vari- 
ous modes and configurations. 



Operational Features 



Fast single and double-error detection 
Fast single-error correction 

Double-error correction after catastrophic failure with 

no additional ICs or check bits 

Functionally expandable to 100% double-error correct 

capability 

Functionally expandable to triple-error detect 
Directly expandable to 32 bits using 2 DP8400s only 
Directly expandable to 48 bits using 3 DP8400s only 
Directly expandable to 64 bits using 4 DP8400s only , 
Expandable to and beyond 64 bits in fast configuration 
with extra ICs 

3 error flags for complete error recording 
3 latch enable inputs for versatile control 
Byte parity generating and checking 
Separate byte controls for outputting data in BYTE- 
WRITE operatiop 

Separate syndrome I/O port accessible for error logging' 
and management 

On-chip input and output latches for data bus, check bit 
bus and syndrome bus 

Diagnostic capability for simulating check bits 
Memory check bit bus, syndrome bus, error flags and in- 
ternally generated syndromes available on the data bus 
Self-test of E^C^ on the memory card under processor 
control 

Full diagnostic check of memory with the E^C^ 

Complete memory failure detectable 

Power-on clears data and syndrome input latches 



Timing Features 

16-BIT CONFIGURATION 

WRITE Time: 35 ns from data-in to check bits valid 
DETECT Time: 30 ns from data-in to Any Error (AE) flag set 
CORRECT Time: 65 ns from data-in to correct data out 



1982 National Semiconduclor Corp BF/2183 

2764 



IM-B2.5M92/Printed In U.S.A. 

© IC MASTER 1983 



National 
mSi Semiconductor 

DP8409 Multi-Mode Dynamic 

General Description 

Dynamic memory system designs which formerly 
required several support chips to drive the memory 
array can now be implemented with a single DP8409 
Multi-Mode Dynamic RAM Controller/Driver. The DP8409 
is capable of driving all 4 k, 16 k, and 64 k Dynamic RAMs 
(DRAMs) as well as all announced 256k DRAMs. Since 
the DP8409 is a one chip solution (including capacitive 
drivers), it minimizes propagation delay skews, the 
major performance disadvantage of multiple chip 
memory drive and control. 

The DP8409's 8 modes of operation offers a wide selec- 
tion of DRAM control capabilities. System access may 
be controlled externally or on-chip automatically; an on- 
chip refresh counter makes refreshing (either externally 
or automatically controlled) less complicated; and auto- 
matic memory initialization is both simple and fast. 

The DP8409 is a 48-pin, Dynamic RAM Controller-Driver 
with 9 multiplexed address outputs and control signals. 
It consists of two 9 bit address latches, a 9 bit refresh 
counter and control logic. All output drivers are capable 
of driving 500 pF loads with propagation delays of 20 ns. 
500pF is the typical capacitance of a line with 70 
Dynamic RAMs (DRAMs), including trace capacitance. 

The DP8409 has 3 mode pins MO, Ml and M2, where MO 
is in general REFRESH. These 3 pins allow 8 modes of 
operation, as shown in Table 1. The Inputs BO and B1 in 
the access modes (MO = 1), are bank select inputs which 
select one of the four RAS outputs. The 9 address out- 
puts can be selected from the Row Address Latch or the 
Column Address Latch, during normal access. During 
refresh, the on-chip 9 bit refresh counter can be enabled 
onto the address bus and in this mode all RAS outputs 
are selected. 

The DP8409 can drive up to 4 banks of DRAMs, either 
16 ks, 64 ks, or 256 ks, but totalling less than 70 for 
speed-drive capability reasons. Control signal outputs 
RAS, CAS and WE are provided with the same drive 
capability. Each RAS o utput drives one bank of DRAMs 
so that the f our RAS outputs are used to select the 
banks, while CAS, WE and the multiplexed addresses 
can be connected to all the banks of DRAMs. This 
leaves the non-selected banks in the standby mode 
(less than one tenth of operating power) with the data 
outp uts i n TRI-STATE®. Only the bank with its associ- 
ated RAS low will be written to or read from. 



Operational Features 

■ All DRAM drive functions on one chip — minimizes 
skew on outputs, maximizes AC performance 

■ Drives directly all16k, 64k and 256k DRAMS 

■ Capable of addressing 64k, 256k or 1M words 

■ Address propagation delays of 20ns at 500 pF 



ADVANCED INFORMATION 

JUNE 1981 



RAM Controller/Driver 



■ Column address valid on output bus 20ns after R/C 
goes low 

■ CAS goes low 12 ns after column addresses are valid 

■ WE goes low ISns after WIN goes low 

■ On-chip 9 bit refresh counter with selectable End of 
Count (127. 255, or 511) 

■ End of Count indicated by RF I/O pin, going low at 
127, 255 or 511 

■ Low Input on RF I/O resets 9 bit refresh counter 

■ CAS inhibited during refresh cycle 

■ Fall through latches on address inputs controlled 
by ADS 

■ TRI-STATE Outputs allow multi-controller 
addressing of the memory 

■ Control output signals go high impedance logic "1" 
when disabled 

■ Power up: counter reset, control signals high and 
address outputs TRI-STATE, and End of Count set 
to 127 

■ Pinout allows reversal of device in socket without 
part damage 

Mode Features 

■ 8 modes of operation — 3 access, 3 refresh, and 2 
set-up 

■ 2 external control modes — 1 access and 1 refresh 
(Modes 0, 4) 

■ 2 auto-access modes RAS — R/C — CAS automatic, 
with tRAH = 20 or 30 ns (Modes 5, 6) 

■ Slow auto-access mode allows Hidden Refreshing 
(Mode 5) 

■ Forced Refresh requested on RF I/O if no Hidden 
Refresh (Mode 5) 

■ Forced Refresh performed after System 
acknowledge of request (Mode 1) 

■ Internal Auto-Burst Refresh mode stops at End of 
Count of 127, 255, or 511 (Mode 2) 

■ Internal Auto-Burst mode used before and after 
DMA transfer (Mode 2) 

■ 2 All-RAS Access modes, external control or 
internal control (Mode 3a, 3b) 

■ External All-RAS mode with WE useful for memory 
initialization (Mode 3b) 

■ Internal All-RAS mode with CAS and WE allows 
fast memory initialization (Mode 3a) 

■ Internal All-RAS mode with external 8-bit counter 
frees system for other set-up routines (Mode 3a) 

■ End of Count value of Refresh Counter set by BO, 
B1 (Mode 7) 



® IC MASTER 1983 



2765 



National 
mjA Semiconductor 

DP8460 MFM Data Separator 



June 1982 



General Description 



National Semiconductor Corporation's DP8460 MFM 
Data Separator Chip (Modified Frequency Modulation 
Decoder) is a monolithic bipolar integrated circuit used 
in disk drive systems. It receives rav^/ MFM pulses from 
pulse detection logic and outputs both NRZ data and 
raw MFM synchronized to the on-chip VCO. The user may 
choose either of these outputs to apply to the controller 
depending on the type of system. All digital signals are at 
TTL logic levels and a single +5V power supply is 
required. The- DP8460-2 will operate with data rates 
between 2 and 25 megabits per second. The DP8460-4 
will operate with data rates between 2 and 12.5 megabits 
per second, and the DP8460-8 will operate from 2 to 6.25 
megabits per second. 

The read circuit features an internal phase-locked loop 
consisting of a pulse gate, phase comparator, charge 
pump, op-amp, and voltage-controlled oscillator. In addi- 
tion to the DATA and CLOCK outputs, ADDRESS MARK 
DETECT, LOCK DETECT, PHASE COMPARATOR TEST, 
SYNCHRONOUS MFM, and 2F-CL0CK outputs are provid- 
ed. The functional description will provide details concern- 
ing these outputs as well as circuit input requirements. 



Features 

■ Fabricated on the same advanced. oxide-isolated 
process as the ALS family. 

■ Decodes MFM data up to 25MBits/second. 

■ On-chip data and clock separation. 

■ PLL incorporates dual tracking rate (user-determined). 

■ Phase-lock indicator with external control of 
switchover from high-to-low track rate. 

■ Undecoded Input Data (synchronized with VCO) 
provided as an output. 

■ Decodes MFM with All Ones or All Zeros data 
preamble. 

■ ADDRESS MARK DETECT output. 

■ "OR-ed" outputs of phase comparator provided to aid 
in the testing of disk media. 

■ READ DELAY DISABLE input provided to reduce time 
required from READ GATE Command until beginning 
of PLL Lock sequence. 

■ Single +5V supply. 



Block Diagram 



2F 

CLOCK ; 

INPUT 



RAW ■ 
MFM ■ 



READ ■ 
GATE ' 



DELAY s_ 
DISABLE 



READ 
ENABLE 
AND 
DELAY 



I — wv- 



I 



I — — " 

t PG1 



PHASE 
COMPARATOR 
TEST 



PULSE 
GATE 



INTERNAL 
VcO CLOCK 



PHASE 
COMPARATOR 



IRATE ' "RATE Z t CP OUT 

V V V 




|ci " \z2 



CHARGE 
PUMP 



PREAMBLE 
PATTERN 
RECOGNITION 



PLL 
LOCK 
DETECTOR 



□ 





VOLTAGE - 




CONTROLLED 




OSCILLATOR 



CLK MUX 






OE GLITCH 



MFM 

DECODER 



MISSING 
CLOCK 
OaECTOR 



ZF 

CLOCK OUT 



-< — PLL LOCK INPUT 



. SYNCHRONIZED 
DATA 



ADDRESS 

MARK 

DETECT 



READ 
DATA 
(NRZ) 

PREAMBLE 

PATTERN 

SELECT 



2766 



® iC MASTER 1983 




National 
Semiconductor 



PRELIMINARY 

September 1982 



DP84240/DP84244 Octal TRI-STATE® MOS Drivers 



General Description 



The DP84240 and DP84244 are octal TRI-STATE" drivers 
which are ideally suited as fast data buffers or as memory 
address drivers. The DP84240 is an inverting driver which 
is pin-compatible with both the 74S240 and AM2965. The 
DP84244 is a non-inverting driver which is pin-compatible 
with the 74S244 and AM2966. These parts are fabricated 
using an oxide isolation process, for much faster 
speeds, and are specified for 50 pF and 500 pF load 
capacitances. 



Features 

■ tpd specified with 50 pF and 500 pF loads 

■ Output specified from 0.8V to 2.7V 

■ Designed for symmetric rise and fall times at 
500 pF 

■ Outputs glitch free at power up and power down 

■ PNP inputs reduce DC loading on bus lines 

■ Low static and dynamic input capacitance 

■ Low skew times between edges and pins 

■ AC parameters fully tested 



TRI-STATE is a registered trademark of National Semiconductor Corporation 



Connection Diagrams 



Truth Tables 



DP84240 



TOP VIEW 




Inputs 
G" A 


Outputs 
Y 


H X 


Z 


L L 


H 


L H 


L 



H = High Level 
L = Lovj Level 
X = Don't Care 
Z = High Impedance 



DP84244 



TOP VIEW 




© IC MASTER 1983 



2767 




National 
Semiconductor 

DS75160A/DS75161 A/DS75162A/DS3666 IEEE-488 GPIB Transceivers 
General Description Features 



Thisfamily of high-speed-Schottky8-channel bi-directional 
transceivers is designed to interface TTL/MOS logic to tfie 
IEEE Standard 488-1978 General Purpose Interface Bus 
(GPIB). PNP inputs are used at all driver inputs for 
minimum loading, and hysteresis is provided at all receiver 
inputs for added noise margin. The IEEE-488 required bus 
termination is provided internally with an active turn-off 
feature which disconnects the termination from the bus 
when Vcc is removed. A power up/down protection circuit 
is included at all bus outputs to provide glitch-free opera- 
tion during Vcc power up or down. 
The General Purpose Interface Bus is comprised of 16 
signal lines— 8 for data and 8 for interface management. 
The data lines are always implemented with DS75160A, 
and the management lines are either implemented with 
DS75161 A in a single-controller system, or with DS75162A 
in a multi-controller system. 



■ 8-channel bi-directional non-inverting transceivers 

■ Bi-directional control implemented with TRI-STATE® 
output design 

■ IVIeets IEEE Standard 488-1978 

■ High-speed Schottky design 

■ Low power consumption 

■ High impedance PNP inputs (drivers) 

■ 500 mV (typ) input hysteresis (receivers) 

■ On-chip bus terminators 

■ No bus loading when Vcc 's removed 

■ Power up/down protection (glitch-free) 



DS3666 Functional Description 

The DS3666 is a high-speed-Schottky 8-channel bi- 
directional transceiver designed to interface TTL/MOS 
logic to the IEEE Standard 488-1978 General Purpose Inter- 
face Bus. 

Implementing the IEEE-488 bus interface is accomplished 
by connecting two DS3666 devices together using the ex- 
pansion control inputs provided. Each device is assigned 
to 4 data channels and 4 management signal channels to 
achieve the 16-line format. 



IEEE-488 Interface Configuration 
implementation Using the DS3666 



Terminal Interface 
Block Diagram 



ATN ■ 
DAV- 



REN ■ 
NRFD- 
DATA IBS) ■ 
DATA (B6) ■ 
DATA (B7) ■ 
DATA (B8) • 

EOl ■ 
SRQ- 



IFC Y" 

NDAC 

DATA (B1) — j- 

DATA (B2) 

DATA (B3) j- 

DATA (B4) 



24 

— Vcc 

23 

— (NOT 
22 USED) 



21 



hr-vcc 

_ (NOT 
22 USED) 



■ IFC 

' NDAC 
' DATA (01) 

■ DATA (02) 
' DATA (D3) 

■ DATA (04) 

■ ATN 

■ DAV 



' REN 
' NRFD 
' DATA (DS) 

■ DATA (06) 

■ DATA (07) 

■ DATA (OB) 

• EOl 
■SRQ 



IEEE 
-488 
BUS 



) DATA BYTE TRANSFER CONT R OL BUS 3 



1 



iIgeneral interface management BUS^ 5 

n I 1 1 

2" 



«! IbI hi 



IEEE488 

BUS interface 

(DS3666 X 2) 



BUS 

INFORMATION 



INTERFACE 
CONTROL 



TALKER/LISTENER/CONTROLLER 



TERMINAL 
DEVICE 



2768 



© IC MASTER 1983 




National 



PRELIMINARY 

April 1982 



DS3658 Quad High Current Peripheral Driver 



General Description 



The DS3658 quad peripheral driver is designed for those 
applications where low operating power, high breakdown 
voltage, high output current and low output ON voltage are 
required. A unique input circuit connbines TTL compatibil- 
ity with high impedance. In fact, its extreme low input 
current allows it to be driven directly by a CMOS device. 
Output clamp diodes are provided for protection when 
driving inductive loads. An on-chip protection circuit 
guarantees glitch-free operation during power up or down, 
and a fail safe feature is provided which puts the output in 
high impedance state when the input is open. 



Applications 



■ Relay drivers 

■ Lamp drivers 

■ Solenoid drivers 

■ Hammer drivers 

■ Stepping motor drivers 

■ Triac drivers 

■ LED drivers 

■ High current, high voltage drivers 

■ Level translators 

■ Fiberoptic LED drivers 



Features 

B Single saturated transistor outputs 

■ Low standby power, 10 mW typical 

■ High impedance TTL compatible inputs 

■ Outputs may be tied together for increased current 
capacity 

■ High output current 

600 mA per output 
2.4A per package 

■ No output latch-up at 35V 

■ Low output ON voltage (350 mV typ @ 600 mA) 

■ High breakdown voltage (70V) 
O Open collector outputs 

■ Output clamp diodes for inductive fly back protection 

■ NPN inputs for minimal input currents (1 ^A typical) 

■ Low operating power 

■ Standard 5V power supply 
H Power up/down protection 
H Fail safe operation 

■ 2W power package 

■ Pin-for-pin compatible with SN75437 



Connection Diagram 

Dual-ln-Line Package 



IN A INB EN GND GND Vcc INC IN D 




OUT A CLAMP 1 OUT B GND GND OUT C CLAMP 2 OUT D 
TOP VIEW 



Truth Table 



IN 


EN 


OUT 


H 


H 


L 


L 


H 


Z 


H 


L 


Z 


L 


L 


Z 



H = High state 

L= Low state 

2= High impedance state 



© IC MASTER 1983 



2769 



!^ National 

Jyfl Semiconductor 



PRELIMINARY 

August 1982 



DS3695/DS3696/DS3697/DS3698 Differential 
TRI-STATE® Bus/Line Transceivers/Repeaters 



General Description 



The DS3695, DS3696, DS3697 and DS3698 are high 
speed differential TRI-STATE bus/line transceivers/re- 
peaters designed to meet the requirements of proposed 
new El A standard RS485 with extended common mode 
range (+12V to -7V), for multipoint data transmission. 

The driver and receiver outputs feature TRI-STATE capa- 
bility, for the driver outputs over the entire common mode 
range of +12V to -7V. Bus contention or fault situations 
that cause excessive power dissipation within the device 
are handled by a thermal shutdown circuit, which forces 
the driver outputs into the high impedance state. The 
DS3696 and DS3698 provide an output pin which reports 
the occurrence of a line fault causing thermal shutdown of 
the device. This is an "open collector" pin with an internal 
lOkn pull-up resistor. This allows the line fault outputs of 
several devices to be wire OR-ed. 

Both AC and DC specifications are guaranteed over the 
to 70°C temperature and 4.75V to 5.25V supply voltage 
range. 



•TRI-STATE is a registered trademark of National Semiconductor Corp. 



Features 

■ Meets new EIA standard RS485, for multipoint bus 
transmission. 

■ 15ns driver propagation delays with 2ns skew (typical). 

■ Single channel per package isolates faulty channels 
(from shutting down good channels). 

■ Single +5V supply. 

■ -7V to +12V bus common mode range permits ±7V 
ground difference between devices on the bus. 

■ Thermal shutdown protection. 

■ Power-up down glitch-free driver outputs permit live 
insertion or removal of transceivers. 

■ High impedance to bus with driver in TRI-STATE or 
with power off, over the entire common mode range 
allows the unused devices on the bus to be powered 
down. 

■ Line fault reporting capability on DS3696 and DS3698 
allows automated fault location and re-routing under 
processor control. 

■ 12kn Minimum receiver input impedance. 

■ 70mV typical receiver hysteresis. 



Connection and Logic Diagrams 
■\j 



RO- 



RO- 



RE/OE- 



DS369S 



LF ' 




(TOP VIEW) 



(TOP VIEW) 




D3/Si 



-OO/RI 



BUS 



-GND 



0S3696 ^ 



-DO/RI 



■DO/RI 



■GND 



BUS 



vcc__l 

2 



RO/DI 



GNO- 



083697 



GNO- 



0S3698 




BUS IN 



rBUS OUT 



BUS IN 



BUS OUT 



(TOP VIEW) 



©1980 National Semiconductor Corporation B/F2460 

2770 



© IC MASTER 1983 




National 
Semiconductor 



February 1982 

PRELIMINARY 



DS8614, DS8615, DS8616, DS8617 225 MHz Low Power 
Dual Modulus Prescalers 



General Description 



The DS8614 series products are low power dual modulus 
prescalers which divide by 20/21, 32/33, 40/41, and 64/65, 
respectively. The modulus control (MC) input selects divi- 
sion by N when at a high TTL level and division by N + 1 
when at a low TTL level. The clock inputs are buffered, pro- 
viding 40 mVrms input sensitivity. The two outputs provide 
the user the option to wire either a totem-pole or open- 
collector output structure. Additionally, the user can wire 
a resistor between the two output pins to minimize edge 
transition emissions. The outputs are designed to drive 
positive edge triggered PLLs. These products can be oper- 
ated from either an unregulated 6.8V to 13.5V source or 
regulated 5V±10% source. Unregulated operation is ob- 
tained by connecting Vs to the source and Vr^q to a 0.1 /xF 
capacitor to ground. Regulated operation is obtained by 
connecting both Vg and Vreq to the supply source. 



The device can be used in phase-locked loop applications 
such as FM radio or other communications bands to pre- 
scale the input frequency down to a more usable level. A 
digital frequency display system can also be derived 
separately or in conjunction with a phase-locked loop, and 
it can extend the useful range of many inexpensive fre- 
quency counters to 225 MHz. 

Features 

■ Low power, 7 mA max 

■ 225 MHz toggle frequency 

■ 40 mVrms input sensitivity 

D Pin compatible with Motorola MC12015-17 prescalers 

■ Unregulated/regulated power supply option 



o 

ZJ 

■u 
c 
o 
o 

E 

0) 
CO 

la 
c 
o 

-t— > 

CO 

z 



Logic Diagram 



Generalized -^N/N-i-1 



MODULUS 
CONTROL 
H=+N 
L= +N + 1 



-I- INPUT O— -l^v. 
-INPUT O—y^ 



SYN CLR 
D Q 



CLK 



CLK 



CLK 



Md Q 

Q 

CLK 



O UPPER OUTPUT 
3 

-O LOWER OUTPUT 



Connection Diagram 



Dual-ln-Line Package 



MC- 

UPPER OUTPUT - 
LOWER OUTPUT - 
GROUND- 



[s 



Vs 

— Vreg 

— -INPUT 
— + INPUT 



TOP VIEW 



® IC MASTER 1983 



2771 



LOGIC DIVISION 



OCTOBER 1982 



TRANSCEIVERS 



54/74LS641 , LS642, 74LS64M , LS642-1 



(0 
O 
-t— < 

C 
D) 

CO 



• Octal bidirectional bus 
interface 

• Open Collector Outputs 

~ 'LS641, non-inverting 
— 'LS642, inverting 

• PNP inputs for reduced 
loading 

• Hysteresis on all Data 
inputs 

• 48mA sink capability 
{'LS641-1, LS642-1) 

FUNCTION TABLE, 'LS641 



INPUTS 


INPUTS/OUTPUTS 


CE 


SIR 


A„ 




L 


L 


A=B 


INPUTS 


L 


H 


INPUTS 


B = A 


H 


X 


(Z) 


(Z) 


FUNCTION TABLE, 'LS642 


INPUTS 


INPUTS/OUTPUTS 


CE 


S/R 


A„ 


Bn 


L 


L 


A=B 


INPUTS 


L 


H 


INPUTS 


B = A 


H 


X 


(Z) 


(Z) 



H = HIGH voltage level 
L = LOW voltage level 
X = Don't care 

(Z) = HIGH Impedance "off" state 



Octal Bus Transceiver (Open Collector) 



TYPE 


TYPICAL PROPAGATION 
DELAY (A to B) 


TYPICAL SUPPLY CURRENT 
(Total) 


74LS641 & -1 


17ns 


58mA 


74LS642 & -1 


17ns 


58mA 



ORDERING CODE 



PACKAGES 


COMMERCIAL RANGES 

Vcc = 5V ± 5%: Ta = 0"C to + 70'C 


MILITARY RANGES 

Vcc = 5V ± 10%; Ta = - 55°C to + 125»C 




N74LS641 N 




Plastic DIP 


N74LS641-1N 




N74LS642N 






N74LS642-1N 




Ceramic DIP 


N74LS641F 
N74LS641-1F 

N74LS642F 
N74LS642-1F 


S54LS641F 
S54LS642F 



INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 



PINS 


DESCRIPTION 


54/74LS & -1 


All 


Inputs 


ILSul 


All 


Outputs 


30LSul 



NOTE 

A 54/74LS unit load (LSul) is 20«iA Ij^ and -0.4mA l|i_. 



PIN CONFIGURATION 



LOGIC SYMBOL 




LOGIC SYMBOL (lEEE/lEC) 



'LS641 



G3 
-t!> 3EN1 
— 3EN2 

b_ c 



r 



^1 < IT 



IT l> 2^^ 



'LS642 



Q3 



j-^ 3EN1 



3EN2 

n c 



13 



ZLLL 



2772 



Signetlcs 



© IC MASTER 1983 



LOGIC DIVISION 



OCTOBER 1982 



TRANSCEIVERS 



54/74LS641, LS642, 74LS641-1, LS642-1 



ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature range unless otherwise noted.) 



PARAMETER 


54LS 


74LS & -1 


UNIT 


Vcc 


Supply voltage 


7.0 


7.0 


V 


V,N 


Input voltage 


- 0.5 to -1- 7.0 


- 0.5 to -t- 7.0 


V 


'in 


Input current 


- 30 to -f 1 


- 30 to -h 1 


mA 


VOUT 


Voltage applied to output in HIGH output state 


- 0.5 to + Vcc 


- 0.5 to + Vcc 


V 




Operating free-air temperature range 


-55 to -f 125 


Oto 70 


"0 



NOTE 

limited to 5.5V on A and B inputs only. 



RECOMMENDED OPERATING CONDITIONS 





PARAMETER 




54/74LS & -1 


UNIT 






Min 


Nom 


Max 


Vcc 


Supply voltage 


Mil 


4.5 


5.0 


5.5 


V 


Com'l 


4.75 


5.0 


5.25 


V 


V|H 


HIGH-level input voltage 




2.0 






V 




LOW-level input voltage 


Mil 






-1-0.5 


V 


V|L 


Com'l 






-1-0.6 


V 


■iK 


Input clamp current 








-18 


mA 


VOH 


HIGH-level output voltage 








5.5 


V 






Mil 






12 


mA 


loL 


LOW-level output current 


Com'l 






24 


mA 






74LS-1 only 






48 


mA 


Ta 


Operating free-air temperature 


Mil 


-55 




-1-125 


»c 


Com'l 







70 


°C 



TEST CIRCUITS AND WAVEFORMS 



TEST CIRCUIT FOR 54/74 OPEN COLLECTOR OUTPUTS 



Vcc 



vcc 



PULSE 
GENERATOR 



V|N 



D.U.T. 



:rt 



■Rl 



VoUT 



DEFINITIONS 

Rl = Load resistor to Vcc: see AC CHARACTERISTICS for value. 
Ci_ = Load capacitance includes jig and probe capacitance; see AC CHARACTERIS- 
TICS for value. 

Rjs: Termination resistance should be equal to Zq\jj of Pulse Generators. 
'tlh* *THL Values should be less than or equal to the table entries. 



90% 



NEGATIVE 
PULSE 




INPUT PULSE DEFINITIONS 

tW : 



•10% 




POSITIVE 
PULSE 



10%- 



— iTHL(lf) 
•tTLH(tr) 



tTLH(tr)— 
tTHLOO- 



90% 




■90% 



90% 



-tw- 




•10% 



V|^ = 1.3V for 54LS/74LS; V^ = 1.5V for all other TTL families. 



AMP (V) 



AMP (V) 



FAMILY 


INPUT PULSE REQUIREMENTS 


Amplitude 


Rap. Rata 


Pulsa Width 


'tlh 


'thl 


54/74 


3.0V 


1MHz 


500ns 


7ns 


7ns 


54LS/74LS 


3.0V 


1MHz 


500ns 


15ns 


6ns 


54S/74S 


3.0V 


1MHz 


500ns 


2.5ns 


2.5ns 



© IC MASTER 1983 



Signetics 



2773 



LOGIC DIVISION 



OCTOBER 1982 



TRANSCEIVERS 



54/74LS641 , LS642, 74LS641-1, LS642-1 



DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature unless range otherwise noted) 



PARAMETER 


TEST CONDITIONS^ 


54/74LS641 
54/74LS642 


74LS641-1 
74LS642-1 


UNIT 


Min 


TVD^ 


Max 


Min 


TVD^ 


Max 


AV-r Hysteresis (Vt+ -Tj. ) 


Vcc= MIN, A or B input 


Mil 


n 1 












w 

V 


Com'l 


n 


n A 




n 9 






V 


Iqh HIGH-level output current 


Vcc= MIN, V|H = MIN, V|L= MAX, 
VoH = 5.5V 






100 






100 


^A 


Vol LOW-level output voltage 


Vcc=MIN, 
V|H = MIN, 
V|L=MAX 


loL= 12mA 


Mil 




0.25 


0.4 








w 

V 


Com'l 




0.25 


0.4 




0.25 


0.4 


\J 


loL=24mA 


74LS 




0.35 


0.5 




0.35 


0.5 


V 


loL=48mA 










0.4 


0.5 


V 


V|K Input clamp voltage 


Vcc=MIN, l,= l|K 






-1.5 






-1.5 


V 


1 Input current at maximum 
' input voltage 


Vcc=MAX 


V,= 5.5V 


A or B input 






0.1 






0.1 


mA 


V|=7.0V 


S/R or CE input 






0.1 






0.1 


mA 


liH HIGH-level input current 


Vcc=MAX, V,= 2.7V 






20 






20 




liL LOW-level input current 


Vcc= MAX, V| = 0.4V 






-0.4 






-0.4 


mA 


Ice Supply current^ (total) 


Vcc=MAX 


IccH Outputs HIGH 




48 


70 




48 


70 


mA 


IccL Outputs LOW 




62 


90 




62 


90 


mA 


Iccz Outputs OFF 




64 


, 95 




64 


95 


mA 



(0 

_o 

-t— > 


c 

D) 
CO 



NOTES 

1. For conditions shown as MIN or MAX, use the 
appropriate value specified under recommended 
operating conditions for the applicable type. 

2. All typical values are at Vcc = 5V, T/^ = 25°C 

3. Measure l^c wi^^i outputs open. 



AC WAVEFORMS 



WAVEFORM FOR INVERTING OUTPUTS WAVEFORM FOR NON-INVERTING OUTPUTS 



VOUT 



Vm 



It 



VOUT 



= 1.3V for 54LS/74LS, V^ = 1.5V for all other TTL families. 

Waveform 1 Waveform 2 



1 



AC CHARACTERISTICS Tj=25*C, Vcc=6.0V 







54/74LS641 & -1 


54/74LS642 & -1 




PARAMETER 


TEST CONDITIONS 


Cl = 45pF, Rl = 66712 


Cl = 45pF, Rl = 667« 


UNIT 






Min 


Max 


Min 


Max 




tpLH Propagation delay 
tpHL A input to B output 


Waveform 2, 'LS641 
Waveform 1, 'LS642 




25 
25 




25 
25 


ns 


tpLH Propagation delay 
tpHL B input to A output 


Waveform 2, 'LS641 
Waveform 1, ^8642 




25 
25 




25 
25 


ns 


tpLH Propagation delay 

CE, S/R inputs to A output 
CE input to B output 
S/R input to B output 


Waveform 1 
Waveform 1 
Waveform 2 




40 
40 
40 




40 
40 
40 


ns 


tpHL Propagation delay 

CE, S/R inputs to A output 
CE input to B output 
S/R input to B output 


Waveform 2 
Waveform 2 
Waveform 1 




50 
50 
50 




60 
60 
60 


ns 



2774 



Signetics 



© to MASTER 1983 



LOGIC DIVISION 



OCTOBER 1982 



BUFFERS/DRIVERS 54/74LS540, 54/7418541 

Octal Buffer/Line Driver (3-State) 



TYPE 


TYPICAL PROPAGATION 
DELAY 


TYPICAL SUPPLY CURRENT 
(Total) 


74LS540 


9 ns 


22nnA 


74LS541 


10ns 


23mA 


ORDERING CODE 


PACKAGES 


COMMERCIAL RANGES 

Vcc = 5V S: 5%; Ta = O'C to + ZCC 


MILITARY RANGES 

Vcc = 5V ± 10%; Ta = - SS^C to + 125''C 


Plastic DIP 


N74LS540N • N74LS541N 




Ceramic DIP 


N74LS540F • N74LS541F 


S54LS540F • S54LS541F 



INPUT AND OUTPUT LOADING AND FAN-OUT TABLE 



PINS 


DESCRIPTION 


54/74LS 


All 


Inputs 


ILSul 


All 


Outputs 


30LSul 



NOTE 

A 54/74LS unit load (LSul) is 20/iA I|h and - 0.4mA 



FUNCTION TABLE 



INPUTS 


OUTPUTS 


OE, 


OE2 


1 


Y 


Y 


L 


L 


L 


L 


H 


L 


L 


H 


H 


L 


X 


H 


X 


(Z) 


(Z) 


H 


X 


X 


(Z) 


(Z) 



PIN CONFIGURATION 



LOGIC SYMBOL 



LOGIC SYMBOL (lEEE/lEC) 




® 10 MASTER 1983 



Signetics 



2775 



LOGIC DIVISION 



OCTOBER 1982 



BUFFERS/DRIVERS 54/74LS540, 54/74LS541 



ABSOLUTE MAXIMUM RATINGS (Over operating free-air temperature range unless otherwise noted.) 



PARAMETER 


54LS 


74LS 


UNIT 


Vcc 


Supply voltage 


7.0 


7.0 


V 


V,N 


Input voltage 


-0.5 to 4- 7.0 


-0.5 to + 7.0 


V 


'in 


Input current 


- 30 to +1 


- 30 to +1 


mA 


VOUT 


Voltage applied to output in HIGH output state 


-0.5 to + Vcc 


- 0.5 to + Vcc 


V 


Ta 


Operating free-air temperature range 


-55 to + 125 


to 70 





0) 

U) RECOMMENDED OPERATING CONDITIONS 





PARAMETER 




54/74LS 


UNIT 






Min 


Nom 


Max 


Vcc 


Supply voltage 


Mil 


4.5 


5.0 


5.5 


V 


Com'l 


4.75 


5.0 


5.25 


V 


V,H 


HIGH-level input voltage 




2.0 






V 


V,L 


LOW-level input voltage 


Mil 






+ 0.7 


V 


Com'l 






+ 0.8 


V 


l|K 


Input clamp current 








- 18 


mA 




HIGH-level output current 


Mil 






- 12 


mA 


'oH 


Com'l 






- 15 


mA 




LOW-level output current 


Mil 






12 


mA 


loL 


Com'l 






24 


mA 




Operating free-air temperature 


Mil 


-55 




+ 125 


°C 


Com'l 







70 


°C 



TEST CIRCUITS AND WAVEFORMS 



TEST CIRCUIT FOR 3 STATE OUTPUTS 



Vcc 



PULSE 
GENERATOR 




SWITCH POSITION 



T«8t 


Switch 1 


Switch 2 


'PZH 


Open 


Closed 


•PZL 


Closed 


Open 


'PHZ 


Closed 


Closed 


tpLz 


Closed 


Closed 



DEFINITIONS 

Rl = Load resistor to Vqq\ see AC CHARACTERISTICS for value. 
C|_ = Load capacitance Includes jig and probe capacitance; see AC 

CHARACTERISTICS for value. 
Rj = Termination resistance shiould be equal to Zqut °' P"lse 

generators. 

D = Diodes are 1N916, 1N3064, or equivalent. 

Rx = IklJ for 54/74, 54S/74S, Rx= 5kn for 54LS/74LS. 

tjLH, tjn|_ Values sfiould be less than or equal to ttie table entries. 



INPUT PULSE DEFINITIONS 



NEGATIVE 
PULSE 




-tw- 



■10% 



10% 



POSITIVE 
PULSE 



10%- 



— tTHL(lt) 
•ITLHdr) 



tTLH(tr)- 
tTHL(t()- 



90% 




■90% 



90% 



-tw- 




V|^ = 1.3V for 54LS/74LS; V^, = 1.5V for all other TTL families. 



AMP (V) 



OV 



AMP (V) 



FAMILY 


INPUT PULSE REQUIREMENTS 


Amplitude 


Rap. Rale 


Pulae Width 


'tlh 


•thl 


54/74 


3.0V 


1MHz 


500ns 


7ns 


7ns 


54LS/74LS 


3.0V 


1MHz 


500ns 


15ns 


6ns 


54S/74S 


3.0V 


1MHz 


500ns 


2.5ns 


2.5ns 



2776 



Signetics 



© IC MASTER 1983 



LOGIC DIVISION 



OCTOBER 1982 



BUFFERS/DRIVERS 



54/74LS540, 54/74LS541 



DC ELECTRICAL CHARACTERISTICS (Over recommended operating free-air temperature range unless otherwise noted.) 



PARAMETER 


TEST CONDITIONS^ 


54/74LS540, 541 


UNIT 


Min 


Typ2 


Max 


AVj Hysteresis (Vx^.-Vj_) 


Vcc=MIN 


0.2 


0.4 




V 


V/-.I1 HIGH-IpvpI niitniit vnltanp 


Vcc=MIN, V|H=MIN, V,L = 0.5V, Ioh = MAX 


2.0 






V 


Vcc=MIN, V|H=MIN, V,L=MAX, Ioh= -3mA 


2.4 


3.4 




V 


Vql LOW-level output voltage 


Vcc=MIN, V,H = MIN, 
V|L=fv1AX 


loL=MAX 


Mil 




0.25 


0.4 


V 


Com'l 




0.35 


0.5 


V 


loL= 12mA 


74LS 




0.25 


0.4 


V 


V|K Input clamp voltage 


Vcc=MIN, l,= l|K 






1 .o 


V 


. Off-state output current, 
HIGH-levei voltage applied 


Vcc=MAX, Vh=MIN, V,l=MAX, Vo = 2.7V 






20 


/.A 


1 Off-state output current, 
LOW-level voltage applied 


Vcc=MAX, V,H = MIN, V|L=MAX, Vo = 0.4V 






— Of) 


A 


1 Input current at maximum 
' input voltage 


Vcc= MAX, V,= 7.0V 






0.1 


mA 


liH HIGH-level input current 


Vcc= MAX, V| = 2.7V 






20 


^tA 


liL LOW-level input current 


Vcc=MAX, V|=0.4V 






-0.2 


mA 


1 Sfiort-circuit output 
°^ current-' 


Vcc= MAX 


-40 




-130 


mA 


Ice Supply current (total) 


Vcc=MAX 


IccH Outputs HIGH 




16 


25 


mA 


IccL Outputs LOW 




27 


45 


mA 


Iccz Outputs OFF 




31 


52 


mA 



NOTES 

1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 

2. All typical values are at Vcc = 5V, Ta = 25°C. 

3. Iqs is tested with Vqut = + ^-^^ ^'^^ "^CC = ^00 + 0.5V. Not more than one output should be shorted at a time and duration of the short circu 
second. 



it should not exceed one 



AC CHARACTERISTICS Ta=25»C, Vcc=5.ov 



PARAMETER 


TEST CONDITIONS 


54/74LS540 


54/74LS541 


UNIT 


Cl = 45pF, Rl = 667Q 


Cl = 45pF, RL = 667fi 


Min 


Max 


Min 


Max 


|pLH Propagation delay 

iPHL 


Waveforms 1 & 2 




15 
15 




15 
18 


ns 


tp2H Output enable time to HIGH level 


Waveform 3 




25 




32 


ns 


tpzL Output enable time to LOW level 


Waveform 4 




38 




38 


ns 


tpHz Output disable time from HIGH level 


Waveform 3, Cl=5pF 




18 




18 


ns 


tpLz Output disable time from LOW level 


Waveform 4, Cl= 5pF 




25 




29 


ns 



© IC MASTER 1983 



Signetics 



2777 



LOGIC DIVISION 



OCTOBER 1982 



BUFFERS/DRIVERS 



54/74LS540, 54/74LS541 



AC WAVEFORMS 



WAVEFORM FOR INVERTING OUTPUTS 

V|N 



VOUT 



Waveform 1 

3 STATE ENABLE TIME TO HIGH LEVEL 
AND DISABLE TIME FROM HIGH LEVEL 



OE 



Y * Y 



/ 



=1.5V 



Waveform 3 



WAVEFORM FOR NON-INVERTING OUTPUTS 



ViN -/v 



-'PHL-j 



M 

-'PLH' 



VoUT 



Waveform 2 



3 STATE ENABLE TIME TO LOW LEVEL 
AND DISABLE TIME FROM LOW LEVEL 



OE 



v. / 



'PLZ- 



^0. 



:1.5V 



5V 



Waveform 4 



Vm = 1.5V for 54/74 and 54S/74S; Vm = 1.3V for 54LS/74LS. 



2778 



Signetics 



© IC MASTER 1983 



Analog Switches 



Basic 
Part 
No. 
(Note 1) 



Switch 
Type 



Analog 
Voltage 
Range 

(V) 
(Note 4) 



rDS(on) 
Max 



(«) 
(Note 4) 



Switching 
'D(oH) Time 
InA) (^sec) 

»0N *OFF 



Logic Levels 
(V) 

V|NL V|MH 



( + ) 
Sup. 
V + 



Opt. Supply Voltage 
(V) 

( - ) Logic 
Sup. Sup. 



Ref. 
Sup. 
Vr 



Comments 



Switch Configuration 



SINGLE CHANNEL SPST 



DG5040 



Plus 40 CMOS 



+ 15 to -15 



1.0 



TTL Compatible 



1 SPST Switch per Package 



TWO CHANNEL SPST 



DG180 


N-JFET 


+ 10 to - 


-12.5 


10 


10 


0.3 


0.25 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 






+ 10 to 


-7.5 


10 


10 


0.3 


0.26 


0.8 


2.0 


15 


-15 


5 





15 V Supplies 


DG181 , 


N-JFET 


+ 10 to - 


-12.5 


30 


1 


0.15 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 






+ 10 to 


-7.5 


30 


1 


0.15 


0.13 


0.8 


2.0 


15 


-15 


5 





15 V Supplies JAN/11101 


DG182 


N-JFET 


+ 10 to 


- 15 


75 


1 


0.25 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 






+ 10 to 


-10 


75 


1 


0.25 


0.13 


0.8 


2.0 


15 


- 15 


5 





15 V Supplies JAN/ 11 102 


DG200 


CMOS 


+ 15 to 


- 15 


70 


2 


1.0 


0.5 


0.8 


2.4 


15 


-15 




(Note 3) 


JAN/12303 


DG200A 


Plus 40 CMOS 


+ 15 to 


-15 


70 


2 


1.0 


0.5 


0.8 


2.4 


15 


-15 






TTL In 


DG281 


N-JFET 


+ 15 to 


-15 


300 


0.2 


0.15 


0.13 


0.8 


2.0 


15 


- 15 


5 





Low Charge Injection 


DG300 


CMOS 


+ 15 to 


-15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power. TTL In JAN/ 11601 


DG300A 


Plus 40 CMOS 


+ 15 to 


- 15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


- 15 






Low Power, TTL In 


DG304 


CMOS 


+ 15 to 


- 15 


50 


1 


0.25 


0.15 


3.5 


11.0 


15 


- 15 






Low Power, CMOS In JAN/ 11605 


DG304A 


Plus 40 CMOS 


+ 15 to 


-15 


50 


1 


0.25 


0.15 


3.5 


11.0 


15 


- 15 






Low Power, CMOS In 


DG381 


CMOS 


+ 15 to 


-15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


- 15 






Low Power, DG181 Pin Out 


DG381A 


Plus 40 CMOS 


+ 15 to 


-15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, DG181 Pin Out 


DG5041 


Plus 40 CMOS 


+ 15 to 


- 15 


50 


1 


1.0 


0.5 


0.8 


2.0 


15 


-15 


5 




TTL Compatible 


FOUR CHANNEL SPST 


DG201 


CMOS 


+ 15 to 


-15 


175 


1 


1.0 


0.5 


0.8 


2.4 


15 


- 15 




(Note 3) 


JAN/12304 


DG201A 


Plus 40 CMOS 


+ 15 to 


-15 


175 


1 


1.0 


0.5 


0.8 


2.4 


15 


-15 






TTL In 


OG202 


Plus 40 CMOS 


+ 15 to 


-15 


175 


1 


1.0 


0.5 


0.8 


2.4 


15 


-15 






TTL In 


DG211 


Plus 40 CMOS 


+ 15 to 


- 15 


175 


5 


0.5 


0.4 


0.8 


2.4 


15 


-15 


5 




Low Cost, TTL In 


DG212 


Plus 40 CMOS 


+ 15 to 


- 15 


175 


5 


0.6 


0.45 


0.8 


2.4 


15 


- 15 


5 




Low Cost, TTL In 


DG308A 


Plus 40 CMOS 


+ 15 to 


-15 


100 


1 


0.2 


0.15 


3.5 


11.0 


15 


-15 






Low Cost CMOS In 


DG309 


Plus 40 CMOS 


+ 15 to 


-15 


100 


5 


0.2 


0.15 


3.5 


11.0 


15 


-15 






Low Cost CMOS In 



2 SPST Switches per Package 



4 SPST Switches per Package 
o ir-f*— o o B^f*— o 



ONE CHANNEL SPOT 



DG186 


N-JFET. 


+ 10 to 


- 12.5 


10 


10 


0.3 


0.25 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 




N-JFET 


+ 15 to 


-7.5 


10 


10 


0.3 


0.25 


0.8 


2.0 


15 


- 15 


5 





15 V Supplies 


DG187 


N-JFET 


+ 10 to 


- 12.5 


30 




0.15 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 




N-JFET 


+ 15 to 


-7.5 


30 




0.15 


0.13 


0.8 


2.0 


15 


-15 


5 





15 V Supplies JAN/11105 


OG188 


N-JFET 


+ 10 to 


- 15 


75 




0.25 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 




. N-JFET 


+ 15 to 


-10 


75 




0.25 


0.13 


0.8 


2.0 


15 


- 15 


5 





15 V Supplies JAN/11106 


DG287 


N-JFET 


+ 15 to 


-7.5 


300 


0.2 


0.15 


0.13 


0.8 


2.0 


15 


- 15 


5 





Break-Before-Make 


DG301 


CMOS 


+ 15 to 


-15 


50 




0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, TTL In JAN/11602 


OG301A 


Plus 40 CMOS 


+ 15 to 


- 15 


50 




0.3 


0.25 


0.8 


4.0 


15 


- 15 






Low Power, TTL In 


DG305 


CMOS 


+ 15 to 


-15 


50 




0.25 


0.15 


3.5 


11.0 


15 


-15 






Low Power, CMOS In JAN/11605 


DG305A 


Plus 40 CMOS 


+ 15 to 


- 15 


50 




0.25 


0.15 


3.5 


11.0 


15 


-15 






Low Power, CMOS In 


DG387 


CMOS 


+ 15 to 


- 15 


50 




0.3 


0.25 


0.8 


4.0 


15 


- 15 






Low Power. DG187 Pin Out 


DG387A 


Plus 40 CMOS 


+ 15 to 


- 15 


50 




0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, DG187 Pin Out 


DG5042 


Plus 40 CMOS 


+ 15 to 


-15 


50 




1.0 


0.5 


0.8 


4.0 


15 


-15 


5 




TTL Compatible 


NOTES: 



1 SPST Switch per Package 

O or'T*— O 



1 . The devices shown in boldface are recommended parts for new designs. 

2. The appropriate switching characteristic for multiplexers is 'TRANSITION- *0N' 'OFF- 

3. Vpgp = 1.5 V is used when supply voltages < ± 15 V are used. Not needed when supply voltages of ± 15 are used. 

4. Analog voltage range (s a function of supply voltages. Where a FET switch is PMOS or CMOS, r^s is also a function of Supply Voltage and Analog Voltage. See individual data sheets for more detail. Values 
shown are for temperature suffix A. 

5. Device normally operates with resistor to + 10 V. 



epino jopeias tonpoJd pejjejeJd 



Silconix 



INTERFACE 



Silconix 



INTERFACE 



ro 

00 

o 



Preferred Product Selector Guide 



Analog Switches (Cont d) 



Basic 
Part 
No. 
(Note 1) 



Switch 
Type 



Analog 
Voltage 
Range 

(V) 
(Note 4) 



•^DSion) 
Max 

(0) 
(Note 4) 



'D(off) 
(nA) 



Switching 
Time 
l^sec) 
*ON *OFF 



Logic Levels 
(V) 

V|NL V 



INH 



( + ) 
Sup. 
V + 



Opt. Supply Voltage 
iV) 

( - ) Logic 
Sup. . Sup. 



Ref. 
Sup. 
Vr 



Switch Configuration 



TWO CHANNEL SPOT 



DG189 


N-JFET 


+ 10 to 


-12.5 


10 


10 


0.3 


0.25 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 




N-JFET 


+ 15 to 


-7.5 


10 


10 


0.3 , 


0.25 


0.8 


2.0 


15 


- 15 


5 





15 V Supplies 


DG190 


N-JFET 


+ 10 to 


-12.5 


30 


1 


0.15 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make JAN/11107 




N-JFET 


+ 15 to 


-7.5 


30 


1 


0.15 


0.13 


0.8 


2.0 


15 


-15 


5 





15 V Supplies 


DG191 


N-JFET 


+ 10 to 


-15 


75 


1 


0.25 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make JAN/11108 




N-JFET 


-1- 15 to 


-10 


75 


1 


0.25 


0.13 


0.8 


2.0 


15 


-15 


5 





15 V Supplies 


DG243 


Plus 40 CMOS 


+ 15 to 


- 15 


50 


1 


0.5 


1.0 


0.8 


2.0 


15 


-15 


5 




Make-Before-Break (DG191 Pin Out) 


DG290 


N-JFET 


-t- 15 to 


-7.5 


300 


0.2 


0.15 


0.13 


0.8 


2.0 


15 


-15 


5 





Break-Before-Make 


DG303 


CMOS 


+ 15 to 


-15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, TTL In JAN/11604 


DG303A 


Plus 40 CMOS 


+ 15 to 


-15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, TTL In 


DG307 


' CMOS 


+ 15 to 


-15 


50 


1 


0.25 


0.15 


3.5 


11.0 


15 


-15 






Low Power, CMOS In JAN/11608 


DG307A 


Plus 40 CMOS 


+ 15 to 


-15 


50 


1 


0.25 


0.15 


3.5 


11.0 


15 


-15 






Low Power, CMOS In 


DG390 


CMOS 


+ 15 to 


-15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, DG190 Pin Out 


DG390A 


Plus 40 CMOS 


+ 15 to 


-15 


50 


1 


0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, DG190 Pin Out 


DG5043 


Plus 40 CMOS 


-1-15 to 


-15 


50 


1 


1.0 


0.5 


0.8 • 


2.0 


15 


-15 


5 






ONE CHANNEL DPST 


DG5044 


Plus 40 CMOS 


+ 15 to 


-15 


50 


1 


1.0 


0.5 


0.8 


2 


15 


-15 


5 




TTL Compatible 


TWO CHANNEL DPST 


DG183 


N-JFET 


+ 10 to 


-12.5 


10 


10 


0.3 


0.25 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 




N-JFET 


+ 15 to 


-7.5 


10 


10 


0.3 


0.25 


0.8 


2.0 


15 


-15 


5 





15 V Supplies 


DG184 


N-JFET 


+ 10 to 


-12.5 


30 




0.15 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 




N-JFET 


+ ^5 to 


-7.5 


30 




0.15 


0.13 


0.8 


2.0 


15 


-15 


5 





15 V Supplies 


DG185 


N-JFET 


+ 10 to 


-15 


75 




0.25 


0.13 


0.8 


2.0 


10 


-20 


5 





Break-Before-Make 




N-JFET 


-1- 15 to 


- 10 


75 




0.25 


0.13 


0.8 


2.0 


15 


- 15 


5 





15 V Supplies 


DG284 


N-JFET 


-1- 15 to 


-7.5 


300 


0.2 


0.15 


0.13 


0.8 


2.0 


15 


-15 


5 





Break-Before-Make 


DG302 


CMOS 


-1- 15 to 


-15 


50 




0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, TTL In 


DG302A 


' Plus 40 CMOS 


+ 15 to 


-15 


50 




0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, TTL In 


DG306 


CMOS 


+ 15 to 


-15 


50 




0.25 


0.15 


3.5 


11.0 


15 


-15 






Low Power, CMOS In 


DG306A 


Plus 40 CMOS 


-1- 15 to 


-15 


50 




0.25 


0.15 


3.5 


11.0 


15 


-15 






Low Power, CMOS In 


0G384 


CMOS 


+ 15 to 


-15 


50 




0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, DG184 Pin Out 


DG384A 


Plus 40 CMOS 


-1- 15 to 


-15 


50 




0.3 


0.25 


0.8 


4.0 


15 


-15 






Low Power, DG184 Pin Out 


DG5045 


Pius 40 CMOS 


+ 15 to 


-15 


50 




1.0 


0.5 


0.8 


2.0 


15 


-15 


5 







2 SPOT Switches per Package 

o a^t—a o i/^'—o 



1 DPST Switch per Paclcage 



2 DPST Switches per Package 



it 



NOTES: 

1 . The devices shown in boldface are recommended parts for new designs. 

2. The appropriate switching characteristic for multiplexers is ItRANSITION- *0N' 'OFF- 

3. Vp£p= 1.5 V Is used when supply voltages < ± 15 V are used. Not needed when supply voltages of ± 15 are used. 

4. Analog voltage range is a function of supply voltages. Where a FET switch is PMOS or CMOS, rpg is also a function of Supply Voltage and Analog Voltage; See indlvkJual data sheets for more detail. Values 
shown are for temperature suffix A. 

5. Device normally operates with resistor to -¥ 10 V. 



> 

H 

m 

30 



Analog Switches Selector Guide 



Application 


Feature of 
Appiication 


Important 
Parameters 


Major 
Tradeoffs 


Suggested Switches 




1) Low Power 


Low Supply 
Current 




CMOS DG304-DG308, DG304A, 
DG307A, DG309 

DG300-DG303, DG381-DG390, 
DG300A-DG303A, DG381 A-DG390A 


Battery Operated 
or Battery Back- 
up Supply 


2) Minimum Number 
of Power Supplies 


Only One or Two 
Supplies Needed 




CMOS DG300-DG308A, 
DG300A-DG307A, DG309 

^L/afi MISO D6 US6CJ AS olnQIS oUppiy; 

CMOS DG200, DG201, DG211, DG200A, 
DG201A, DG202, DG212 
(For MUX: DG506-DG509, 
DG506A-DG509A, DG528, DG529) 




3) Low Standby 
Power 


Low Standby 
Current 




CMOS DG304-DG308A, DG211, 
DG304A-DG307A, DG309, DG212 




1) Low Signal 
Distortion 


Low rDS(on); 
Constant rDS(on) 


JFET is Constant, 
rDS(on); Signal 
Range Limited 
Toward Negative 
Supply; 

CMOS Slight rDS(on) 

VdilallUil, Pull Oiyildl 

Range 


JFET DG180-DG191 

CMOS DG300-DG308A, DG381-DG390, 
DG300A-DG307A, DG309, 
DG381A-DG390A, DG5040-DG5045 
DG243 (Make-Before-Break) 




2) Low Noise 
(Channel) 


LowrDS(on) 




CMOS DG300-DG308A, DG381-DG390, 

DG300A-DG307A, DG309, 

DG381A-DG390A, DG5040-DG5045, 

DG243 
JFET DG180-DG191 


Audio 


3) Wide Signal 
Range 


±15V Signal 
Range 




CMOS DG300-DG308, DG381-DG390, 
DG300A-OG307A, DG309, 
DG381A-DG390A, DG5040-DG5045, 
0G243 

CMOS DG200, DG200A, DG201, 
DG201A, DG202, DG211, DG212 
(MUX: DG506-DG509, DG506A- 
nfi^nQA DR'iPR nr^R9Q\ 






Signal Range is 
From the Positive 
Supply to Above 
the Negative 
Supply 


Higher rDS(on) 
(Must Stay Above 
Negative Supply By 
5V to 7.5V) 


JFET (75Q) DG182, DG185, DG188, 
DG191 

(10Q, 30Q) Remainder of 
DG181-DG190 Family 




4) Large Dynamic 
Range 


Wide Signal 
Range and Low 
Thermocouple 
Noise 




CMOS DG304-DG308A, 
DG304A-DG307A, DG309 

DG300-DG303, DG381-DG390, DG211, 
DG300A-DG303A, DG381A-DG390A, 
DG212 


Video 

(Higli Frequency) 


1)High OFF 
Impedance, Small 
Feedthrough of 
Signal 


High OFF 
Isolation 


Higher rDS(on) 


JFET (302, 752) DG181, DG182, DG184, 
DG185, DG187, DG188, DG190, DG191 

CMOS DG200, DG201, DG211, DG200A, 
DG201A, DG202, DG212 

CMOS DG300-DG308A, DG381-DG390, 
DG300A-DG307A, DG309, DG381A- 
DG390A, DG5040-DG5045, DG243 


2) Good Impedance 
Matching, 
Minimum Signal 
Drop Across 
Switch 


Low rDS(on) 


Lower OFF Isolation 


JFET (102) DG180, DG183, DG186, 
DG189 

(302) DG181, DG184, DG187, 
DG190 

CMOS DG300-DG308A, DG211 
DG300A-DG307A, DG309, DG212 



Bold Print = Recommended for the application 



© 10 MASTER 1983 



Siliconix 



2781 



Analog Switches Selector Guide (confd) 



Application 


Feature of 
Appiication 


important 
Parameters 


Major 
Tradeoffs 


Suggested Switclies 




1) Low Droop Rate 


Low Leakage 


Higher ON 
Resistance 


CMUo DUoUOA-DGoOrA, DG300, DG309 

DG381A-DG390A 
CMOS DG300-DG308A, DG381-DG390, 

DG5040-DG5045 

JFET DG180-DG191 
CMOS DG200, DG201, DG211, DG200A, 
DG201A, DG202, DG212 


Sample and 
Hold 


2) Low Sample to 
noia UTTset 


Low Charge 
Coupling 


Higher ON 
Resistance 


CMOS DG200A, DG201A, DG202, 

CMOS DG200, DG201, DG211 

JFET DG181, DG182 

(30Q, 75Q) DG184, DG185, 
DG187, DG188, DG190, DG191 
CMOS DG300-DG308A, 
DG300A-DG307A, DG309 




3) Fast Acquisition 
Speed 


Low ON 
Resistance 


Higher Leakage 
Higher Charge 
Coupling 


JFET (10Q) DG180, DG183, DG186, 
DG189 

(30Q, 75Q) Remamder of DG181- 
DG191 Family 
CMOS DG300-DG307, DG381-DG390, 

DG300A-DG307A 
CMOS DG200, DG201, DG211, DG212 
CMOS DG381A-DG390A, DG200A, 
DG201A, DG202 


Switching to 
High 


1) Low Error Voltage 


Low Leakage 




CMOS DG300A-DG307A, 
DG381A-DG390A 

CMOS DG300-DG307, DG381-DG390, 
DG5040-DG5045, DG200-DG201, 
DG211, DG200A, DG201A, DG212 


Impedance 
Inputs 


2) Low Switching 
Transient Error 
Voltage 


Low Charge 
Coupling 




CMOS DG200A, DG201A, DG202, 
DG212 

CMOS DG200, DG201, DG211 

DG300-DG307, DG381-DG390, 
DG300A-DG307A, DG381 A-DG390A 


Low Cost 


1) Best Performance 
for Lowest Cost 


Monolithic 
Good Switch 
Performance 




CMOS DG211, DG212, DG303, DG309, 
DG308A, DG300-DG307, DG5040-DG5045 

DG200, DG201 , DG381 -DG390, 
DG200A, DG201A, DG202, 
DG300A-DG307A, DG243, 
DG381A-DG390A 


Military System 


1) Hi-Rel Specified 






BS9000 

JM38510/XXXXX 


Differential 

Signal 

Switching 


1) Good Matching of 
Switch 
Parameters 


Monolithic Switch 




CMOS DG300, DG302, DG303, DG304, 

f>^%njn n^%AA0 n^^AA^ n^^AAOA 

DG243, DG306, DG307, DGSOoA, 
DG381, DG384, DG390, DG309 

CMOS DG200, DG201, DG211, 
DG5040-DG5045, DG300A, DG302A, 
DG303A, DG304A, DG306A, DG307A, 
DG309, DG381A, DG384A, DG390A, 
DG200A, DG207A, DG202, DG212 


2) Low Thermo- 
couple Offset 
Voltage 


Drain and Source 
of FET Switch in 
Close Proximity 
on Small Chip 


JFET Switches Not 
Monolithic 


JFET DG183, DG184, DG185 






Low Power Dissi- 
pation on Switch 
Driver 




CMOS DG304, DG306, DG307, DG308A 
DG304A, DG309 

DG300-DG303, DG300A-DG303A, 
DG306A, DG307A, DG381-DG390, 
DG381A-DG390A, DG309 



Bold Print = Recommended for the application 



2782 



Siliconix 



© 10 MASTER 1983 



Analog Switches Selector Guide (Confd) 



Application 


Feature of 
Application 


Important 
Parameters 


Major 
Tradeoffs 


Suggested Switches 




1) Low Noise 
(Channel) 


Low rDS(on) 


Higher Leakages 


JFET (10Q) DG180, DG183, DG186, 
DG189 

{30Q, 75Q) Remainder of 
DG181-DG191 Family 




2) Low Charge 
Coupling 






CMOS DG300A-DG307A, DG309, 
DG381A-DG390A, DG212, DG308A 

CMOS DG300-DG308, DG381-DG390, 
DG211 


Small Signal 
(<1V) 


3) High Impedance 
Inputs of Load 


Low Leakage 


Higher rDS(on) 


CMOS DG300-DG308A, DG381-DG390, 
DG211, DG5040-DG5045, DG243, DG309 

DG200-DG201 
JFET DG181, DG182, DG184, DG185, 

DG187, DG188, DG190, DG191 
CMOS DG300A-DG307A, DG309, 

DG381A-DG390A, DG212 




4) Low Thermo- 
couple Offset 
Voltage 


Low Power Switch 




CMOS DG304-DG307, 
DG304A-DG307A, DG381A-DG390A 

DG300-DG303, DG381-DG390, 
DG300A-DG303A 






Drain and Source 
of FET Switch in 
oiuoc rioximiiy 
on Small Chip 




JFET DG180-DG190 Family 




1) tjreaK-tseTore- 
Make Switching 


ton is Greater 
Than toff 




DG507A, DG508, DG508A, DG509, 
DG509A, DG528, DG529 (Latchable) 




2) Binary Controlled 
Logic Inputs 


Binary Decoding 
Stage on Chip 




PMOS DG501, DG503 


Multiplexing 


3) Differential Multi- 
plexing 


Dual Switching 
Action 




CMOS DG507, DG509, DG507A, 
DG509A, DG529 




4) D/A Conversion 


Binary Weighted 
ON Resistance 
and Channel 
Resistance to 
Minimize Error 




NMOS DG515, DG516 



Bold Print = Recommended for the application 



® 10 MASTER 1983 



Siliconix 



2783 



Dual Monolithic SPST 
CMOS Analog Switch 

designed for . . . 

■ Analog Multiplexing 

■ Servo Control Switching 

■ Video Signal Switching 

■ Remove Switching under TTL Logic 
Control 



liliconix 



BENEFITS 

• Environmentally Rugged 

o 44V Power Supply Maximum Rating 
o Static Protected Logic Inputs 
o Latchproof 

• Easily Interfaced 

o TTL and CMOS Compatible without 
Pull-Up Resistors 

• Pin for Pin Compatible with 

o Analog Devices ADG200 
o Harris HI200 
o Intersil DG200 
o Siliconix DG200 



DESCRIPTION 

The DG200A designed on the Siliconix PLUS-40 CMOS process provides solid state switch action with 70 ohms contact 
(ON) resistance and very high OFF resistance. True switch action takes place over the full analog signal range of +15 V, with 
Break- Before- Make operation to prevent momentary shorting of signal inputs. 



PIN CONFIGURATIONS 



Metal Can Package 

V+ (SUBSTRATE AND CASE) 




LOGIC 


SWITCH 



1 


ON 
OFF 



ORDER NUMBERS: 
DG200AAA OR DG200ABA 
SEE PACKAGE 2 



ORDER NUMBERS: 
DG200AAK OR DG200ABK 
OR DG200ACK 
SEE PACKAGE 9 

DG200ACJ 
SEE PACKAGE 7 



iN2[::^ 

NC LT* 



Dual-ln-Line Package 

iTbiNi 



Y V 

D2CfT 1 I "T^ Dl 



12J NC 
12 



(SUBSTRATE) 

TTj NC 



SWITCH STATES ARE FOR LOGIC "1" INPUT (POSITIVE LOGIC) 



SCHEMATIC DIAGRAM (typical channel 

V* f 



(Ny O- 



v-0- 



■AVv- 



i 



S,^ COMf 




-O Sy 



2784 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 



Voltages referenced to V- 

V+ 44 V 

GND. 25 V 

Digital Inputs'*, Vs, Vp -2 V to (V+ +2 V) or 

20 mA, whichever occurs first. 
Current, Any Terminal Except S or D . . . . 30 mA 

Current, S or D 20 mA 

Current, S or D Pulsed 

(1 msec, 10% Duty Cycle Max) 100 mA 

Operating Temp. (A Suffix) -55 to 125°C 

(B Suffix) -20 to 85° C 

(C Suffix) to 70°C 



Storage Temp. (A & B Suffix) .... -65to150°C 

(C Suffix) -65to+125°C 

Power Dissipation (Package)* 

Metal Can** ........ 450 mW 

14 Pin DIP*** 825 mW 

14 Pin Plastic DIP**** ........ 470 mW 



*Device mounted with all leads welded or soldered 
to PC board. 
** Derate 6 mW/°C above 75°C 
*** Derate 1 1 mW/°C above 75°C 
****Derate 6.5 mW/°C above 25°C 



ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25°C. Lots are sample-tested for AC 
parameters and high and low temperature limits to assure conformance with specifications. 













MAX LIMITS 
















T YP^ 


A SUFFIX 


B/C SUFFIX 


UNIT 


TEST CONDITIONS, UNLESS NOTED: 






UMAMALIbMlbllU 


25° C 


-55°C 


25°C 


^2S°c 


-20/ 

o°c 


25X 


85/ 
70°C 


V+ = 15 V. V- = -15 V, Gnd = 0, 


1 




^ANALOG 


Minimum Analog Signal 
Handling Capability 


*15 




±15 


±15 




±15 


±15 


V 




2 




"^DSIon) 


Drain Source 


45 


70 


70 


100 


80 


80 


100 


it 


Vq = 10 V 


V|M = 0.8 V 


3 


S 


ON Resistance 


45 


70 


70 


100 


80 


80 


100 


Vq = -10 V 


Is = -1 mA 


4 


w 
1 


'S(off) 


Source OFF 


+0.01 




2 


100 




5 


100 




Vs= +14 V, Vo= -14 V 




5 


T 
C 


Lealtage Cl rent 


-0.02 




-2 


-100 




-5 


-100 




Vs = -14 V, Vq = 14 V 


V,|vj = 2.4 V 


6 


H 


'D(off) 


Drain OFF 


+0.01 




2 


100 




5 


100 


nA 


Vq = 14 V/ V/ 


7 




Leakage Current 


-0.02 




-2 


-100 




-5 


-100 


Vq = -14 V, Vs = 14 V 




8 




'D(on)^ 


Channel ON 


+0.1 




2 


200 




-5 


200 




Vq = Vs = 14 V 


V|M - 0.8 V 


9 




Leakage Current 


-0.1 




-2 


-200 




-5 


-200 




Vp =Vs = -14 V 


10 


1 


'iNH 


Input Current 


0.0009 




-1 


-10 




-1 


-10 




V|M = 2.4 V 


11 


N 
P 


Input Voltage High 


0.005 




1 


10 




1 


10 




Vif^ = 15V 


12 


U 
T 


'iNL 


Input Current 
Input Voltage Low 


-.0015 




-1 


-10 




-1 


-10 


V|N = 0V 


13 




^on 


Turn-ON Time 


440 




1000 






1000 




ns 


See Switching Time Test Circuit 


' 14 




^off 


Turn-OFF Time 


370 




500 






500 




15 


D 


Q 


Charge Injection 


-10 














pC 


Cl = lOOOpF, Vqem - OV, R^tN = OU 


16 


Y 
N 
A 
M 


Cs(off) 


Source OFF 
Capacitance 


9.0 
















Vs = 0, V|N = 5 V 


f = 140 kHz 


17 


1 

C 


CD(off) 


Drain OFF 
Capacitance 


9.0 














pF 


Vd = 0, V|N = 5V 


18 




^D(on)+ Cs(on) 


Channel ON Capacitance 


25 
















Vd = Vs = 0. V|N = 


19 




0IRR3 


OFF Isolation 


75 
















V|N = 5V 




20 




CCRR 


Channel to 
Channel Crosstalk 


90 
















Vs = 2 Vpp 


Zl = 75n 
f= 1 MHz 


21 


S 
U 
P 


1 + 


Pobiiive Supply Current 


0.8 




2 






2 




mA 


Both Channels "ON", or "OFF" V|n = or 2.4 V 


22 


1- Negative Supply Current 


-.23 




-1 






-1 





NOTES: ICME 

1 . Typical Values are for DESIGN AID ONLY, not guaranteed and not subject to production testing. 
2- iD(on) is leakage from driver info "ON" switch. 

3. "OFF" isolation ^ 20 log VsA/p, Vr = input to OFF switch, Vq = output 

4. Signals on Sx, Dx or INx exceeding V+ or V- will be clamped by internal 
diodes. Limit forward diode current to maximum current ratings. 



® IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



Quad Monolithic SPST CMOS 
Analog Switch 

designed for . . . 

■ Analog Multiplexing 



Siliconix 



Remote Switching under 
TTL Logic Control 

Servo Control Switching 

Sampled Data Systems 

Programmable Gain 
Amplifiers 



BENEFITS 



Environmentally Rugged 

o 44V Power Supply Maximum Rating 
o Static Protected Logic Inputs 
o Latchproof 
Easily Interfaced 

o TTL and CiVlOS Compatible without 
Pull-Up Resistors 

o Logic Inputs Accept ± Comparator 
Transitions without Series Current Limit- 
ing Resistors 

Pin for Pin Compatible with 

o Analog Devices ADG201 

o Harris HI201 

o Intersil DG201 

o Siliconix DG201 



DESCRIPTION 

The DG201A designed on the Siliconix PLUS-40 CMOS process provides solid state switch action with 175 ohms contact 
resistance and very high OFF resistance. True switch action takes place over the full analog signal range of ±15V, with 
Break-Before-Make operation to prevent momentary shorting of signal inputs. Charge injection has been reduced by design 
to minimize spikes during switching transitions. 



PIN CONFIGURATION 

Dual-ln-Line Package 



14p ^2 

ijj^ V+ (SUBSTRATE) 

TTb s . 



LOGIC 


SWITCH 



1 


ON 
OFF 



ORDER NUMBERS: 
DG201AAK, DG201ABK OR DG201ACK 
SEE PACKAGE 10 

DG201ACJ 
SEE PACKAGE 8 

SWITCH OPEN FOR LOGIC "1" INPUT (POSITIVE LOGIC) 



FUNCTIONAL DIAGRAM (typical channel) 



IN^O- 



LOGIC 
INTERFACE 
AND 

PROTECTION GND 



v+ 

? 


> — 


LEVEL 




SHIFTER 



T 

V- 



■OSx 



SWITCH 
CONTACT 



-ODx 



2786 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

Voltages referenced to V- 

V+ 44 V 

GND. 25 V 

Digital inputs^ Vs, Vp -2 V to (V"^ +2 V) or 

20 mA, whichever occurs first. 

30 mA 
. . 20 mA 



Current, Any Terminal Except S or D . . 
Continuous Current, S or D . . . . . 
Peak Current, S or D 

(pulsed at 1 msec, 10% duty cycle max) 
Storage Temperature (A & B Suffix) 
(C Suffix) . . 
Operating Temperature (A Suffix) . 

(B Suffix) . 
(C Suffix) . 



70 mA 
-65 to 150°C 
-65 to 125°C 
-55 to 125°C 
-20 to 85° C 
to 70° C 



Power Dissipation (Package)' 

16 Pin DIP** 

16 Pin Plastic DIP*** . . 



900 mW 
470 mW 



*Device mounted with all leads soldered or v^/elded 
to PC board. 
** Derate 12 mW/°C above 75°C 
***Derate 6.5 mW/°C above 25°C 

Stresses listed under "Absolute Maximum Ratings" may be applied 
(one at a time) to devices without resulting in permanent damage. 
This is a stress rating only and not subject to production testing. 
Exposure to absolute maximum rating conditions for extended 
periods may affect device reliability. 



ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25° C. Lots are sample-tested for AC 
parameters and high and low temperature limits to assure conformance with specifications. 













MAX LIMITS 
















TYP 


A SUFFIX 


B/C SUFFIX 


UNIT 


TEST CONDITIONS, UNLESS NOTED; 






CHAKACIEHIbMC 


25' 


-55'C 


25"C 


125"C 


-20X/ 


25-C 


85"C/ 
70C 


V+ = 15V, V- = -15V, Gnd = 


1 




^ANALOG 


Minimum Analog Signal 
Handling Capability 


±15 




±15 


±15 




±15 


±15 


V 




2 




^DS(on| 


Drain Source 


105 


175 


175 


250 


200 


200 


250 


Si 


Vd = 10 V 


V|M =0.8 V, 


3 




ON Resistance 


115 


175 


175 


250 


200 


200 


250 


Vq = -10 V 


Ig = -1 mA 


4 


S 
W 


'S(off) 


Source OFF 


0.01 






100 




5 


100 




Vs =14 V, Vq = - 14 V, 




5 


1 

T 


Leakage Current 


-0.02 






-TOO 




-5 


-100 




Vg = -14 V, V[) = 14 V 


V|N =2.4V 


6 


C 
H 


'D(off) 


Drain OFF 


0.01 






100 




5 


100 


nA 


Vq = 14 V, Vg = - 14 V 


7 


Leakage Current 


-0.02 






-100 




-5 


-100 


Vq = -14 V, Vg = 14 V 




8 




'D(on)^ 


Drain ON 


0.1 






200 




5 


200 




Vq = Vg = 14 V 


V|M =0.8 V 


9 






Leakage Current 


-0.15 






-200 




-5 


-200 




Vq = Vg = -14 V 


10 


1 


'iNH 


Input Current 


-.0004 






-10 




-1 


-10 


mA 


V|fg =2.4 V 


11 


N 
P 
U 
T 


Input Voltage High 


.003 






10 




1 


10 


V|M=15V 


12 


'iNL 


input Current 
Input Voltage Low 


-.0004 






-10 




-1 


-10 




V|rg =0V 


13 




*on 


Turn-ON Time 


480 




1000 






1000 




ns 


.^po ^vA/itrhinn Timo TpQt Pirriiit 


14 




•off 


Turn-OFF Time 


370 




500 






500 








15 




Q 


Charge Injection 


20 














pC 


Cl = lOOOpF Vqen = ov Rgen = 0" 


16 


D 
Y 
N 


CS(off) 


Source OFF 
Capacitance 


5 
















Vg = 0, V|M = 5 V 


f = 140 kHz 


17 


A 
M 
1 

r 


CD(off) 


Drain OFF 
Capacitance' 


5 














pF 


Vq = 0, V|N = 5V 


18 




CD(on) + Cs(on) 


Channel ON Capacitance 


16 
















Vd = Vg = 0. V|N = 




19 




OIRR 


OFF Isolation 


70 
















V|N = 5V 




20 




CCRR 


Channel to 
Channel Crosstalk 


90 














dB 


Vs = 2 Vpp, f = 100 KHz 
Zl = 7511 




21 


s 
u 
p 


l-t- 


Positive Supply Current 


.9 




2 






2 




mA 


All Channels "ON" or "OFF' 


, V|N =0 or 2.4 V 


22 


1 - Negative Supply Current 


-.3 




-1 






-1 





NOTES: ICMC-B 

1. Typical Values are for DESIGN AID ONLY, not guaranteed and not subject to production testing. 

2. iD(on) leakage from driver into "ON" switch. 

3. Signals on Sx. Dx or INx exceeding V+ or V- will be clamped by internal diodes. Limit 
forward diode current to maximum current ratings. 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



2787 



Quad Monolithic 
SPSTCAAOS 
Analog Switch 

designed for . . . 

■ Analog Multiplexing 

■ Remote Switching under TTL 
Logic Control 

■ Servo Control Switching 

■ Sampled Data Systems 

■ Programmable Gain Amplifiers 



Sillconix 



BENEFITS 

• Environmentally Rugged 

o 44 V Power Supply Max Rating 
o Static Protected Logic Inputs 
O Latch Proof 

• Easily Interfaced 

o TTL and CMOS Compatible Without Pullup 
Resistors 

o Logic Inputs Accept ± Comparator Tran- 
sitions Without Series Current Limiting 
Resistors 

• Pin for Pin Compatible 

o Intersil IH202 
o National LF11202 



DESCRIPTION 

The DG202 designed on the Siliconix PLUS-40 CMOS process provides solid state switch action with 175 ohms contact 
resistance and very high OFF resistance. True switch action takes place over the full analog signal range of ±15 V, with BREAK- 
BEFORE-MAKE operation to prevent momentary shorting of signals inputs. Charge injection has been reduced by design to 
minimize spikes during switching transitions. 



PIN CONFIGURATION 



Dual In-Line Package 



V- c[T 

GND C 



J--1 ■ 



IN4 C[I '-<K>E3 IN 



TJJd V+ (SUBSTRATE) 



LOGIC 


SWITCH 



1 


OFF 
ON 



ORDER NUMBERS: 
DG202AK, DG202BK OR DG202CK 
SEE PACKAGE 10 
ORDER NUMBER: 

DG202CJ 
SEE PACKAGE 8 

SWITCH CLOSED FOR LOGIC "1" 
INPUT (POSITIVE LOGIC) 



FUNCTIONAL DIAGRAM (typical switch) 



LOGIC 
INTERFACE 
AND 

PROTECTION C5ND 



'NxO 



v+ 

? 


> — 


LEVEL 




SHIFTER 



1 

V- 



-OSx 



SWITCH 
CONTACT 



-ODx 



2788 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

Voltages referenced to V - 

V4- 44V 

GND 25V 

Digital inputs^, Vs, Vq -2Vto(V+ +2V)or 

20 mA, whichever occurs first 

Current, Any Terminal Except S or D 30 mA 

Continuous Current, S or D 20 mA 

Peak Current S or D 

(pulsed at 1 msec, 10% duty cycle max) 70 mA 

Storage Temperature (A & B Suffix) -65to150°C 

(C Suffix) -65to125°C 

Operating Temperature (A Suffix) - 55 to 125°C 

(B Suffix) -20 to 85 °C 

(C Suffix) 0to70°C 



Power Dissipation (Package)* 

16-Pin DIP** 900 mW 

16-Pin Plastic DIP*** 470 mW 

* Device mounted with all leads soldered or welded to PC 
board. 

**Derate 12 mW/ °C above 75°C. 
***Derate 6.5 mW/ °C above 25°C. 



Stresses listed under "Absolute Maximum Ratings" may be applied 
(one at a time) to devices without resulting in permanent damage. 
This is a stress rating only and not subject to production testing. 
Exposure to absolute maximum rating conditions for extended 
periods may affect device reliability. 



ELECTRICAL CHARACTERISTICS 



All DC parameters are 100% tested at 25°C. Lots are sample-tested for AC parameters and high and low temperature limits to 
assure conformance with specifications. 













MAX LIMITS 












rHAPflrTFPicTir 


TYP' 


A SUFFIX 


B/C SUFFIX 


UNIT 


Itbl UUIMUIIIUNii. 
UNLESS NOTED: V+ = 15 V, 
V- = -15 V, GND = 










2S»C 


-55«C 


2S»C 


125°C 


-20»C/ 
0°C 


25»C 


85»C/ 
70»C 


1 




^ANALOG 


Minimum Analog 
Signal Handling 
Capability 


±15 




±15 


±15 




±15 


±15 


v 




2 






Drain-Source 


105 


175 


175 


250 


200 


200 


250 


12 


Vd = 10 V 


V|M = 2.4 V, 


3 


S 
W 
1 


''DSIon) 


ON Resistance 


115 


175 


175 


250 


200 


200 


250 


Vd = -10 V 


Ig = -1 mA 


4 




Source OFF 


0.01 




1 


100 




5 


100 




Vs=14V, Vp=-14 V 




5 


T 
C 


'sioHl 


Leakage Current 


-0.02 




-1 


-100 




-5 


-100 




Vj^ -14 V, Vd = 14 V 


V|^; = 0.8 V 


6 


H 




Drain OFF 


0.01 




1 


100 




5 


100 


nA 


Vq= 14 V, Vs = -14 V 


7 




'dIoHI 


Leakage Current 


-0.02 




-1 


-100 




-5 


-100 




Vq = -14 V, Vs= 14 V 




8 




, 2 
'DIonI 


Drain ON 


0.1 




1 


200 




5 


200 




Vd V5 = 14V 


V|N-2.4V 


9 




Leakage Current 


-0.15 




-1 


-200 




-5 


-200 




Vd=Vs=-14 V 


10 


1 




Input Current, 


-.0004 




-1 


-10 




-1 


-10 




V|r, = 2.4V 


11 


N 
P 


'iNH 


Input Voltage High 


.003 




1 


10 




1 


10 




V,fj = 15 V 


12 


U 
T 


'iNL " 


Input Current, 
Input Voltage Low 


-.0004 




-1 


-10 




-1 


-10 




V|N=0 


13 




ton 


Turn-ON Time 


480 




1000 






1000 




ns 


See Switching Time Test Circuit 


14 




'off 


Turn-OFF Time 


370 




500 






500 




15 




Q 


Charge Injection 


20 














pC 


CL = 1000pF,VGEfj = V, Rgei>j = 012 


16 


D 
Y 
N 
A 
M 


Csiotfl 


Source OFF 
Capacitance 


5 
















Vs = 0, V|^j=0 V 




17 


t^Dloff) 


Drain OFF 
Capacitance 


5 














pF 


Vd=0. V|m = V 


f=140 KHz 


18 


1 

C 


Coionl + Csionl 


Channel ON 
Capacitance 


16 
















Vd=Vs = 0, V,fj=5V 




19 




OIRR 


Off Isolation 


70 
















V|^j = V 




20 




CCRR 


Channel to 
Channel Crosstalk 


90 














dB 


Vs = 2 Vpp, f=100 KHz, Zl=75« 


21 


s 
u 
p 


1 + 


Positive Supply 
Current 


.9 




2 






2 




mA 


All Channels "ON" or "OFF," 


22 


p 

L 

y 


1- 


Negative Supply 
C^'rrent 


-.3 




-1 






-1 




V|^J=0 or 2.4 V 





NOTES: 

1. Typical Values are for DESIGN AID ONLY, not guaranteed and not subject to production testing. 3. Signals on S^, D^ or IN^ exceeding V + or V will be clamped by internal ICMC-D 
2- 'Dion) leakage from driver into "ON" switch. dioded. Limit forward diode current to maximum current ratings. 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



Quad Monolithic SPST CMOS 
Analog Switch 

designed for . . . 



Siliconix 



■ Low Transient Switching 
i.e.. Sample and Hold Circuits 

■ Switching Multiple Signals 
such as Multiplexing Inputs 

■ High Frequency Signal 
Switching e.g.. Computer 
Peripheral Equipment 

■ TTL Compatible Systems 

Including Microprocessor 
Systems 



DESCRIPTION 



BENEFITS 

• Environmentally Rugged 

o Latchproof 

o Power Supply Overvoltage to 40V Max 

• Reduced Switching Error 

Low Charge Coupling 

• Easily Interfaced 

o TTL, DTL and CMOS Compatible 
without Pull Up Resistors 

• Reduces External Component Requirements 

^> ±15 V Analog Signal Range with ±15 V 
Supplies 

• Reduced System Cross-Talk 

^> Break-Before-iyiake Switching 

• Eliminates Signal Error 

o 0.01 nA Typical Leakage From Source 
Or Drain 

• Pin for Pin Compatible with 
o Intersil IH5052, IH201 

• Low Cost 



The DG21 1 designed on the Siliconix PLUS-40 CMOS process is a 4-channel single pole single throw analog switch with low and 
nearly constant ON resistance over the entire analog signal range. The switch will conduct current in either direction with no off- 
set voltage in the ON condition, and block voltages up to 30 V peak-to-peak in the OFF condition. The ON-OFF state of each 
switch is controlled by a driver. With a logic "0" at the input to the driver ( - 15 V to 0.8 V) thw switch will be ON, and a logic "1" 
(2.4 V to 15 V) will turn the switch OFF. The input can thus be directly interfaced with TTL, DTL, RTL, CMOS and certain PMOS 
circuits. Switch action is break-before-make. Logic inputs can directly connect to op-amp output swings. 



PIN CONFIGURATION 



Dual-ln-Line Package 



<1 



13^ V+ (SUBSTRATE) 
NC 

TTp S3 
10^ D3 



LOGIC 


SWITCH 



1 


ON 
OFF 



ORDER NUMBER: 

DG211CJ 
SEE PACKAGE 8 



SWITCH OPEN FOR LOGIC "1" INPUT (POSITIVE LOGIC) 



2790 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

V+ to V- 40 V 

V|fg to Ground V-, V+ 

Vl to Ground -0.3 V, 25 V 

Vs or Vq to V+ 0, -40 V 

Vgor Vq to V- 0. 40 V 

V+ to Ground 25 V 

V- to Ground -25 V 

Current, Any Terminal Except S or D 30 mA 

Continuous Current, S or D 20 mA 

Peak Current, S or D 

(pulsed at 1 msec, 10% duty cycle max) 70 mA 

ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25 C. Lots are sample-tested for AC parameters and high and 
low temperature limits to assure conformance with specifications. 



Storage Temperature -65 to 125°C 

Operating Temperature to 70°C 

Power Dissipation (Package)' 

16 Pin Plastic DIP** 470 mW 

'Device mounted with all leads soldered or welded to 
PC board. 
"Derate 6.5 mW/°C above 25° C 



CHARACTERISTIC 


TYP' 

25° C 


MAX 
LIMITS 
C SUFFIX 

25° C 


UNIT 


TEST CONDITIONS, UNLESS NOTED: 
V+ = 15 V, V- = -15 V, Gnd = 0, Vl = 5 V 


1 


S 

w 
1 

T 
C 
H 


Mm. Analog Signal 
^ANALOG Handling Capability 


±15 


±15 


V 




2 


Drain Source 
'°S(on) Resistance 


105 


175 


n 


Vo = 10V 


V|rg =08 V, ls = -1 mA 


3 


115 


175 


Vq= -10 V 


4 


Source OFF 

IS(off) 11,- 
^'""> Leakage Current 


0.01 


5 


nA 


Vs= 14 V, Vd = -14 V 


V|M = 2 4 V 


5 




'—5 


Vs =-14 V, Vd= 14 V 


6 


Dram OFF 
Leakage Current 


0.01 


5 


Vq- 14 V, Vs = 14 V 


7 


-0.02 


-5 


Vd= -14 V, Vs = 14 V 


8 


2 Drain ON 

Leakage Current 


0.1 


5 


Vd= Vs = 14 V 


V|M = 0.8 V 


9 


-0.15 


-5 


Vd = Vs = 14 V 


10 


1 

N 
P 
U 
T 


Input Current, 
'^^^ Input Voltage High 


-0.0004 


1 


mA 


V|M = 2.4V 


11 


0.003 


1 


V|M = 15 V 


12 


Input Current. 
Input Voltage Low 


-0.0004 


1 


Virj = o 


13 


D 
Y 
N 
A 
M 
1 

C 


ton Turn ON Time 


460 


1000 


ns 


Vs= 2 V 
R|_= IK S2 
Cl =35 pF 


See Switching Time 
Test Circuit 


14 


tgjj^ Turn OFF Time 


360 


500 


15 


1^(12 Turn OFF Time 


450 




16 


Source OFF 
5'°"' Capacitance 


5 




pF 


Vs = 0,V|N=5V 


f = 1 MHz 


17 


Drain OFF 
^DioU) Capacitance 


5 




VO = O.V|N = 5V 


18 


Channel ON 
CD(on)^Cs(on) capacitance 


16 




Vd = Vs = 0,V|m=0 


19 


OFF Isolation-' 


70 




dB 


V|rvj = 5 V, Rl = IK Si. Cl = 15 pF 
Vg= 1 VBMS, » =100 kHz 


20 


Interchannel 

Crosstalk 

Isolation 


90 




21 


S 
U 
P 


1+ Positive Supply Current 


0.35 


0.48 


mA 


V||.^= or 2.4 V 


22 


1— Negative Supply Current 


0.30 


0.48 


23 


II Logic Supply Current 


0.5 


1.2 



1 . Typical values are for DESIGN AID ONLY, not guaranteed and 
not subject to production testing. 

2. iD(on) leakage from driver into ON switch. 

IVsl 

3. OFF Isolation = 20 log , Vs = input to OFF switch. 

Vq = output. IVqI 



ICMC-A 



SWITCHING TIME TEST CIRCUIT 

Switch output waveform shown for Vs = constant with logic input waveform as shown. Note that Vs may be + or - as per 
switching time test circuit. Vq is the steady state output with switch on. Feedthrough via gate capacitance may result in 
spikes at leading and trailing edge of output waveform. 



LOGIC 
INPUT (INf) 
t, < 20 ns 50% 
tf < 20 ni 



SWITCH 
INPUT 



SWITCH 
OUTPUT (Vq) 



I 



0.9 Vq 



0.9 Vq 
Vo 



- 0.9 \ 
V 0.1 




(REPEAT TEST FOR IN2, IN3 AND IN4) 



"l * 'DSIonl 



Siliconix 

© ic MASTER 1983 ' See Product Selector Guides on Pages 2779-2783. 



Quad Monolithic SPST CMOS 
Analog Switch 

designed for . . . 



Siliconix 



■ Low Transient Switching 
i.e.. Sample and Hold Circuits 

■ Switching Multiple Signals 
such as Multiplexing Inputs 

■ High Frequency Signal 
Switching e.g.. Computer 
Peripheral Equipment 

■ TTL Compatible Systems 

Including Microprocessor 
Systems 



DESCRIPTION 



BENEFITS 

• Environmentally Rugged 
o Latchproof 

o 40 V Power Supply Max Rating 

• Reduced Switching Error 

o Low Charge Coupling 

• Easily Interfaced 

o TTL, DTL and CMOS Compatible with- 
out Pull Up Resistors 

• Reduces External Component Requirements 

o ±15 V Analog Signal Range with ±15 V 
Supplies 

• Reduced System Cross-Talk 

o Break-Before-Make Switching 

• Eliminates Signal Error 

o 0.01 nA Typical Leakage From Source 
or Drain 

• Pin for Pin Compatible with Intersil IH5053, 
iH202 

• Opposite Logic Control of DG211 

• Low Cost 



The DG212 designed on the Siliconix PLUS-40 CMOS process is a 4-channel single pole single throw analog switch with low 
and nearly constant ON resistance over the entire analog signal range. The switch will conduct current in either direction 
with no offset voltage in the ON condition, and block voltages up to 30 V peak-to-peak in the OFF condition. The ON- 
OFF state of each switch is controlled by a driver. With a logic "0" at the input to the driver (-15 V to 0.8 V) the switch 
will be OFF, and a logic "1" (2.4 V to 1 5 V) will turn the switch ON. The input can thus be directly interfaced with TTL, 
DTL, RTL, CMOS and certain PMOS circuits. Switch action is break-before-make. Logic inputs can directly connect to 
op-amp output swings. 



PIN CONFIGURATION 



Dual-ln-Line Package 



V- c[T 

GND 



3- 



iTj^ V+ (SUBSTRATE) 
'up Vl (+5V) 

°3 



LOGIC 


SWITCH 



1 


OFF 
ON 



ORDER 

NUMBER: 

DG212CJ 

SEE PACKAGE 8 



SWITCH CLOSED FOR LOGIC "1" INPUT {POSITIVE LOGIC) 



2792 



© 10 MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

Power Dissipation (Package)* 

16 Pin Plastic DIP** 470 mW 

"Device mounted with all leads soldered or welded to 
PC board. 
**Derate 6.5 mW/°C above 25°C 



Stresses listed under "Absolute Maximum Ratings" may be applied 
(one at a time) to devices without resulting in permanent damage. 
This is a stress rating only and not subject to production testing. 
Exposure to absolute maximum rating conditions for extended 
periods may affect device reliability. 



ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25"C. Lots are sample-tested for AC parameters and high and 
low temperature limits to assure conformance with specifications. 



CHARACTERISTIC 


TYPi 


M/VX 
LIMITS 
C SUFFIX 


UNIT 


TEST CONDITIONS. UNLESS NOTED: 
V+ = 15 V, V- f -15 V. Gnd = 0. Vl = 5 V 


1 




^ANALOG 


Mm. Analog Signal 
Handling Capability 


±15 


±15 


V 




2 




rOSIon) 


Dram Source 


105 


1 75 




Vp = 10 V 


V|N = 2.4 V, Is = -1 mA 


3 


S 


ON Resistance 


115 


1 75 


Vq = -10 V 


4 


w 
1 


ISIotf)' 


Source OFF 


01 


5 




Vg = 14 V, Vp= 14 V 




5 


T 
C 


Leakage Current 


02 


-5 




Vg = -14 V, Vq = 14 V 


V|N = 0.8 V 


6 


H 


lD(of<l 


Dram OFF 


01 


5 


nA 


Vd= 14 V, Vg = 14 V 


7 




Leakage Current 


02 


-5 


Vd= -14 V, Vs = 14 V 




8 




lD(on|2 


Dram ON 


0.1 


5 




Vp= Vs = 14 V 


V|N = 2.4 V 


9 




Leakage Current 


0.15 


- 5 




Vq = Vs = -14 V 


10 


1 


l|NH 


Input Current, 


0004 


, 1 




V||sj = 2,4 V 


1 1 


N 
P 


Input Voltage High 


003 


1 


pA 


V|M=15V 


12 


U 
T 


l|NL 


Input Current, 
Input Voltage Low 


0.0004 


1 


V|M=0 


13 




^on 


Turn-ON Time 


460 


600 




Vs = 2 V 
Rl_ = IK S! 


See Switching Time 
Test Circuit 


14 




'offl 


Tur'n-OFF Time 


360 


450 


ns 


15 




'off2 


Turn OFF Time 


450 






Cl = 35 pF 




16 


D 


CsioffI 


Source OFF 
Capacitance 


5 






Vs =0, V||M = V 




17 


Y 
N 
A 


CDIoffj 


Dram OFF 
Capacitance 


5 




pF 


Vd = 0. V|N =0 V 


f = 1 MH? 


18 

I 


M 

C 


CD(on) * Csion) 


Channel ON 
Capacitance 


16 






Vd = Vs = 0, V|m = 5 V 




19 




OFF Isolation-^ 


70 






V|N = V, Ri_= IK Si, Cl= 15 pF 
Vg= 1 VRMS, f =100 kHz 


20 




Inierchannel 
Crosstal k 
Isolation 


90 




clB 


21 


S 

u 


1+ Positive Supply Current 


0.35 


0.48 








22 


1- Negative Supply Current 


0.30 


0.48 


mA 


V||,j= or 2 4 V 




23 


p 


II 


Logic Supply Current 


5 


1.2 










1 . Typical values are for DESIGN AID ONLY, not guaranteed and 


4. Signals on Sx, Dx 


or INx exceeding V+ or 


V- will be ICMC-C 



not subject to production testing. clamped by internal diodes. Limit forward diode current to 

2. iD(on) 's l^al^ags from driver into ON switch. maximum current ratings. 



I Vsl 

3. OFF Isolation = 20 log , Vs = input to OFF switch, 

Vq = output. ' ^D I 



Voltages referenced to V- 

V+ 44 V 

GND 25 V 

Digital inputs'^ Vs, Vq ■ - -2 V to (V+ +2 V) or 

20 mA, whichever occurs first. 

Current, Any Terminal Except S or D 30 mA 

Continuous Current, S or D 20 mA 

Peak Current, S or D 

(pulsed at 1 msec, 10% duty cycle max) 70 mA 

Storage Temperature -65 to 125°C 

Operating Temperature to 70°C 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



Quad Monolithic SPST CMOS 
Analog Switch with 
Data Latches 

designed for . . . 

■ Data Acquisition Systems 



Automatic Test Equipment 

Communication Systems 

Microprocessor Controlled 
Systems 



Siliconix 



BENEFITS 

• Environmentally Rugged 

O 44V Power Supply Max Rating 
O Static Protected 
O Latchproof CMOS Process 
O Improved Input Protection 



• Easily Interfaced 

O TTL Compatible Without Pullup Resistor 
O On-Chip Regulator Allows Wide Tolerance 

of Supplies Without Affecting TTL 

Switching Levels 

• Microprocessor Bus Compatible 

O Accepts 230 ns Write Plus Width 
O Guaranteed Break-Before-Make 

• Improved System Accuracy 

O Verror=0.45 max 

= 'D(on) 



^DS(on) 



DESCRIPTION 

The DG221 is designed on the SILICONIX PLUS-40 CMOS PROCESS providing solid state switch action with 60 ohms 
(typical) contact resistance and very high OFF resistance. True switch action tal<es place over the full analog signal 
range of ± 15V with guaranteed breal<-before-make switch action to prevent momentary shorting of input signals. 
The input protection circuitry protects inputs from static damage and gives high noise immunity. Charge injection 
has been reduced by design to minimize switching transients. Latches on all four switches result in /iP bus 
compatibility. 



PIN CONFIGURATION 



INi 



GND 



_ D Q - 


r Q D - 


>- 










r-l 


1 

_ D O J 


1 

L Q D - 







IN2 


INx 


WR 


SWITCH 


02 








ON 


1 





OFF 


S2 






Maintains 


v + 


X 


1 


Previous 
state 



12] WR 

jT] S3 



Logic "1" V|N > 2.4V 
Log ic "0" V|N < 0.8V 
WR input is level sensitive 
(not edge-triggered) 



ORDER NUMBERS: 
DG221AK, DG221BK or DG221CK 
SEE PACKAGE 10 

DG221CJ 
SEE PACKAGE 8 

SWITCHES ARE SHOWN IN THE LOGIC "1" INPUT STATE 




2794 



© 10 MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 



Voltages referenced to V- 

V+ 44V 

GND ^ 25V 

Digital inputs WR, Vg, Vp^ - 2V to (V + + 2V) or 

20 mA, whichever occurs first 

Current, Any Terminal Except S or D 30 mA 

Continuous Current, S or D 20 mA 

Peak Current S or D 

(pulsed at 1 msec, 10% duty cycle max) 70 mA 

Storage Temperature (A &B Suffix) -65to ^-ISO'C 

(C Suffix) -65to +125°C 

Operating Temperature (A Suffix) ....... 55 to +125°C 

(B Suffix) -20 to +85°C 

(C Suffix) 0to+70°C 



Power Dissipation (Package)* 

16-Pin DIP** 900 mW 

16-Pin Plastic DIP*** 470 mW 

* Device mounted with all leads soldered or welded to 
PC board. 
** Derate 12 mW/°C above 75 °C. 
***Derate6.5 mW/°C above 25 °C. 

Stresses listed under "Absolute Maximum Ratings" 
may be applied (one at a time) to devices witliout 
resulting in permanent damage. This is a stress rating 
only and not subject to production testing. Exposure to 
absolute maximum rating conditions for extended 
periods may affect device reliability. 



ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25°C. Sample parts are tested for AC 
parameters and high and low temperature limits to assure conformance with specifications. 













I^AX Llf^lTS 












CHARACTERISTIC 


TYP^ 


A SUFFIX 


B/C SUFFIX 




TEST CONDITIONS, UNLESS NOTED 










25''C 


-55°C 


25''C 


125°C 


-20*C/ 
0°C 


25°C 


85°C/ 
70°C 




V-t- = 15V, V- = 


+ 15V, GND = 


1 




^ANALOG 


Analog Signal Handling 
Capability 


±15 




±15 


±15 




±15 


±15 


V 




2 




4 


Drain-Source ON 


60 


90 


90 


135 


90 


90 


135 


u 


Vd= 10V 


V|N = 0.8V 


3 


S 


i^DSIon) 


Resistance 


70 


90 


90 


135 


90 


90 


135 


Vd= - 10V 


13 = - 1 mA 


4 


W 
1 


'S(off) 


Source OFF Leakage 


0.01 




1 


100 




5 


100 




Vs= 14V, Vd= - 14V 




5 


T 
C 


Current 


-0.02 




-1 


-100 




-5 


-100 




Vs= - 14V, Vd= 14V 


V|fg = 2.4V 


6 


H 


'D(off) 


Drain OFF Leakage 


0.01 




1 


100 




5 


100 




Vd= 14V, Vs= - 14V 


7 




Current 


-0.02 




-1 


-100 




-5 


-100 


nA 


Vd= - 14V, Vs= 14V 




8 




1 2 


Drain ON Leakage 


0.1 




1 


200 




5 


200 




Vd = Vs=14V 


V|N = 0.8V 


9 




'D(on) 


Current 


-0.15 




-1 


-200 




-5 


-200 




Vd = Vs=-14V 


10 


1 


'iNH' 'wR H 


Input Current, 


-.0004 




-1 


-10 




-1 


-10 




V|fg = 2.4V 


11 


N 
P 


Input Voltage Higfi 


.003 




1 


10 




1 


10 




V|N = 15V 


12 


U 
T 


l|NL' 'WR L 


Input Current, 
Input Voltage Low 


-.0004 




-1 


-10 




-1 


-10 




V|N = OV 


13 


S 
U 
P 


1 + 


Positive Supply Current 


0.8 




1.5 






1.5 




mA 


All Cfiannels "ON" or "OFF", V||vj = or 2.4V 


14 


1- Negative Supply Current 


-.4 




-1.0 






-1.0 




15 




Q 


Chiarge Injection 


20 














pC 


Cl= 1000 pF, VQEfg = OV, RGEN = Of^ 


16 




Cs(off) 


Source Off Capacitance 


8 
















Vs = 0, V|N = 5V 




17 




CD(off) 


Drain OFF Capacitance 


9 














PF 


Vd = 0, V|n = 5V 


f=1 IVIHz 


18 


D' 


CD(on) + Cs(on) 


Cfiannel ON Capacitance 


29 
















Vd=Vs = O,V|n = 




19 


Y 
N 


OIRR 


Off isolation. 


70 














dB 


V|N = 5V 


20 


A 
M 
1 


CCRR 


Cfiannel to Ctiannel 
Crosstalk 


90 














Vs= 1 Vpp, f = 100 kHz, Rl= 1 kSJ, Cl= 15 pF 


21 


C 


'on 


Turn ON Time 






550 






550 






See Switcfiing Time Test Circuit, Fig, 1 


22 




'off 


Turn-OFF Tinne 






340 






340 




nS 


23 




ton, WR 


Turn ON Time Write 






550 






550 




See Switcfiing Time Test Circuit, Fig, 2 


24 




'off.WR 


Turn-OFF Time Write 






340 






340 







ICMM-A 

NOTES: 

1. Typical values are for DESIGN AID ONLY, not guaranteed and not subject to production testing. 

2. iD(on) 's leakage from driver mto "ON" switcti. 

3. Signals on S)(, D)(, WR or INx exceeding V -I- orV- will be clamped by internal diodes. Limit for- 
ward diode current to maximum current ratings. 

4. .irQ)S(on) guaranteed to be wittiin ±5% switcfi to switcti wittiin a package (not a tested 
parameter). 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



Monolithic General Purpose 
CMOS Analog Switch 

designed for . . . 



Siliconix 



Programmable Gain Amplifiers 
Analog Multiplexing 
Servo Control Switching 



BENEFITS 

• Transient Suppression 

o Make-Before-Break Switch Operation 

• Environmentally Rugged 

o 40V Power Supply Rating 
o Static Protected Logic Inputs 
o Latchproof 

• Easily Interfaced 

o TTL and CIVIOS Compatible without 
Pull Up Resistors 

• Reduces External Component Requirements 

o Full Rail to Rail Analog Signal Range 
o No Diode Protection Required Between 
V|_ and V+ for Power Supply Sequencing 

• Pin for Pin Compatible with 
o IH5043 

o HI 5043 

o DG5043, DG191, DG390 



DESCRIPTION 

The DG243 designed on the Siliconix PLUS-40 CMOS process provides solid state switch action with 50 ohms contact 
resistance and very high OFF resistance. True switch action takes place over the full analog signal range of ±15 volts, with 
Make-Before-Break operation improving transient response in programmable gain amplifiers. 



PIN CONFIGURATIONS 



DUAL SPOT 





SW 1 


SW 3 


LOGIC 


SW 2 


SW 4 





OFF 


ON 


1 


ON 


OFF 



ALL SWITCHES SHOWN IN 
THE LOGIC "1" 
SWITCH STATE 



Dual-ln-Line Package 



S3<IHJ-Y H 
NCC[7 j LjJj- 



T6>Si 
INi 
V- 
GND 
Vl 

$2 



TOP VIEW 



ORDER NUMBER: 
DG243AK or DG243CK 
SEE PACKAGE 10 

DG243CJ 
SEE PACKAGE 8 



FUNCTIONAL DIAGRAM (typical channel) 



IN> 



LOGIC 
INTERFACE 
AND 

PROTECTION GND 



V+ 

I 



^Sw__ LEVEL _ _ A 
SHIFTER "\ 



I 



-OSx 



SWITCH 
CONTACT 



-ODx 



2796 



© 10 MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 








Operating Temperature (A Suffix) .... -55tbl25°C 


Voltages referenced to V- 

V+ . . 




44 V 


Power Dissipation* 


(C Suffix) 


Oto 70° C 


vl- 




(GND 


-0.3 V) to 44 V 


Metal Can and Plastic DIP** 


. 450 mW 


GND 








25 V 


16 Pin DIP**** 




1 900 mW 


Digital inputs^ Vs, Vp -2 V to (V 


^+2 V) or 


Flat Pack***** 




, 900 mW 






30 mA, whichever occurs first. 














Current, Any Terminal Except S or D 
Continuous Current, S or D 
Peak Current, S or D 

(pulsed at 1 msec, 10% duty cycle max) 




. 30 mA 
30 mA 

. 100 mA 


*AII leads welded or soldered to PC board. 
** Derate 6 mW/°C above 75° C 
****Derate 12 mW/°C above 75° C 
*****Derate 10 mW/°C above 75° C 




Storage Temperature (A Suffix) .... 

(C Suffix) .... 


. -65 to 1 50° C 
. -65 to 1 25° C 


Stresses listed under "Absolute Maximum Ratings" may be applied 
lone at a time) to devices without resulting in permanent damage. 
This is a stress rating only and not subject to production testing. 
Exposure to absolute maximum rating conditions for extended periods 
may affect device reliability. 


ELECTRICAL CHARACTERISTICS 




All DC parameters are 100% tested at 25° C. Lots are sample-tested for AC 


parameters and high and low temperature limits to assure conformance with specifications. 










MAX LIMITS 




TEST CONDITIONS 
V+ = 15V, V- = -15 








CHARACTERISTICS 


A SUFFIX 


C SUFFIX 


UNIT 


/ 








-55*C 


25°C 


125'C 


o*c 


25°C 


70''C 




Vl = 5V, GND =0V 




1 




„ Minimum Analog Signal 
^ANALOG Handling Capability 




±15 


±15 




i15 


i15 


v 




2 




3 Drain Source 


50 


50 


75 


50 


50 


75 


n 


Vq = 10 V, Ig = -10 mA 




3 


S 
W 
1 


'■DS(on) ON Resistance 


50 


50 


75 


50 


50 


75 


S/q = -10 V, Ig = -10 mA 




4 


, 3 Source OFF 
Sfoffl II 

' Leakage Current 




1 


100 




1 


100 




Vg =14 V, Vq = - 14 V 




5 


T 




-1 


-100 




-1 


-100 




Vg = -14 V, Vq = 14 V 


Note 1 


6 


C 
H 


, 3 Drain OFF 




1 


100 




1 


100 


nA 


Vg = -14 V, V|3 = 14 V 


7 




D(off) , I. r~ 

^ ' Leakage Current 




-1 


-100 




-1 


-100 


Vg = 14 V, Vp = - 14 V 




8 




3 Drain ON 




2 


200 




2 


200 




Vg =Vd = 14 V 




9 




Leakage Current 




-2 


-200 




-2 


-200 




Vg = Vp = -14 V 




10 


1 

N 
P 


. 3 Input Current 

Input Voltage High 




±1 


±1 




±1 


±1 




V|NH=2.0V 


n 


U 
T 


. 3 Input Current 

Input Voltage Low 




±1 


±1 




il 


±1 


V|NL=0.8V 


12 




tgn'* Turn-ON Time 




500 






700 




ns 


Vg = ±10 V, Rl = IK!! 


Note 2 


13 




toff4 Turn-OFF Time 




1000 






1200 




Cl =35 pF 


14 




Q Charge Injection 


60 Typical 


pC 


Cl =1000pF,RGEN =0!!, 

Vgen = V 


15 


D 
Y 


_ Source OFF 
Capacitance 


15 Typical 








16 


N 
A 
M 
1 


_ Drain OFF 
'^<°"' Capacitance 


17 Typical 


PF 


Vs =Vd =0 V, 
f = 1 MHz 




17 


C 


^ P Channel ON 
^D(on) + >-S(on) Capacitance 


45 Typical 






Note 1 


18 




OIRR OFF Isolation 


75 Typical 




Zl = 75!! 
Vg =2 Vpp 








Interchannei 
CCRR Crosstalk 

Isolation 














dB 




19 








89 Typical 








f = 1 MHz 




20 


S 


1+3 Positive Supply Current 


300 


300 


300 


300 


300 


300 








21 


u 
p 
p 


1-3 Negative Supply Current 


-300 


-300 


-300 


-300 


-300 


-300 




V||,j =0 V or 2.4 V 




22 


L 
Y 


II"' Logic Supply Current 


300 


300 


300 


300 


300 


300 








23 


IqMP Ground Supply Current 


-300 


-300 


-300 


-300 


-300 


-300 










NOTES: 


















ICMK-C 






1 : V||\j = Input voltage to perform proper function. 
For Logic "l " — V|nh = 2.0 V 
For Logic "0" — V|f^L = "-^ ^ 




3: Limits of these parameters are tested 100% at 25 °C and 125°C for "/883" 
devices. 

4: For '7883" devices these parameters are 100%tested at 25°C. 








2: See Switching Time Test Circuit. 






5: Signals on Sx, Dx or INx exceeding V+ or V- will be clamped by internal diodes. 
Limit forward diode current to maximum current ratings. 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



Quad Monolithic SPST 
CMOS Analog Switch 

designed for . . . 

■ Portable, Battery Powered 
Instrumentation 

■ Automotive Applications 

■ Computer Peripherals 

■ Communication Systems 

■ High Speed Multiplexing 

■ Low Leakage Switching 

■ Sample and Hold 

■ Data Acquisition Systems 

■ Single or Dual Supply Systems 



Siliconix 



BENEFITS 

• High Speed Switching with 
Break-Bef ore-Make 

O ton = 130 nsec Typical 
O toff = 90 nsec Typical 

• Single Supply Operation 

O + 5V to + 30V 

• CMOS Compatible (positive logic) 

O For TTL Logic Compatibility Use DG202 

• Wide Signal Range ±15V 

• Low Standby Power 

O 300 /(W Max 

• Minimizes Signal Error 

O rps < 6012 Typical 

O iD(off) < 100 pA Typical 

O Minimized Switching Transients 

• Environmentally Rugged 

O Latchproof CMOS Process 



DESCRIPTION: 

The DG308A is a monolithic quad single-pole single-throw analog switch fabricated in complementary MOS tech- 
nology. In the ON condition, each switch will conduct current in either direction and in the OFF condition each 
switch will block voltages up to 30 volts peak to peak. The ON-OFF State of each switch is controlled by a driver. With 
CMOS logic 'V at the input the switch will be ON, with logic '0' at the input the switch will be OFF. 



PIN CONFIGURATION 



ORDER NUMBERS: 
DG308AAK, DG308ABK, DG308ACK 
SEE PACKAGE 10 
(CERDIP) 

DG308ACJ 
SEE PACKAGE 8 
(PLASTIC) 



Dual-ln-Llne Package 



3 



GND 

'N4 0{>^ ^<C>Pi "^3 



jjp V+ (SUBSTRATE) 
TF]d NC 
113 3, 



LOGIC 


SWITCH 





OFF 


1 


ON 



TOP VIEW 

SWITCH CLOSED FOR LOGIC "1" (POSITIVE LOGIC) 



2798 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

Voltages referenced to V- Operating Temperature (A Suffix) - 55 to +125''C 

V+ 44V (BSuffix) 20to+85°C 

GND 25V (CSuffix) 0to+70°C 

Digital inputs, Vg, Vq" - 2V to (V+ + 2V) or 20 mA, Power Dissipation (Package)* 

whichever occurs first 16-Pin DIP** . .900 nnW 

Current, Any Terminal Excepts or D 30 mA 16-Pin Plastic DIP* * * . .470mW 

Continuous Current, S or D 20 mA 

Peak Current S or D "Device mounted with all leads soldered or welded to PC 

(pulsed at 1 msec, 10% duty cycle max) . .- 70 mA board. 

Storage Temperature (A & BSuffix) - 65 to +150°C **Derate 12 mW/°C above 75°C. 

(CSuffix) -65to -(-125°C ** *Derate 6.5 mW/^C above 25°C. 

ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25''C. Lots are sample-tested for AC 
parameters and high and low temperature limits to assure conformance with specifications. 


CHARACTERISTIC 


TYP^ 
25°C 


MAX LIMITS 


UNIT 


TEST CONDITIONS. UNLESS NOTED 
V+ = 15V. V- = + 15V. GND = 


A SUFFIX 


B/C SUFFIX 


-55°C 


25° C 


125°C 


-20°C/ 
0°C 


25° C 


85°C/ 
70° C 


1 


S 

w 
1 

T 
C 
H 


Analog Signal Handling 

V A M A 1 CiCX „ 

ANALOt. Capability 


± 15 














V 




2 


Drain-Source ON 

Uo(on) 

Resistance 


60 


100 


100 


150 


100 


100 


125 


s> 


Vd= 10V, ls = - 1 mA 
Vd= - 10V. Is= 1 mA 


V|N=11V 


3 


60 


100 


100 


150 


100 


100 


125 


4 


Source OFF Leakage 
'S(off) Current 


0.1 




1 


100 




5 


100 


nA 


Vs= 14V. Vd= - 14V 


V|N = 3.5V 


5 


-0.1 ■ 




-1 


-100 




-5 


-100 


V5= - 14V. Vq= 14V 


6 


Drain OFF Leakage 
'D(off) Current 


0.1 














Vq= 14V. Vs= - 14V 


7 


-0.1 




-1 


-100 




-5 


,-100 


Vq= - 14V, Vs= 14V 


8 


2 Drain ON Leakage 
'D(on) Current 






1 


100 




5 


200 


Vd = Vs= 14V 


V|N = 11V 


9 


-0.1 




-2 


-200 




-5 


-200 


Vd = Vs= - 14V 


10 


1 

N 
P 
U 
T 


Input Current. 
Input Voltage High 


0.001 




1 


1 




1 




„A 


V|N=15V 


11 


12 


1 Input Current. 

Input Voltage Low 


-0.001 




-1 


-1 




-1 




V|N = 


13 


D 
Y 
N 
A 
M 
1 

C 


Turn ON Time 


130 




200 






200 




ns 


See Switching Time Test Circuit 


14 


toff Turn OFF Time 


90 




150 






150 




15 


Charge Iniection 


-10 














pC 


Cl = 1000 pF. Vqeh = OV. RqeN = 0" 


16 


Cs(off) Source OFF Capacitance 


11' 














pF 


Vs = 0. V|N = OV 


f = 140 kHz 


17 


CQ(off) Drain OFF Capacitance 


8 














Vd = 0, V|n = OV 


18 


'-'D(on)+ ^S(on) Channel ON Capacitance 


27 














Vd = Vs = 0, V|n=15V 


19 


1 ■■ - ■ 

OIRR"^ Off isolation 


78 














dB 


V|(^ = OV. Zl= 75U. Vs = 2 Vpp. f = 500 kHz 


20 


Channel to Channel 

CCRR 

Crosstalk 


TBD 














21 


S 

u 
p 


\+ Positive Supply Current 


0.001 


10 - 


10 


100 




100 




/.A 


All Channels "ON ' or -OFF". V|n = OV or 15V 


22 


1- Negative Supply Current 


-0.001 


-10 


-10 


-100 




-100 




NOTES: ICMF.A 

1. Typical values are for DESIGN AID ONLY, not guaranteed and not subject to production testing. 

2. V|fg = Input Voltage to perform proper function for logic '1'= 11V. for logic 'O ;; 3.5V. 

3. OFFIsolation = 20login^ u° " ^rn c ^ 

Vs Vs= '"P'J' '0 '-"^'^ Switch 

4. Signals on S^, Dx or INx exceeding V -h orV- will be clamped by internal diodes. Limit forward 
diode current to maximum current rating. 


SWITCHING TIME TEST CIRCUIT 

Switch output waveform shown for Vg = constant with logic input waveform as shown. Note that Vs may be + or - 
as per switching time test circuit. Vq is the steady state output with switch on. Feedthrough via gate capacitance 
may result in spikes at leading and trailing edge of output waveform. 

+ 15V 


TnpuT 

t, 20 ns 


- 50% ^ 


SWITCH 

c;n<'/- 




SWITCH 
D, OUTPUT 




INPUT 

S, 


— 




Vs = +10 V 


o- 






S 
C 


WITCH V 


N^ 

o- 




-o—f — ' 

^lS - 

IK S2> 


' OVq Vo = Vs 

_ "L * 'DS(on) 

35 pF 


INPUT ^ 
SWITCH „ 




0.9 Vq 


toff 


-0.9VO 


LOGIC 
INPUT 


3UTPUT 




U 1 


) 


d) GND (j)v- 
OV -15V 


(REPEAT TEST FOR IN2, IN3 AND IN4) 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



Quad Monolithic SPST 
CMOS Analog Switch 

designed for . . . 

■ Portable, Battery Instrumentation 

■ Computer Peripherals 

■ Communication Systems 

■ High Speed Multiplexing 

■ Sample and Hold 

■ Single or Dual Supply Systems 



Siliconix 



BENEFITS 

• Environmentally Rugged 

O 44V Power Supply Max Rating 
O Static Protected Logic Inputs 
J Latchproof 

• Minimizes System Power Requirements 

O Operates Off Single Supply When V- Tied 
toGND 

Low Quiescent Power <30 /iWTyp 

• Fast ton < 200 ns 

toi, < 150 ns 

• Minimizes Signal Error 

- ""dsion) < ioon 



D(OFF) 



< 5 nA 



^ Full Rail-to-Rail Analog Signal Range 

Easily Interfaced 

CMOS Logic Compatible 

ForTTL Logic Compatibility Use DG201A 



DESCRIPTION: 

The DG309 designed on the Siliconix PLUS-40 CMOS process provides solid state switch action with 100 ohms con- 
tact (ON) resistance and very high OFF resistance. True bidirectional switch action occurs over the full analog signal 
range of ±15V, with Break-Before-Make operation to prevent momentary shorting of signal inputs. 



PIN CONFIGURATION 



Dual-ln Line Package 



V- c[T 

GND lTJ 



S4 c[T 



14 

2JJj V+ (SUBSTRATE) 

uh NC 



n, 



LOGIC 


SWITCH 



1 


ON 
OFF 



ORDER NUMBERS: 
DG309CJ 
SEE PACKAGE 8 (PLASTIC) 

DG309AK, DG309BK, DG309CK 
SEE PACKAGE 10 (pERDIP) 

SWITCHES ARE SHOWN IN THE LOGIC "1" INPUT STATE 



FUNCTIONAL DIAGRAM (typical switch) 



INy O- 



LOGIC 
INTERFACE 
AND 





>- 


LEVEL 






SHIFTER 


I 




i 


i GND 


V- 



v+ 

I 



OSx 



SWITCH 
CONTACT 



-ODx 



2800 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

Voltages referenced to V- 

V+ 44V 

GND 25V 

Digital inputs, Vg, Vq'' - 2V to (V+ +2V) or20 mA, 

whichever occurs first 

Current, Any Terminal Except S or D 30 mA 

Continuous Current, S or D 20 mA 

Peak Current S or D 

(pulsed at 1 msec, 10% duty cycle max) 70 mA 

Storage Temperature (A & B Suffix) -65to +150°C 

(C Suffix) -65 to +125''C 



Operating Temperature (A Suffix) - 55 to +125°C 

(BSuffix) -20 to +85''C 

(CSuffix) Oto +70''C 

Power Dissipation (Package)* 

16-Pin DIP** 900 mW 

16-Pin Plastic DIP*** 470 mW 



*Device mounted with all leads soldered or welded to 
PC board. 
**Derate 12 mW/'C above 75°C. 
***Derate 6.5 mW/°C above 25°C. 



ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25 °C. Lots are sample-tested for AC 
parameters and high and low temperature limits to assure conformance with specifications. 



CHARACTERISTIC 


TYP^ 
25*C 


MAX LIMITS 


UNIT 


TEST CONDITIONS, UNLESS NOTED 
V+ = 15V, V- = + 15V. GND = 


A SUFFIX 


B/C SUFFIX 


-55°C 


25° C 


125°C 


-20°C/ 
0°C 


25° C 


85° C/ 
70° C 


1 


S 
W 
1 

T 
C 
H 


Analog Signal Handling 
VaNALOG Capability 


± 15 














V 




2 


Drain-Source ON 

'■DS(on) 

Resistance 


'60 


100 


100 


150 


100 


100 


125 


Si 


Vd= 10V, ls = - 1 mA 


V|N = 3.5V 


3 


60 


100 


100 


150 


100 


100 


125 


Vd= - 10V, ls = 1 mA 


4 


. Source OFF Leakage 
'S(off) Current 


1 




1 


100 




5 


100 


nA 


Vs= 14V, Vd= - 14V 


V|N-11V 


5 


-0.1 




-1 


-100 




-5 


-100 


Vs= - 14V, Vd= 14V 


6 


Drain OFF Leakage 
'D(o") Current 


0.1 




1 


100 




5 


100 


Vd= 14V, Vs= - 14V 


7 


-0.1 




-1 


-100 




-5 


-100 


Vd= - 14V, Vs= 14V 


8 


2 Drain ON Leakage 
'D(on) Current 


0.1 




1 


100 




5 


200 


V[) = Vs= 14V 


V|N = 3.5V 


9 


-0.1 




-2 


-200 




-5 


-200 


Vd=Vs= -14V 


10 


1 

N 
P 
U 
T 


Input Current, 
Input Voltage High 


0.001 




1 


1 




1 




^A 


V|fg = 15V 


11 


12 


1 Input Current, 

Input Voltage Low 


-0.001 




-1 


-1 




,-1 




V|N = 


13 


D 
Y 
N 
A 
M 
1 

C 


tpn Turn ON Time 


130 




200 






200 




ns 


See Switching Time Test Circuit 


14 


tgff Turn OFF Time 


90 




150 






150 




15 


Q Charge Injection 


-10 














pC 


Cl = 1000 pF, Vqem = OV, Rqen = OS! 


16 


'^S(off) Source OFF Capacitance 


11 














pF 


Vs = 0, V|M = 15V 


f= 140 kHz 


17 


CD(Qff) Drain OFF Capacitance 


8 














Vd = 0, V|n= 15V 


18 


'^D(on)+ '^S(on) Channel ON Capacitance 


27 
















Vd=Vs = 0, V|n = OV 


19 


OIRR^ Off isolation 


78 














dB 


V|N = 15V, Zl= 75!2, Vg = 2 Vpp, f = 500 kHz 


20 


QQf^f^ Channel to Channel 
Crosstalk 
















21 


S 
U 
P 


1+ Positive Supply Current 


0.001 


10 


10 


100 




100 




fA 


All Channels "ON" or "OFF", V|n = OV or 15V 


22 


1- Negative Supply Current 


-0.001 


-10 


-10 


-100 




-100 





1. Typical values are for DESIGN AID ONLY, not guaranteed and not subject to pro- 3. OFF Isolation = 20 login Output 

duction testing. Vs Vg = Input to OFF Switch 

2. V|f^=lnput Voltage to perform proper function for logic '1'=11V, for logic 4. Signals on Sx. D^ or INx exceeding V-i- orV- will be clamped by internal diodes. 
'0' = 3.5V. Limit forward diode current to maximum current rating. 



SWITCHING TIME TEST CIRCUIT 

Switch output waveform shown for Vs= constant with logic input waveform as shown. Note that Vs may be -i- or - as per switching 
time test circuit. Vq is the steady state output with switch on. Feedthrough via gate capacitance may result in spikes at leading and 
trailing edge of output waveform. 




© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



16-Channel and 
Dual 8-Channel 
Analog AAultipl 

designed for . . . 

■ Data Acquisition Systems 

■ Multiplexing Reference Signals 

■ Communication Systems 



liliconix 



BENEFITS 

• Environmentally Rugged 

o AOy Power Supply Max Rating 
o Static Protected Logic Inputs 
o Latchproof 

• Easily Interfaced 

o TTL Compatible without Pull-Up 
Resistors 

• Improved System Accuracy 
o rDS(on) <400S2 

° VerroR = 150 Microvolts at 125°C 

= iD(on) X rDS(on) 
o ArDS(on)<6% 

for-10V< VaNA<+10V 

• Pin for Pin Compatible with Intersil IH6116, 
Harris Hlb06 and Analog Devices AD7506 



DESCRIPTION 

The DG506A and DG507A designed on the Siliconix PLUS-40 CMOS process provides solid state switch action with 400 
ohms contact (ON) resistance and very high OFF resistance. True bidirectional switch action takes place over the full analog 
signal range of ±15 volts, with Break-Before-Make operation to prevent momentary shorting of signal inputs. The DG506A 
provides 16 channel single ended multiplexing and demultiplexing of ±15 volt analog signals. The DG507A provides 8 chan- 
nel differential multiplexing and demultiplexing of ±1 5 volt common mode plus differential signals. 



FUNCTIONAL DIAGRAMS 




DG506A CMOS DECODE LOGIC 



i" i- i- 



DG506A 

16 CHANNEL SINGLE ENDED MULTIPLEXER 




-CT*- 



DG507A CMOS DECODE LOGIC 



DG507A 

DIFFERENTIAL 8 CHANNEL MULTIPLEXER 



2802 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

Voltages referenced to V- 

V+ 44 V 

GND 25 V 

Digital inputs^ Vs, Vp -2 V to (V"*" +2 V) or 

20 mA, whichever occurs first. 

Current (Any Terminal, Except S or D) 30 mA 

Continuous Current, S or D 20 mA 

Peak Current, S or D 

(Pulsed at 1 msec, 10% Duty Cycle Max) .... 40 mA 

Storage Temperature (A & B Suffix) -65 to 150°C 

(C Suffix). -65to125°C 



Operating Temperature (A Suffix) -55 to 125°C 

(B Suffix) -20to85°C 

(C Suffix) to 70°C 

Power Dissipation (Package)* 

28 Pin DIP** 1200 mW 

28 Pin Plastic DIP*** 625 mW 



*AII leads soldered or welded to PC board. 
**Derate 16 mW/°C above 75°C. 
**Derate 8.3 mW/°C above 25°C. 



ELECTRICAL CHARACTERISTICS 

All DC parameters are 100% tested at 25°C. Lots are sample-tested for AC parameters and high and low temperature limits 
to assure conformance with specifications. 



CHARACTERISTIC 


MEASURED 
TERMINAL 


ISIO. 
TESTS 

TEMP. 


(Note 1 ) 
TYP 
25' C 


MAX LIMITS 


UNIT 


TEST CONDITIONS, UNLESS NOTED: 
V+ = 15 V, V- = -15 V, Ground = 0, 
(Note 41 


A SUFFIX 


B/C SUFFIX 


-55° C 


25°C 


125°C 


-20/ 
0°C 


25° C 


85/ 
70°C 


1 

2 
3 

4 

5 
6 
7 
8 
9 
10 
1 1 
12 
13 
14 


S 

w 
1 

T 
C 
H 


Minimum Analog Signal 
VaNALOG Handling Capability 






±15 




±15 


±15 




±15 


±15 


V 




Drain Source 
""DSlon) ON Resistance 


S to D 


16 


270 


400 


400 


500 


450 


450 


550 


Si 


Vd = 10 V. Is=-200mA 


Sequence each switch on 
VaL = 0.8V, Vah=2.4V 
Ven = 2.4 V 


16 


230 


400 


400 


500 


450 


450 


550 


Vd = -10 V, Is = -200mA 


Greatest Change in Drain- 
Arps(on) Source ON Resistance 
Between Channels 


S to D 


16 


6 














% 


/^DS(onl MAX - rDS(on) MIN\ 

•^rDS(onl =1 1 

^ 'DS(onl AV.P / 

-10 V< Vs ^ 10 V 


Source OFF Leakage 
'S(°'<l Current 


S 


16 


0.002 




±1 


±50 




±5 


±50 


nA 


Vs= 10 V, Vq = -10 V 


Ven = 


16 


-0.005 




±1 


±50 




±5 


±50 


Vs =-10 V. Vq =10 V 


Drain OFF Leakage 
Current 


DG506A 


D 


1 


0.020 




±10 


±300 




±20 


±300 


Vd = 10 V, Vs = -10 V 


1 


-0.03 




±10 


±300 




±20 


±300 


Vq= -10 V, Vs = 10 V 


bG507A 


2 


0.007 




±5 


±200 




±10 


±200 


Vd= 10 V, Vs = -10 V 


2 


-0.015 




±5 


±200 




±10 


±200 


Vd'-IOV, Vs=10 V 


2 Channel ON Leakage 
'0'°"' 'Current 


DG506A 


D 


16 


0.03 




±10 


±300 




±20 


±300 


Vsiaill = VD = 10 V 


Sequence each switch on 
Val'"0-8V,Vah='2.4 V 
Ven = 2.4 V 


16 


-O.06 




±10 


±300 




±20 


±300 


Vsialll = VD=-10 V 


DG507A 


16 


0.015 




±5 


±200 




±10 


i200 


Vslall) = VD = 10 V 


16 


-0.03 




±5 


±200 




±10 


±200 


Vs(all)=VD = -'0 V 


15 
16 
17 
18 


1 

N 
P 
U 
T 


1 Address Input Current, 
Input Voltage High 


Aq. Ai, A2, 
(A3) EN 


(5) 4 


-0.002 




-10 


-30 




-10 


-30 


nA 


Va = 2.4 V 


151 4 


0.006 




10 


30 




10 


30 


Va= 15 V 


1 Address Input Current, 
Input Voltage Low 


3 


-0.002 




-10 


-30 




-10 


-30 


Veni = 2.4 V 


All Va= 


1 


-0.002 




-10 


-30 




-10 


-30 


Ven=0 


19 
20 
21 
22 

23 

24 
25 
26 


D 
Y 
N 
A 
M 
1 

C 


^transition Switching Time of Multiplexer 


D 


1 


0.6 




1 










MS 


See Figure 1 


*open Break-Before-Make Interval 


D 




0.2 














See Figure 3 


*on(EN) Enable Turn-ON Time 


D 


1 


1.0 




1.5 










See Figure 2 


'off(EN) Enable Turn-OFF Time 


D 


1 


0.4 




1 










OIRR OFF Isolation (Note 3) 


D 




68 














dB 


VeN =0, Ru = IK n, Cu= 15pF, Vs = 7 VRMS. 
f = 500 KHz 


^Sloff) Source OFF Capacitance 


S 


16 


6 
















Vs = 


VEN"0,f =140KH2 


Drain OFF 
'^D'""' Capacitance 


DG506A 


D 


1 


45 














pF 


Vd=0 


DG507A 


2 


23 














27 
28 


S 
U 
P 


1+ Positive Suppiv Current 


V+ 




1.3 




2.4 






2.4 




mA 


Ven^'O V or 5 V 


All Va= 


1— Negative Supply Current 


V- 




-0.7 




-1.5 






-1.5 





DG506A ICMH-A 

DG507A ICMH-B 

NOTES: 

1. Typical values are for DESIGN AID ONLY, not guaranteed and not subject to production testing. 

2. iD(on) leakage from driver into "ON" switch. 



3. OFF position = 20 log , Vc = input to "OFF" switch, Vn = output due to Vc. 

4. Functional operation is possible for supply voltages less than 15 V, but the input logic threshold will 
shift. 

5. Signals on Sx, Dx O"" "^x exceeding V+ or V- will be clamped by internal diodes. Limit forward 
diode current to maximum current ratings. 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



8-Channel/Dual 
4-Channel CMOS 
Analog Multiplexer 

designed for. . • 

■ Data Acquisition Systems 

■ Multiplexing Reference Signals 

■ Gimmunication Systems 



Siliconix 



BENEFITS 



Easily Interfaced 

' ' TTL, DTL and CMOS Direct Control 
Over Military Temperature Range 

Low Power 

o 30 mW Typical Quiescent Power 

Reduces System Cross-Talk 

Break-Before-Make Switching Action 

Environmentally Rugged 

o Latchproof PLUS-40 CMOS 

o 44V Power Supply Maximum Rating 

o Static Protection Circuitry on all Inputs 



DESCRIPTION 

The DG508A a single ended 8 channel analog multiplexer connects 1 of 8 inputs to a common output decoded from 3 binary 
inputs (Ag, A^, A2). 

The DG509A a differential input 4 channel analog multiplexer connects 1 of 4 differential inputs to a common differential 
output decoded from 2 binary inputs (Aq, A^). In the ON state feach switch conducts current in either direction, and in the 
OFF state blocks voltage up to the power supply rails, generally 30 volts peak-to-peak. Bidirectional current sv/itching also 
insures equal operation as a demultiplexer. An enable (E^) input provides a package select function. All control inputs 
address (A^^) and enable (E^) are TTL or CMOS compatible over the full operating temperature range of the product. The 
multiplexers operate in a Break-Before-Make (BBM) switch action between any two decoded switch selections protecting 
against momentary shorting of the input transducers. Additionally BBM action occurs between package selection. See the 
DG528 and DG529 for the same function plus latches on the A2, A^, Aq, E^ inputs. 



FUNCTIONAL DIAGRAMS 



S3< 
S4< 

S7< 
S8' 



12 



11 



10 



v+ 

Tl3 



V- 

h 



Gnd 
Tl4 



DG508A CMOS 
DECODE LOGIC 



15 



16 



A2 



1 

Ao 



-oD 



Sla^ 

S4a°- 
Slb^ 

S4b'>- 



13 



12 



11 



10 



14 



V- 



DG509A CMOS 
DECODE LOGIC 



16 



Ao 



Gnd 



DG508A DGSOQA 
8 Channel Single Ended Differential 4 Channel 

Multiplexer Multiplexer 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS 

Voltages referenced to V- 

V+ 44 V 

GND 25 V 

Digital inputs'^, Vs, Vp -2 V to (V+ +2 V) or 

20 mA, whichever occurs first. 

Current (Any Terminal, Except S or D) . . . 30 mA 

Continuous Current, S or D 20 mA 

Peak Current, S or D 

(Pulsed at 1 msec, 10% Duty Cycle Max) . . 40 mA 

Operating Temperature (A Suffix). .-55to125''C 

(B Suffix). . . . -20to85°C 

(C Suffix) . . ,". . . to 70°C 



Storage Temperature (A & B Suffix) . . -65to150°C 
(C Suffix) .... -65 to 125°C 
Power Dissipation (Package)* 

16 Pin DIP** 900 mW 

16 Pin Plastic DIP*** 470 mW 

Flat Package** ** 750 mW 



*AII leads soldered or welded to PC board. 
**Derate 12 mW/°C above 75°C 
** *Derate 6.3 mW/°C above 25°C 
****Derate 10 mW/°C above 75°C 



ELECTRICAL CHARACTERISTICS 

All DC parameters are 100% tested at 25°C. Lots are sample-tested for AC parameters and high and low temperature limits 
to assure conformance with specifications. 



CHARACTERISTIC 


MEASURED 
TERMINAL 


NO. 
TESTS 

PER 
TEMP. 


TYP' 


MAX LIMITS 


UNIT 


TEST CONDITIONS, UNLESS NOTED: 
V+ = 15 V, V- =■ 15 V. Ground = 


A SUFFIX 


B/C SUFFIXES 


-55" C 


25'C 


12S*C 


-20/ 

c 


25' C 


85/ 
70' C 


1 


S 

w 
1 

T 
C 
H 


Minimum Analog Signal 
^ANALOG Handling Capab.htv 






t15 










±1 5 




V 




2 


Drain-Source 
'DS(on| ON-Res.stance 


S to D 


8 


270 


400 


400 


500 


450 


450 


550 




Vq = 10 V. Is= -200 ;iA 


Sequence each switch on 
Val=0.8V. Vah=2.'> V 


3 


8 


230 


400 


400 


500 


450 


450 


500 


Vo= -10 V, ls= -200 jjA 


4 


Greatest Change in Drain 
^'DS(on) Source ON Resistance 
Between Channels 


S to D 


8 


6 
















/ 'DSlon) MAX - rQslon) MIN \ 

^'DS(onl-| 1 

■ \ 'DS(on|AVE / 

-10 V .5 Vs < 10 V 


5 


Source OFF 
Leakage Current 




8 


0.002 




±1 


±50 




±5 


±50 


nA 


Vs= 10 V. Vd= -10 V 


Ven = o 


6 


8 


-0.005 




±1 


±50 




db5 


±50 


Vj^ -10 V, Vd = 10 V 




Dram OFF 
'Dloff) Leakage 
Current 


DG508A 


D 


1 


0.010 




±10 


±200 




±20 


±200 


Vd= 10 V. Vs= -10 v 


8 


1 


-0.015 




±10 


±200 




±20 


±200 


vd = -iov. vs="io V 


9 


DG509A 


2 


0.005 




±10 


±100 




±20 


±100 


V[)= 10 V. Vs= -10 V 


10 


2 


-O.008 




±10 


±100 




±20 


±100 


vd= -10 V, vs = 10 V 


1 1 


Didin ON 
'D(on)2 LiMkjye 
Cu.-.t-nt 


DG508A 


D 


8 


0.015 




±10 


±200 




±20 


±200 


Vs(all)= Vd=10 V 


Sequence each switch on 

Val" 8 V, Van = 2.4 v 


12 


8 


-0.030 




±10 


±200 




±20 


±200 


vs(ain = Vd=-io V 


13 


DG509A 


8' 


0.007 




±10 


±100 




±20 


±100 


VS(all)= Vd=10V 


14 


8 


-0015 




±10 


±100 




±20 


±100 


Vs(alll = VD=-10 V 


15 


1 

N 
P 
U 
T 


Addiess Input Cuitcnl 
Input Voltage Hic)h 


Aq, Ai . 
(A2I. EN 


(4) 3 


-0.002 




±10 


-30 




-10 


-30 


mA 


Va =2.A V 


16 


14) 3 


0.006 




10 


30 




10 


30 


Va= 15 V 


17 


Address Input Current 
Input Voltage Low 


(3) 2 


-0.002 




-10 


-30 




-10 


-30 


Ven = 2.4 V 


All Va=-0 


18 


1 


-0.002 




-10 


-30 




-10 


-30 


ven = o 


19 


D 
Y 
N 
A 
M 
1 

C 


Switching Time of 
•transition Multiplexer 


D 


1 


0.6 




1 










liS 


See Figure 1 


20 


Break-Before-Make 
'°P«" Interval 


D 




0.2 














See Figure 3 


21 


'onlENI Enable Turn-ON Time 


D 


1 


1.0 




1.5 










See Figure 2 


22 


•offlEN) Enable Turn-OFF Time 


D 


1 


0.4 




1 










23 


OIRR OFF Isolation INote 31 


D 


8 


68 














dB 


Ven" 0. f'L=° IK Si, Ci^= 15pF 
Vs= 7 VRMS, f = 500 kHz 


24 


^Sioff) Source OFF Capacitance 


S 


8 


5 














pF 


Vs-0 


Ven ' 0. f = 140 kHz 


25 


Drain OFF 
'^D'°"> Capacitance 


DG508A 


D 


1 


25 














Vo = 


26 


DG509A 


D 


2 


12 














27 


S 
U 
P 
P 
L 
Y 


1+ Positive Supply Current 


V+ 


1 


1.3 




2.4 






2.4 




mA 


Vgnj- 2.4 V 


All Va = 0, or 2.4 V 


28 


1— Negative Supply Current 


V- 


1 


-0.7 




-1.5 






-1.5 




29 


1+ Standby Positive Supply Current 


V+ 


1 


1.3 




2.4 






2.4 




Ven-0 V 


30 


1— Standby Negative Supply Current 


V- 


1 


-0.7 




-1.5 






-1.5 





NOTES: 

1. Typical Values are for DESIGN AID ONLY, not guaranteed and n6t subject to production testing. 

2. iD(on) '5 '63'<396 'rem driver into '*0N" switch. 

IVsl 

3. OFF isolation = 20 log , Vs = input to "OFF" switch, Vq = output due to Vj. 

IVp,' 

4. Signals on Sx- Dx or INx exceeding V+ or V- will be clamped by internal diodes. Limit forward 
diode current to maximum current ratings. 



ICMGA DG508A 
ICMG-B OG509A 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 




8-Channel and 
Dual 4-Channel 
Latchable AAultipl 

designed for . . . 

■ Data Acquisition Systems 

■ Automatic Test Equipment 

■ Communication Systems 

■ Microprocessor Controlled Systems 

DESCRIPTION 



BENEFITS 



Siliconix 



• Microprocessor Bus Compatible 

o Accepts 300 nsec WRITE Pulse Width 
o Direct RESET 

• Environmentally Rugged 

o 44\/ Power Supply Rating 
o Static Protected Logic Inputs 
o Latch-Proof 

• Easily Interfaced 

o TTL Compatible Without Pullup Resistors 
V|NH = 2.4V 

• Improved System Accuracy 

"/DS(on)<400^2 

" Verror = 80 m V Max at 125°C 

= 'D(on) >^ ""DSIon) 
o Arpg^Qpi) Channel to Channel is Less 
Than 6% 



The DG528 and DG529 designed on the Siliconix PLUS-40 CMOS Process provides solid state switch action with 400 
ohms contact (ON) resistance and very high OFF resistance. True bidirectional switch action takes place over the full analog 
signal range of ±15 volts, with break-before-make operation to prevent momentary shorting of signal inputs. The DG528 
provides 8-channel single-ended multiplexing and demultiplexing of ±15 volt analog signals. The DG529 provides 4-channel 
differential multiplexing and demultiplexing of ±15 volt common mode plus differential mode signals. 

Four input latches on the binary coded switch-state inputs (Aq, Ai, A2, Ep) result in microprocessor bus compatibility. 
Two control lines, WR and RS, store or clear the the switch-state input (Aq, Ai, A2, Ep) latches. Programming the enable 
input (Ep) latch with a logic zero turns all analog switches OFF. The direct chip reset RS simplifies switch turn OFF during 
system power up or system reset. 



FUNCTIONAL DIAGRAMS 
DG528 



DG529 

V- GND 
T4 T16 



5 




5 





































12 














5 — 
A- 














^10 
1 

5 — 
















1 


-i- 




0— 






i— 










DECODE 


R 














LATCH E 


s 









Si,0- 



s„0- 



S..O- 



-OD 



SikO- 



S,kO- 



S,kO- 



-O RS 



WR O- 



-OD, 



-O Dh 



-O RS 



8 Channel Single Ended Multiplexer 



Differential 4 Channel Multiplexer 



2806 



© IC MASTER 1983 



PIN CONFIGURATIONS 



DG528 

Dual— In— Line Package 



[I 

E 



E 



S4 [T 

D [~9~ 



LATCHES 

AND 
DECODER 



' I I 
I I I 



TT 



3 
3 



I r 



IT— ' 



'Ml 

" '— 1 



je] A2 

"iTjcN 

"u| V+ 



DG529 

Dual— In— Line Package 



VR pr 



V- 



S2a 6 



■E 



Da[T 



LATCHES 

AND 
DECODER 



I 

[7— ' 



-3' 



"3' 
3 



14 



-3 

-3 



S3b 



Top View 



Top View 



ORDER NUMBERS: 
DG528AK OR DG528BK 
SEE PACKAGE 23 

DG528CJ 
SEE PACKAGE 19 



ORDER NUMBERS: 
DG529AK OR DG529BK 
SEE PACKAGE 23 

DG529CJ 
SEE PACKAGE 19 



TRUTH TABLES 



DG528 



DG529 



A2 


Ai 


Ao 


En 


WR 


RS 


On Switch 


X 


X 


X 


X 


_r 


1 


Maintains previous switch 














condition 


X 


X 


X 


X 


X 





NONE 














(latches cleared) 


X 


X 


X 










NONE 


















1 








1 









2 





1 












3 





1 


1 









4 


1 















5 


1 





1 









6 


1 


1 












7 


1 


1 


1 









8 



Ai 


Ao 


En 


WR 


RS 


On Switch 


X 


X 


X 


_r 


1 


Maintains previous switch 












condition 


X 


X 


X 


X 


• 


NONE 












(latches cleared) 


X 


X 










NONE 








1 







1 





1 


1 







2 


1 





1 







3 


1 


1 


1 







4 



Logic "1": Vah > 2.4V 
Logic "0": V^l <0.8V 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



ABSOLUTE MAXIMUM RATINGS (Ta = 25°C unless otherwise noted) 



Voltages referenced to V- 

V+ 44 V 

GND 25 V 

Digital inputs^, Vs, Vp -2 V to (V*" +2 V) or 

20 mA, whichever occurs first. 

Current (Any Terminal Except S or D) . . . . 30 mA 

Continuous Current, S or D 20 mA 

Peak Current, S or D 

(Pulsed at 1 msec, 10% Duty Cycle Max) . 40 mA 



Operating Temperature (A Suffix) -55 to 125°C 
(B Suffix) -20to85°C 
(C Suffix) Oto70°C 
Storage Temperature (A & B Suffix) -65 to 150°C 
(C Suffix) -65to125°C 
Power Dissipation (Package)* 

18 Pin DIP** 900 mW 

18 Pin Plastic DIP*** 470 mW 

*AII leads soldered or welded to PC board. 
**Derate 12 mW/°C above 75°C. 
***Derate 6.3 mW/°C above 50^C 



ELECTRICAL CHARACTERISTICS 

parameters and high and low temperature 



All DC parameters are 100% tested at 25 C. Lots are sample— tested for AC 
limits to assure conformance with specifications. 



Characteristic 


Measured 
Terminal 


No. 
Tests 

Per 
Temp. 


TvP 

25° C 
Not^ 1 


Max Limits 


Unit 


Test Conditions, Unless Noted: 
V+ = 15. V- = -15. Ground = 
WR = 0, RS = 2.4V 


A SuHix 


B/C Suffixes 


-55° C 


25° C 


125°C 


-20° C 
0°C 


25° C 


85° C 


1 


S 

w 

T 
C 
H 


Minimum Analog Signal 
VanALOG Handling Capability 






• 15 




•15 


! 15 




• 15 


M5 


V 




2 


Dram-Source 
'DS(on) ON Resistance 


Sto D 


8 


270 


400 


400 


500 


450 


450 


550 


n 


Vq = 10V, Is = -200 mA 


Sequence each switch on 


3 


8 


230 


400 


400 


500 


450 


450 


500 


Vd = -10V. Is = -200 mA 


VaL = 8V, Vah = 2.4V 




Greatest Change in Dram 
•^^DSIon) Source ON Resistance 
Between Channels 


S to D 


8 


6 














% 


/'DSIonl^*^ -'DS(on)MIN\ 
'OS.on,-^ ) 

-lOV >. Vs s 10V 


5 


Source OFF 
'Sloff) Leakage Current 


S 


8 


-0.005 




• 1 


•50 




15 


♦50 


nA 


Vs = 10V. Vq = -lOV 


Ven = 


6 


8 


-O005 




11 


±50 




•5 


±50 


Vs = -lOV, Vq = 10V 


7 


Dram OFF 
iD(off) Leakage 
Current 


DG528 


D 


1 


-0.015 




±10 


±200 




±20 


±200 


Vd = lOV, Vs = -lOV 


8 


1 


-0015 




HO 


±200 




±20 


±200 


Vq = -10V, Vs = 10V 


9 


DG529 


2 


-0.008 




110 


±•100 




♦20 


♦100 


Vq = 10V. Vs = -10V 


10 


2 


-O.008 




±10 


±100 




±20 


±100 


Vd = -10. Vs = lov 


11 


Dram ON 
Leakage 

'0'°"' Current 
Note 2 


DG528 


D 


8 


-0.03 




±10 


•200 




±20 


±200 


Vslall) = Vd = 10V 


Sequence each switch on 
Val = 8V, Vah = 2.4V 


12 


8 


-0.03 




♦10 


±20u 




±20 


±200 


Vs(all) = Vd = -10V 


13 


DG529 


8 


-0.015 




HO 


±100 




±20 


±100 


Vs(all) = Vd = 10V 


14 


8 


-0.015 




•10 


±100 




±20 


±100 


Vs(alll = Vd = -10V 


15 


1 

N 
P 
U 
T 


1 Logic Input Current, , 
Input Voltage High 


Aq, A,, (A2), 
En. WR, 
RS 


5 (6) 


-0.002 




±10 


-30 




-10 


-30 


mA 


V^ = 2.4V 


16 


5 (6) 


0.006 




10 


30 




10 


30 


Va = 15V 


17 


1 Logic Input Current, 
Input Voltage Low 


5 (6) 


-0.002 




-10 


-30 




-10 


-30 


VE(g = All Va = 0, WR = 0, RS"= 


18 


Switching Time of 
•transition Multiplexer 


D 


1 


06 




1 












See Figure 3 


19 


Break-Before-Make 
Interval 


D 




0.2 














See Figure 5 


20 


D 
Y 
N 
A 
M 
1 

C 


tonlEN.WR) Enable Turn-ON Time 


D 


1 


1.0 




1 










See Figures 4 and 6 


21 


,o,,(EN,RS) Enable and RS Reset 
Turn-OFF Time 


D 


1 


0.4 




1 










See Figure 4 and 7 


22 


Q Charge Coupling 


D 




4.0 














pC 


See Figure 8 


23 


OFF Isolation Note 3 


D 


8 


68 














dB 


VeN = 0. Rl ' IKJl, Cl = 15pF 
Vs = 7 VRMS. f = 500 kHz 


24 


S 

u 
p 
p 

L 
Y 


^ Logic Input 
Capacitance 


Aq, Ai, IA2) 
En. WR. RS 




2.5 














pF 


1 = 1 MHz 


25 


Source OFF 
''Slo"* Capacitance ' 


S 


8 


5 














Vs = 


Ven = 0,f = 140 kHz 


26 


Dram OFF 
Capacitance 


DG528 


D 


1 


25 














Vd = 


27 


DG529 


D 


2 


12 














28 


1+ Positive Supply Current 


V+ 


1 






2.5 






2.5 




mA 


Ven = OV All Va = O 


29 


1- Negative Supply Current 


V- 


1 






-1.5 






-1.5 





NOTES: 

1. Tvpical Values are for DESIGN AID ONLY, not guaranteed and 
not subject to production testing. 

2. iD(on) leakage from driver into "ON" switch. 

3. OFF isolation=20 log I^Sl . Vs=input to "OFF" switch, Vd = 
output due to Vg. IVq| 

4. Period of Reset (RS) pulse must be at least 50 »isec during or 
after power ON. 

5. Signals on Sx, Dx or INx exceeding V+ or V- will be clamped by internal diodes. Limit forward 
diode current to maximum current ratings. 



ICML-A DG528 
ICML-B DG529 



Siliconix 



© IC MASTER 1983 



TIMING DIAGRAMS 



Minimum Input Timing Requirements 





Parameter 


Measured Terminal 


Min Limits 
over full temp range 


Unit 


Test Circuit 


30 


tww WRITE Pulse Width 


WR 


300 


ns 


See Figure 1 


31 


A, En Data Valid to WRITE 
^Dw (Stabilization Time) 


Ao, Ai, (A2), En 
WR 


180 


32 


A, Ep Data Valid after WRITE 
(Hold Time) 


WR 

Aq, Ai, (A2), En 


30 


33 


tRs RESET Pulse Width 
Note 4 


RS 


500 


See Figure 2 
Vs = 5V 



3V 



WR 



1.5V 



3V' 

Aq, Ai.(A2) 

En 0" 



WD 



2.0V 



0.8V 



KS 



SWITCH 
OUTPUT 




Figure 1. 



Figure 2. 



SWITCHING TIME TEST CIRCUITS 



LOGIC INPUT 3V 
t, 20 ns 





SWITCH OUTPUT 



'88 
''$8 
'transition" 
81 ON 






V+ 


En 


Si 


RS 






82 THRU 87 






Ai 


DG528 ^8 




D 


GND 


WR V- 



SWITCH 
-O OUTPUT 

; 35 pF 




(a) 






V+ 


En 


Sib 




S-igTHRU 
S4a. Da, 
S2b. AND 831, 


RS 


Ai 


DG529 

Db 


GND 


WR V- 



i 1 -15 V 



SWITCH 
-O OUTPUT 



35 pF 



(b) 



Figure 3. Transition Time Test Circuit 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



2809 



SWITCHING TIME TEST CIRCUITS (Cont'd) 



LOGIC INPUT 3V 
V<20n5 50% 
t, < 20 ns 



SWITCH OUTPUT 



0.9 Vo_ 



'on (En) 



! I 



RS 


V+ 


En 


Si 




S2 




THRU 




Ss 


DG528 






D 


GND WR 


V- 



SWITCH 
-O OUTPUT 



LOGIC , KHD D OU 

input! I GND WR V- V 

111 1 i'""if°' 



(a) 



LOGIC 
INPUT 



+15' 

L I 



RS 

En 



S-igTHRU 
S43;Da. 
^Zb' ^3b- ^Ab 



Db O 



1 11 T^-ii" 



SWITCH 
-O OUTPUT 



(b) 



Figure 4. Enable top/tg^f Time 



LOGIC INPUT 3V 
t, < 20 ns 



SWITCH OUTPUT 



80% - 



LOGIC I 
INPUT 



+2.4 V 

Q 





v+ 


En 




RS 


ALL S AND Dg 




DG528 




DG529 




(Aj) D^-D 






GND 


WR V- 



SWITCH 
-O OUTPUT 



1K< ^35pF 



Figure 5. Open Time (B.B.IVI. Interval) 



2810 



Siliconix 



© IC MASTER 1983 



SWITCHING TIME TEST CIRCUITS (Cont'd) 



+2.4V +15V 



! 




Figure 6. Write Turn-On Time tQp((/7R) 




Figure 7. Reset Turn-Off Time tQffjpjg) 



Rgen 



vgen 



I 



AO, Ai, 
(A2) 

sx 



DG528 RS 
"DG529 



En 



GND WR V- 



T 



-O Vo 



Cl = 1000 pF 



En 

Vo 



|aVo 



AVo IS THE MEASURED VOLTAGE ERROR 
DUE TO CHARGE INJECTION. THE ERROR 
VOLTAGE IN COULOMBS IS Q=ClXAVo. 



Figure 8. Charge Injection Test Circuit 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



DETAILED DESCRIPTION 



The internal structure of the DG528 and DG529 
provides a 5 volt logic interface with input pro- 
tection circuitry followed by a latch, level shifter, 
decoder and finally the switch constructed with 
parallel N and P channel MOSFETs (see figure 9). 

Looking at figure 9, the input protection on the 
logic lines Aq, Ai, A2, Ep and control lines WR, 
RS minimize susceptibility to static encountered 
during handling and operational transients. 

The logic interface circuit compares the TTL input 
signal against a TTL threshold reference voltage. 
The output of the comparator feeds the data input 
of a D-type latch. The level sensitive D latch con- 
tinuously places the Dx input signal on the Qx 
output when the CLK (WR) input is low, resulting 
in transparent operation. As soon as CLK (WR) 
returns high the latch holds the data last present on 
the Dx input at the Qx output, subiect to the 
"Minimum Input Timing Requirements" table. 



Following the latches the Qx signals are level 
shifted and decoded to provide proper drive levels 
for the CMOS switches. This level shifting insures 
full ON/OFF switch operation for any analog signal 
present between the V+ and V- supply pins. 



Power Supplies 

The final data sheet will provide graphs showing 
the effect on power supply sensitive parameters. 




O v+ 



f O D 



O s. 



O V- 



Figure 9. DG528 Simplified Internal Structure 



2812 



Siliconix 



© IC MASTER 1983 



DG5040-45 Series 
General Purpose CMOS 
Analog Switches 

designed for . . . 

■ Programmable Gain 
Amplifiers 

■ Analog Multiplexing 

■ Servo Control Switching 

■ Sqmpled Data Systems 

■ Synchronous Demodulators 



Siliconix 

Revised 3/82 



BENEFITS 

• Environmentally Rugged 

o 44V Power Supply Rating 
o Static Protected Logic Inputs 
o Latchproof 

• Easily Interfaced 

o TTL and CMOS Compatible without 
Pull Up Resistors 

• Reduces External Component Requirements 

o Full Rail to Rail Analog Signal Range 
o No Diode Protection Required Between 
V|_ and y+ for Power Supply Sequencing 

• Pin for Pin Compatible with 

o IH5040 Family 
o HI5040 Family 



DESCRIPTION 

The DG5040 through DG4045 series designed on the Siliconix PLUS-40 CMOS process provides solid state sv^itch action 
with 50 ohms contact resistance and very high OFF resistance. True switch action takes place over the full analog signal 
range of ±15 volts, with Break-Before-Make operation to prevent momentary shorting of signal inputs. 



FUNCTIONAL DESCRIPTION 



PART NUMBER 


TYPE 


DG5040 




SPST 


DG5041 


Dual 


SPST 


DG5042 




SPDT 


DG5043 


Dual 


SPDT 


DG5044 




DPST 


DG5045 


Dual 


DPST 



FUNCTIONAL DIAGRAM (typical channel) 




LOGIC 
INTERFACE 
AND 

PROTECTION GND 



? 





LEVEL 


> — 


SHIFTER 



I 



V- 



■OSx 



SWITCH 
CONTACT 



-ODx 



© IC MASTER 1983 



See Product Selector Guides on Pages 2779-2783. 



2813 



ADO/^I 1 ITC nil A V 1 K/ll IK/I DATIM/^O 

AbbULU 1 b IviAaIIVIUIVi KA I INljo 


Ta = 


25° unless otherwise noted) 








Voltages referenced to V- 

V+ 




44 V 


Operating Temperature (A Suffix) -55to125°C 
(C Suffix) 0to70°C 


vl 

GNf 




(GND 


-0.3 V) to 44 V 


Power Dissipation* 














9R V 


Metal Can and Plastic DIP** 


450 mW 


Digital inputs^, Vs, Vp -2 V to (V+ +2 V) or 


16 Pin DIP**** 




900 mW 


30 mA, whichever occurs first. 
Current. Anv Terminal Exceot S or D .30 mA 


Flat Pak***** 




pnn mw 


*AII leads welded or soldered to PC board. 




Continuous Current, S or D 




30 mA 


* * Derate 6 mW/" C above 75° C. 




Peak Current, S or D (pulsed, at 1 msec. 




inn 


mA 


* * * * Derate 1 2 mW/° C above 75° C. 
''****Derate 10 mW/°C above 75°C. 




Storage Temperature (A Suffix) 
(C Suffix) 


-65 to 150"C 
-65 to 125°C 


Stresses listed under "Absolute Maximum Ratings" may be applied 
(one at a time) to devices without resulting in permanent damage. 
This is a stress rating only and not subject to production testing. 
Exposure to absolute maximum rating conditions for extended 
periods may effect device reliability. 


ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25°C. 
parameters and high and low temperature limits to assure conformance with specifications. 


Lots are sample-tested for AC 








Max Limits 




Tast Cofxlitiom 








Charactafittics 


A SuHix 


C Suffix 


Unit 


V+ - 15V, V- - -15V 








-55° C 


25° C 


125°C 


0°C 


25° C 


70° C 




V|_ - 5V, GND - OV 


1 




Min. AnsloQ SiQnsI 
VaNALOG Handling Capability 




115 


115 




115 


115 


V 




2 




3 Drain Source 

'^DS(On) riM Do«i<t:>n^a 


50 


50 


75 


50 


50 


75 


n 


Vd = 10V. Ij = -10 mA 




o 




50 


50 


75 


50 


50 


75 


Vq = -10V, I5 = -10 mA 




4 


s 
w 


2 Source OFF 

Leakage Current 




1 


100 




1 


100 




Vj = 14V, Vq = -14V 




5 


T 




-1 


-100 




-1 


-100 




Vs = -14V, Vq = 14V 


Note 1 


6 


C 
H 


•J Drain OFF 

'DIoffI 

' Leakage Current 




1 


100 




1 


100 


nA 


Vj = -14V, Vq = 14V 


7 






-1 


-100 




-1 


-100 


Vj = 14V, Vq = -14V 




8 




3 Drain ON 

^ Leakage Current 




2 


200 




2 


200 




V5 = Vq = 14V 




9 






-2 


-200 




-2 


-200 




V5 = Vq = -14V 




10 


1 

N 
P 
U 
T 


3 Input Current, 
'NH Input Voltage High 




±1 


11 




11 


11 


>iA 


V|NH =^ 2 OV 


11 


. -i , Input Current. 

llMI 

Input Voltage Low 




11 


11 




11 


11 


V,NL = 0.8V 


12 




tfjn'' Turn-ON Tinne 




1000 






1200 




ns 


Vj - 110V, Rl = iKn, 


Note 2 


13 




toff^ Turn-OFF Time 




500 






700 




Cl - 35 pF 


14 




Q Charge Injection 


3 Typical 


mV 


Cl = 10,000 pF, Rqen = on, 

VcEN = 0V 


15 


D 
Y 


p Source OFF 
^Sfo'O Capacitance 


15 Typical 








16 


N 
A 
M 


Drain OFF 
Capacitance 


17 Typical 


PF= 


Vj = Vq = OV, 
f = 1 MHz 




17 


C 


CD(on) + Cs(on) Channel ON 
Capacitance 


45 Typical 






Note 1 


18 




OIRR OFF Isolation 


75 Typical 




Zl = 75n 




19 




CCRR Interchannel 
Crosstalk 
Isolation 


89 Typical 


dB 


Vj = 2 Vpp, 
f = 1 MHz 




20 


S 


!+•' Positive Supply Current 


300 


300 


300 


300 


300 


300 








21 


U 
P 


1-'' Negative Supply Current 


-300 


-300 


-300 


-300 


-300 


-300 


mA 


V|N = OV or 2.4V 




22 


P 
L 


• l^ Logic Supply Current 


300 


300 


300 


300 


300 


300 




23 


Y 


IqnD Ground Current 


-300 


-300 


-300 


-300 


-300 


-300 








NOTES: 

1; V|(^ = Input voltage to perform proper (unction. 
For Logic "1" — V||Njn - 2.0 V 
For Logic "0" — V||vj(_ = 0.8 V 

2: See Switching Time Test Circuit. 




ICMK-A, B 

3: Limits of these paramaters are tested 100°o at 25 C and 125 C for " 883" 
devices. 

4: For "'883" devices these parameters are lOO^o tested at 25C 

5; Signals on Sx, or INx exceeding V+ or V- will be clamped by internal diodes. 
Limit forward diode current to maximum current ratings. 



Siliconix 



© IC MASTER 1983 



PIN CONFIGURATIONS 








ALL SWITCHES SHOWN IN 




CERDIP (K) OR 




THE LOGIC "1" 


FLAT PACK (L) 


PLASTIC (J) 


METAL CAN (A) 


SWITCH STATE 


SEE PACKAGE 5 


SEE PACKAGE 8 or 10 


SEE PACKAGE 2 



SPST 
DG5040 



LOGIC 


SWITCH 



1 


OFF 
ON 



Jli. 



ORDER 
NUMBER: 



DG5040AL 



DG5040AK or DG5040CK 
or DG5040CJ 




SPOT 
DG5042 




GNO V- 



ORDER DG5042AK or DG5042CK 

NUMBER: DG5042AL or DG5042CJ DG5042AA 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



2815 



PIN CONFIGURATIONS Continued 



ALL SWITCHES SHOWN IN 
THE LOGIC "1" 
SWITCH STATE 



FLAT PACK (L) 
SEE PACKAGE 5 



CEROIP (K) OR 
PLASTIC (J) 
SEE PACKAGE 8 or 10 



^VIETAL CAN (A) 
SEE PACKAGE 2 



DUAL SPOT 
DG5043 





SW1 


SW3 


LOGIC 


SW2 


SW4 





OFF 


ON 


1 


ON 


OFF 



IN20- 



(DG191 EQUIVALENT) 

i k 



-OOi 

-0D3 




ORDER 
NUMBER: 



DG5043AL 



DG5043AK or DG5043CK 
or DG5043CJ 



DPST 
DG5044 



LOGIC 


SWITCH 



1 


OFF 
ON 



SjO- 



D-t> 



-002 





ORDER 
NUMBER: 



DG5044AL 



OG5044AK or DG5044CK 
or DG5044CJ 



DG5044AA 



DUAL DPST 
DG5045 



LOGIC 


SWITCH 



1 


OFF 
ON 



IN20- 



S40- 



(DG185 EQUIVALENT) 



"F 



-OOj 



-004 




ORDER 
NUMBER: 



DG5045AL 



DG5045AK or DG5045CK 
or DG5045CJ 



2816 



Siliconix 



© IC MASTER 1983 



digit A/D 

■ High Accuracy and High 
Resolution Digital Voltmeters, 
Panel Meters 

■ Digital Scales, Thermometers 

■ Microprocessor Data 
Acquisition Systems 

■ Scientific Instrumentation 



DESCRIPTION 



Replace 

forNewDesigni 



Siliconix 



BENEFITS 

o 0.005% ±1 Count Accuracy, Ensures High 
System Performance 

• 1 AtV Resolution for 20 mV Full Scale 

• 28,500 Count Maximum for 142% Over- 
range 

• Sample Rate from One to Five/Second 

• Auto-Zero Cycle Nulls Out Internal and 
External Amplifier Offsets 

• Auto-Polarity Operation with One Reference 

• Multiplexed BCD Output for Easy Interface 
to Displays 

• Two Overrange Outputs, Underrange Output, 
Blink Inhibit, and Convert-On-Command 
Capabilities Allow Easy Interface to External 
Circuitry and Microprocessors 



The LD122/LD121A AV2 digit A/D system uses Siiiconix's proprietary "Quantized Feedback" (patent pending) conversion 
technique. Intrinsic features of this system are Auto-Polarity. Auto-zero and ratiometric operation. No critical components 
are required except for a stable voltage reference and a low noise op amp. The technique offers superior linearity, normal 
mode rejection, and stability due to the simultaneous integration of the unknovyn input and the reference voltages. Unlike 
other conversion techniques, the integrator output voltage never represents more than 100 counts, thus critical, high 
resolution performance is not required of either the integrator or comparator. 

The LD122/LD121A combination extends system resolution beyond the lOjuV maximum available from the LD120/121A 
system. By adding a user selected low noise input gain amplifier, and appropriate input filter, any input resolution can be 
achieved. Otherwise functional operation is identical to the LD120/LD121 A. Complete LD122/LD121A functional infor- 
mation may be obtained by consulting the.LD120/LD121 A data sheet. Also see AN80-8 and AN77-1 application notes. 
The LD122 analog processor is fabricated with a unique combined PMOS/Bipolar process. It contains all the necessary 
amplifiers, MOSFET switches, and switch driver circuits for the system. The reference voltage input is fully buffered on 
the LD122 to eliminate the reference switch resistance as a source of error. All the amplifiers are internally compensated. 
The LD122 directly interfaces the LD121A digital processor with no additional active components required. 
The LD121A synchronous processor contains all the digital circuitry for the quantized feedback system. Device outputs 
supply two overrange signals, underrange, sign and AV2 digits of multiplexed BCD data. (All outputs are TTL compatible.) 
Overrange is also indicated by blinking digit strobes above 20,000 counts. An input is provided to inhibit this feature at 
user option. Microprocessor controlled operation is simplified by a start conversion input that allows conversion-on- 
command. 

Both devices are supplied in space saving 300 mil dual-in-line packages. The LD122 has 16 pins and the LD121A has 
18 pins. 



FUNCTIONAL BLOCK DIAGRAM 



Dual-tn-Line Package 



BUFF IN ^ 
HI Q GND [T 
M/Z[T 

u/d|T 

COMP ^ 

v-[7 

ANALOG GND ^ 
""OUT U 



TOP VI E« 

ORDER NO. LD122CJ 
SEE PACKAGE 8 




Dual-ln-Line Package 




is] D3 


Old 




COMpfT 




GND [T 




U/d[T LDl 






T7| SIGN/0 


START [T 


12] Bj 


CLK [T 






to]B| 



TOP VIEW 

ORDER NO. LD121ACJ 
SEE PACKAGE 19 



LD122 
ANALOG PROCESSOR 



SWITCH STATES ARE FOR A LOGIC "O" AT U/D AND M/Z INPUTS 



LD121A 

SYNCHRONOUS DIGITAL PROCESSOR 



© 10 MASTER 1983 



See Product Selector Guides on Pages 2779-2783. 



2817 



ABSOLUTE MAXIMUM RATINGS 

V|N(Pin 15. 2 LD122) V- < V|n < V+ 

V+ - V- (LD122) 32 V 

Vss- Vdd (LD121A) 20 V 

Any Pin (LD121A) Vpo to Vss ±0.3 

Vref +v 



Operating Temperature to 70°C 

Storage Temperature — 65to125°C 

Power Dissipation (Package)* . . 750 mW 

* Device mounted with all leads welded or soldered to 
PC Board. Derated 6.3 mW/°C above 25°C. 



Absolute Maximum Ratings are stress limits only. Exceeding these limits may cause device damage. Electrical Characteristic define the 
functional operating limits. 

ELECTRICAL CHARACTERISTICS 

All DC parameters are 100% tested at 25°C. Lots are sample tested for AC parameters and high and low temperature limits 
to assure conformance with specifications. 



CHARACTERISTIC 


MIN 


TYP 


MAX 


UNITS 


TEST CONDITIONS 
UNLESS NOTED OTHERWISE 
V+ = 12 V; V— = Vdd ~ —12 V, 
VSS=5V, Ta = 25'C 


1 








Linearity 


1 


1/4 


1 


Count 


2 V Scale 




S 




2 


1/2 


2 


200 mV Scale 


2 


Y 




Noise (Note 1 1 




1/3 


1 


Count 


2 V Scale 


S 
T 






1/2 


2 


200 mV Scale 


3 


E 


NMRR ' 






40 




clB 


Il= 50 or 60 H/ 


M 

(Notes 2 
and 31 


PSRR 






80 




4 




Gain T.C, 












5 








Zero Drift 




1 


5 


Count 


— zDto /D i^STRG" ' • "in S 'UUfs -I 


6 




P 


Vss 




4 .5 


5 


5.5 


V 


Range Over Which Functionality is Guaranteed 


7 




O 

w 

E 
R 


Vdd 




-10.8 


1 2 


— 13.2 


8 




'ss 


(Note 4) 




14 


25 


mA 




9 






Iqd 






- 14 


-25 




10 


L 


1 

N 
P 


ViNH 


Comparator Input, Sign/UR/OR/ 


4 






V 


Guaranteed Input Threshold Voltages 


1 1 


D 
1 


V|NL 


Blink (Note 5), Start, CLK IN 






5 


12 


2 
1 


U 
T 


l|NH 


Sign/OR/UR (Note 5) 




170 


300 


(jA 


V|N=5V 


13 


A 
C 


S 


l|NL 


Start Convert, Clock 




-150 


-400 


V|N = V 


14 


J 




Vqh 


Bit Lines, Sign/OR/UR Digit Strohes 


2 4 








'oh =■ -'lo 


15 


D 
1 




u 

T 
P 

u 

T 

S 


Vol 






0.6 




l0L~ 1 6 mA 


16 


G 
1 


Vqh 


M/Z 


4 






V 


IOH = -150/iA 


17 


T 
A 


Vol 






0.6 


IOL=08mA 


18 


L 


Vqh 


U/D 


4.0 








Iqh ~ —0.5 mA 


19 






Vol 






0.6 




IOL= 0.8 mA 


20 






'p 


Start Convert (Note 6) 


20 






PS 




21 




D 
Y 
N 


'CLK 




50 




250 




50% Duty Cycle 


22 






Rep Rate (Strobes) 


y 

78 




470 


H/ 


'CLK : 640 



INPUT/OUTPUT SCHEMATICS 



Pin 15 Pin 16 
V|N V+ 



J 



HI Q . 
GND 
Pin 2 



TO USER INPUT 
BUFFER AMP 
Pin 1 




Vss 
o 



COMP 
OUTPUT 
Pm 5 



V- Pin 6 

LD122 Comparator Output 





LD122 Input 



LD121A Output Buffers 
(Digits, Bits, Sign, M/Z U/D) 



t 

V|N 



LD121A Clock Input 
Start Convert , 



Pin 3 I 
V|N 
JL 



LD121A Comparator Input 



2818 



Siliconix 



© IC MASTER 1983 



ELECTRICAL CHARACTERISTICS (Cont'd) 


CHARACTERISTIC 


MIN 


TYP 


MAX 


UNITS 


TEST CONDITIONS 
UNLESS NOTED OTHERWISE 
V+ = 12 V; V- =• Vdd =. -12 V, 
Vss ' 5 V, Ta = 25°C 


23 


L 
D 
1 

2 
2 
C 
J 

L 
1 

N 
E 
A 
R 


P 

O 

w 

E 
R 


V+ 




9 


12 


15 


V 




24 


V- 




-9 


--12 


-15 


25 


1 + 








3.5 


mA 




26 


1- 








-3 


27 


Ignd 









-2 


mA 


M/Z, U/D = 2.4 V 


28 


1 

N 
P 
U 
T 

s 
w 
1 

T 

c 

H 


Va 


(Note 7) 


-3 




+ 3 


V 




29 


'■DS{on) 


On Resistance, V||vj or 
Hi-Q Switches 






5.5 




\/ = -t- 1 \/ 
^A +^ ^ 


30 






8.0 


V^=-1V 


31 

32 
33 


'leakage 


Leakage Current, Switch 
ON or OFF 




2 




pA 


= ± 2 , 8 V 


34 


A 
Z 

B 
U 
F 
F 


'source 






- 1 00 




mA 




35 


ISINK 






800 




36 


ISTRG 






1 00 




pA 


~ 70 C 


37 


^OFFSET 




— 50 






mV 


^OUT - V 


38 




Switch Resistance Ion) (Note 8) 






20 




^STRG ^ ^' 'DS oU^iA 


39 


R B 
E U 
F F 


'source 


Pin 8 


—400 


—800 




aiA 


Vll \\Jl U 11^ 1 , U.O V, VQ ~ U V 


40 


ISINK 


Pin 8 




100 




V|H (U/D IN) = 2.0 V, Vo = 2 V 


41 


1 

N 
T 


ISOURCE 


(Note 9) 


-50 


-100 






V|fvj (Int. IN) = -100 mV, Vo = V 


42 


'sink 


400 


800 




V|r^ (Int. IN) = 100 mV, Vq = V 


43 




Output Swing 


-10 




10 


V 




44 


C 

M 
P 


^OUT 




-5 






V 


Rl_ = 10k to -1^5 V, AZ FILTER IN = 
lOOmV 

INTEGRATOR OUT = V 


45 


^OFFSET 






5 




mV 


46 




l|H 


M/Z, U/D Inputs 






20 


mA 


V|H = 2.0 V 


47 


l|L 






-100 




V|L = 0.8 V 


Tvpical values are for Design Aid Only, not guaranteed and not subject to production testing. LD1 22 - CM AM-C LD121A - IPDC VI 


NOTES: 

1 . Bit width over which reading is stable 95% of the time. 

2. System Parameters are not directly tested. 

3. fcLK = 163.84 kHz, Vref = 6.8 V. 

4. All outputs disconnected. 

5. Pin characteristic only during D4 strobe time. 

6. Minimum positive going pulse width to initiate a conversion. 

7. Maximum voltage range for Vii^pyj (pin 1) or hi-quaiity GND (pin '2). 

8. VsTRG "^"St be more positive than —4 volts. 

9. Reference Source Impedance must be less than 1 0K il. 


TYPICAL CHARACTERISTICS 

Vjfj and V^i.Q GND Switches Typical Input Leakage.vs Temp and Input Leakage Test Set-up 
Typical rpslon) « and Temp .12 v -12 v 

•- - .... V+- . v- 


14K 

i 10K 

z 



a 

2K 
















V»-*12V 


_ 10 pA 

IpA 

70* C 
25" C 
O'c 

„ 0.1 pA 

01 


;- v» ■ » 1 2 V t : i 








16° 16 
























:.T ■[ : 

_...(_ ). . 4 .... 








V|N 15 

1 — 

HiQ 2 
GND? 


— T 


1 
























- - Va 


•-5V 


7 4 3 


BUFF IN 


































1 . , lU/DlM/Z 
















J - GND OV OV 
























?^ V. 






























































































I 


Va - VOLTAGE PIN IS (V|m) OR PIN 2 (HI Q GN 
W ITH RESPECT TO ANALOG GND PIN 7 


• 10" 20' 30* 40" 50" SO- 70- 8 
T - TEMPERATURE I'CI 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 




Regulating Pulse 
Width Modulators 

designed for ... 

■ Switched Mode Power 
Supplies (SMPS) 



BENEFITS 



Siliconix 

May 1982 



Improved Performance Over SG2525A/2527A 

o Greatly Reduced Output Crossover Current 
o Greatly Reduced Transients with Separated 

Ground System 
o Fully Operational Up to 500 KHz 

Wide Versatility 

o 100 Hz to 500 KHz Oscillator Range 

o Separate Oscillator Sync Term inal 

o Adjustable Deadtime Control 

o Internal Soft-Start 

o Input Undervoltage Lockout 

o Latching PWM to Prevent Multiple Pulses 

o 8 to 35 Volts Operation 

Lower Overall Parts Count 

o 5.1 Volt Onboard Reference Trimmed 
to±1% 

o Dual 100mA source/Sink Output Drivers 
Pin Compatible with SG2525A/2527A 



DESCRIPTION 

The PWM25/27 series of pulse width modulator integrated circuits are designed to offer improved performance and 
lowered external parts count when used to implement all types of switching power supplies. In addition to being pin 
compatible with the SG2525A/2527A the PWM25/27 features low crossover current through the output transistors and 
will maintain typical 10% pulse width up to 200KHz. The on-chip +5.1 volt reference is trimmed to ±1% -initial accuracy 
and the input common-mode range of the error amplifier includes the reference voltage, eliminating external potentio- 
meters and divider resistors. A Sync input to the oscillator allows multiple units to be slaved together, or a single unit to be 
synchronized to an external system clock. A single resistor between the Cj pin and the Discharge pin provides deadtime 
adjustment. These devices also feature built-in soft-start circuitry with only a timing capacitor required externally. A Shut- 
down pin controls both the soft-start circuitry and the output stages, providing instantaneous turn-off with soft-start re- 
cycle for slow turn-on. These functions are also controlled by an undervoltage lockout which keeps the outputs off and 
the soft-start capacitor discharged for input voltages less than that required for normal operation. Another unique feature 
of these PWM circuits is a latch following the comparator. Once a PWM pulse has been terminated for any reason, the out- 
puts will remain off for the duration of the period. The latch is reset with each clock pulse. The output stages are totem- 
pole designs capable of sourcing or sinking 100 mA. The PWM25 output stage features NOR logic, giving a LOW output 
for an OFF state. The PWM27 utilizes OR logic which results in a HIGH output level when OFF. 

PIN CONFIGURATION 

Dual-ln-Llne Package 



INV INPUT {T 




iUvREF 


N.I. INPUT fT 




j5]+V|N 


SYNcjT 




u\ OUTPUT B 


OSC OUTPUT |T 






Ct[T 




12]gND 


Rt[T 




Tt] output a 


DISCHARGE pT 




To] SHUTDOWN 


SOFT-START |T 




T] COMPENSATION 



ORDER NUMBERS: 



PWM25BK 
PWM25CK 



PWM27BK 
PWM27CK 



Top View 



2820 



© IC MASTER 1983 




ABSOLUTE MAXIMUM RATINGS * (Ta = 25°C unless noted otherwise) 



Supply Voltage (+V|n) +40V 

Collector Supply Voltage (Vq) +40V 

Logic Inputs -0.3V to +5.5V 

Analog Inputs -0,3V to +V||\j 

Output Current, Source or Sink 500 mA 

Reference Output Current 50 mA 

Oscillator Charging Current 5 mA 

Power Dissipation at Ta = +25°C** 1000 mW 

Thermal Resistance: junction 

to ambient 100°C/W 



Power Dissipation at Tq = +25°C***. . . . 2000 mW 
Thermal Resistance: junction to case .... 60°C/W 

Operating Junction Temperature +150°C 

Storage Temperature Range .... -65° C to +150°C 
Lead Temperature 

(Soldering, 10 seconds) +300°C 

*Values beyond which damage may occur. 

o o 
** Derate at 10 mW/ C for ambient temperatures above +50 C. 

*.** Derate at 16 mW/ C for case temperatures above +25 C. 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



2821 



RECOMMENDED OPERATING CONDITIONS 1 
















Inniit Wnltanp Z+V.mK . . 


+8V to +35V 


Ooeratinq Ambient Temoerature Ranqe 




' • IN' 

Collector Supply Voltage (Vc). • • +4.5V to +35V 
Sink/Source Load Current 

(each output) Steady State to 100 mA 

Poak Piirrpnt to 400 mA 


PWIVI25C, PWM27C 




0°C to +70° C 


PWIV125B. PWM27B 




-2R°r: tn +8.R°r. 
















Rpfprpnnp 1 narl Ciirrpnt 


_ to 20 mA 
















Oscillator Frequency Range. . -100 Hz to 500 kHz ^ 
Oscillator Timing Resistor 1 .5K to 21 Ok^2 

Dcinillatnr Timinn Cananitnr R20 nF to 0.1 LtF 


Range over which the device is functional. 


























ELECTRICAL CHARACTERISTICS (+V||\| = 20V, and over operating temperature, unless otherwise noted) 




Parameter 


Conditions 


PWM25B 
PWM27B 


PWM25C 
PWM27C 


Units 








Min 


Typ 


Max 


Min 


Typ 


Max 




Reference Section 


1 


Output Voltage 


Tj = 25° C 


5.05 


5.10 


5.15 


5.00 


5.10 


5.20 


V 


2 


Line Regulation 


ViN = 8 to 35V 




4 


20 




4 . 


20 


mV 


3 


Load Regulation 


II = to 20 mA 




20 


50 




20 


50 


mV 


4 


Temperature Stability^ 


Over Operating Range 




20 


50 




20 


50 


mV 


5 


Total Output Variation^ 


Line, Load, and Temp 


5.00 




5.20 


4.95 




5.25 


V 


6 


Short Circuit Current 


Vref = 0,Ti = 25°C 




80 


110 




80 


110 


mA 


7 


Output Noise Voltage^ 


10 Hz<f < 10 kHz,Tj = 25°C 




40 


200 




40 


200 


inVrms 


8 


Long Term Stability^ 


Tj = 125°C 




20 


50 




20 


50 


mV/khr 


Oscillator Section^ 


9 


Initial Accuracy^''^ 


Tj = 25°C ' 




±2 


±6 




±2 


±6 


% 


10 


Voltage Stability^'^ 


ViN = 8 to 35V 




±0.1 


±1 




±0.1 


±2 


% 


11 


Temperature Stability^ 


Over Operating Range 




±3 


±6 




±3 


±6 


% 


12 


Minimum Frequency 








100 






100 


Hz 


13 


Maximum Frequency 




400 


500 




400 


500 




kHz 


14 


Current Mirror 


lRT = 2mA 


1.7 


2.0 


2.2 


1.7 


2.0 


2.2 


mA 


15 


Clock Amplitude^'"^ 




3.0 


3.5 




3.0 


3.5 




V 


16 


Clock Width2.3 


Tj = 25°C 


0.3 


0.5 


1.3 


0.3 


0.5 


1.3 


jusec 


17 


Sync Threshold 




1.2 


2.0 


2.8 


1.2 


2.0 


2.8 


V 


18 


Sync Input Current 


Sync Voltage = 3.5V 




1.0 


2.5 




1.0 


2.5 


mA 


Error Amplifier Section (VcM = 5.1 Volts) 


19 


Input Offset Voltage 






0.5 


5 




2 


10 


mV 


20 


Input Bias Current 






1 


10 




1 


10 


mA 


21 


Input Offset Current 








1 






1 


/iA 


22 


DC Open Loop Gain 


RL> 10 Mega 


60 


80 




60 


80 




dB 


23 


Gain-Bandwidth Product^ 


Av = dB, Tj = 25°C 




3.5 






3.5 




MHz 


24 


Output Low Level 






.02 


0.5 




.02 


0.5 


V 


25 


Output High Level 




3.8 


7 




3.8 


7 




V 


26 


Common Mode Rejection 


VcM = 1.5 to 5.2V 


60 


85 




60 


85 




dB 


27 


Supply Voltage Rejection 


ViN = 8to35V 


50 


85 




50 


85 




dB 


^ These parameters, although guaranteed over the recommended operating conditions, are not 1 00% tested in production. PWM25 CMCD-A 
3 Tested at fQSC = ^0 kHz (Ry =3.6 kn. Cj = .01 mF, Rq = 0^^)- PWM27 CMCD-B 

TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves the right to 

change specifications for this product in any manner without notice. 



Siliconix 



© IC MASTER 1983 



ELECTRICAL CHARACTERISTICS (CONT) 



Parameter 


Conditions 


PWM25B 
PWM27B 


PWI\/I25C 
PWM27C 


Units 


Min 


Typ 


Max 


Min 


Typ 


Max 


P.W.M, Comparator 


28 


Minimum Duty Cycle 


















% 


29 


Maximum Duty Cycle 




45 


49 




45 


49 




% 


30 


Input Threshold^ 


Zero Duty Cycle 


0.6 


0.9 




0.6 


0.9 




V 


31 


input Threshold^ 


Max Duty Cycle 




3.3 


3.6 




3.3 


3.6 


V 


32 


Input Bias Current^ 






.05 






.05 




iiA 


Soft-Start Section 


33 


Soft Start Current 


VSHUTDOWN = OV 


25 


50 


100 


25 


50 


100 


HA 


34 


Soft Start Voltage 


VSHUTDOWN = 2V 




0.4 


0.6 




0.4 


0.6 


V 


35 


Shutdown Input Current 


VsHUTDOWN = 2.5V 




0.4 


1.0 




0.4 


1.0 


mA 


Output Drivers (Each Output) (Vc = 20 Volts) 


36 


Output Low Level 


ISINK = 20 mA 




0.2 


0.4 




0.2 


0.4 


V 


37 


ISINK = 100 mA 




1.0 


2.5 




1.0 


2.5 


V 


38 


Output High Level 


ISOURCE = 20 mA 


18 


19 




18 


19 




V 


39 


ISOURCE = 100 mA 


17 


18 




17 


18 




V 


40 


Undervoltage Lockout 


Vcomp and Vss = high 


6 


7 


8 


6 


7 


8 


V 


41 


Crossover Current 


Vc = 35V 




120 






120 




mA 


42 


Rise Time'* 


Cl = 1 nF, Tj = 25°C 




100 


600 




100 


600 


nsec 


43 


Fall Time^ 


Cl = 1 nF, Tj = 25°C 




50 


300 




50 


300 


nsec 


44 


Shutdown Delay** 


VsH = 3V, Cs = 0, Tj = 25°C 




0.2 


0.5 




0.2 


0.5 


^sec 


Total Standby Current 


45 


Supply Current 


ViN = 35V 




14 


20 




14 


20 


mA 



^ These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production. PV\/I\/125 CMCD-A 
5 Tested at fosc = '^O kHz (Ry = 3.6 kf2, Cj = .01 mF, Rq = on). P\/VM27 CMCD-B 



PACKAGE DIMENSIONS 



liJLHJLuJliiJLlilLlilLl^l^l 



-0.840 (21 34i MAX- 



0.310 
0.220 

17.87 ) 
15.591 



0.060 
0.015 

11.52) 
10 38) 



PACKAGE 10 

16. Lead Dual in Line Package (K) 
(Cerdip) 

PIN 1 INDEX IS ONE OR MORE OF THE FOLLOWING: 

■ DOT (INKOR IMPRESSION) ON TOP OF PACKAGE 

■ NOTCH OR HOLE IN PIN 1 VISIBLE FROM TOP AND/OR SIDE 

■ NOTCH IN END OF PACKAGE VISIBLE FROM TOP AND/OR BOTTOM 
(INDEX NOTCH MAY BE PARTIALLY FILLED WITH GLASS) 



IMMMKl 



^ 023 
*0 014 

10 58 1 
10 381 



^ 0.070 
"0.030 

(1 78 ) 
10 76) 



0.200 

15.08) 



-_ 'SEATING 

Tplane 

0.200 1 5. OS) 
0.125 (3.181 



_ 0.110 12 79 ) O 
"^nnon /o -701 TYP ^ 



0.320 18. 13 ) _ I ., 
0.290 17 37)'' 

-Oto 15° 
TYP 



0.015 J(V^ 



0.008 

1033 ) 
(020) 



ALL DIMENSIONS IN INCHES 

(ALL DIMENSIONS IN MILLIMETERS} 



TOLERANCE 
NON-ACCUMULATIVE 



TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves the right to 
change specifications for this product in any manner without notice. 



© IC IVIASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



D-MOS FET QUAD ANALOG 
SWITCH ARRAYS AND DRIVER 

designed for.„ 

SD5000 SERIES APPLICATIONS FEATURES 



Siliconix 

August 1982 



■ Analog Switching (up to very 
high frequencies) 

■ Audio Routing 

■ Choppers 

■ Crosspoint Switches 

■ Sample and Hold 

SD5200 AppI Ications 

■ Switch Drivers 



Low Input Capacitance - 2.4pF 

Low Feedback Capacitance - 0.3pF 

Low Output Capacitance - 1.3pF 

±10V Analog Signal Range 

Low Propagation Delay Time - 600ps 

Low On Resistance - 30Q 

Low Feedthrough And Feedback Transients 

Ion Implanted For Greater Reliability 

High Channel-To-Channel Isolation - 107dB 

Transient Protection For Gates 



DESCRIPTION 

The SILICONIX D-MOS SD5000, and 5200 series are 
monolithic arrays of silicon, insulated-gate, field-effect 
transistors using the N-channel enchancement mode 
technology. 

This family of devices is designed to handle a wide variety 
of analog switching and driver applications. They are 



capable of high speed operation where excellent transient 
response, and wide voltage range are required. The 
SD5000 quad switch array can handle high voltage analog 
signals (± lOV), whereas the SD5001 and SD5002 are 
designed for lower voltage applications. The SD5200 is 
intended for use as a 30V driver to complement the other 
switch products. 



PIN CONFIGURATIONS 



I, N PACKAGE 

(TOP VIEW) 



DRAIN 1 |_J 
SUBSTRATE | 2 
GATE1 I 3 
SOURCE 1 
S0URCE2 I 5 
GATE 2 [T 
NO [7 
DRAIN 2 I 8 



16 I DRAIN 4 

Ts] NO 

GATE4 

TT| SOURCE4 
IF] SOURCE 3 

ri"! GATE3 
1o~\ NC 
~9~| DRAIN3 



ORDER PART NO. 
SD5000N SD5001N SD5002N SD5200N 
(PLASTIC) 

SD5000I SD5001I SD5002I SD5200I 
(SIDE BRAZE) 



FUNCTIONAL AND 
SCHEMATIC DIAGRAM 

SD5000, 5001,5002, 5200 

3 O 1 



O— O 4 1 



6 O 



O 05 



no- 1 

I 



IQ — 012 9 C^^^-^ 



140 1 14 

I 

160— 013 16 



CHIP DIAGRAM 



SD5000, 5001, 5002, 5200 
SWITCH ARRAYS 




Die Size 35 x 43 



TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves the right to 
change specifications for this product in any manner without notice. 



2824 



© IC MASTER 1983 



ABSOLUTE MAXIMUM RATINGS Ta = 25°C unless otherwise specified. 



PARAMETERS 


SD5000 


SD5001 


SD5002 


SD5200 


UNIT 


Vds Drain-to-source 


+20 


+10 


+15 


+30 


Vdc 


VsD Source-to-drain ^ 


+20 


+10 


+15 


+0.5 


Vqb Drain-to-Substrate 


+25 


+15 


+22.5 


+30 


VsB Source-to-Substrate 


+25 


+15 


+22.5 


+0.5 


Vqs Gate-to-source 


+30 


+25 


+30 


+20 


-25 


-15 


-22.5 




Vqb Gate-to-substrate 


+30 


+25 


+30 


+20 


-0.3 


-0.3 


-0.3 


-0.3 


Vqd Gate-to-drain 


+30 


+25 


+30 


+20 


-25 


-15 


-22.5 




Id Drain current 


50 


50 


50 


50 


niA 


Ambient temperature 
range 


Storage 


-55 to +150 


°C 


Operating 


to +85 


Power Dissipation 


Total package 
dissipation^ 


640 


mW 


Individual transistor 
dissipation 


300 



1. Refer to test conditions specified in Electrical Characteristics Table. 

2. Derated 5mW per degree centigrade. 



TEST CIRCUIT 



SWITCHING TEST CIRCUIT 



CROSSTALK MEASUREMENT 
Quad Switch 
SD5000/SD5001/SD5002 

-5V 



Vo 

600 < 600 



Crosstalk = 20 Log ^ 
V|N 

WtiereV|N = 1V RMS at 3kHz 





CO 

a 

o 
o 
ro 



CO 

a 

ro 
o 
o 



c 
o 
o 



V|N o ^ 



V " SCOPE 



Input Pulse 

tr, tp ■ Ins 
Pulse Width =100ns 
Rep Rale =1MHz 



Sample Scope 

tr<350ps 
R|N = IMQ 
C|N = 2.0pF 



SWITCHING WAVEFORMS 




SWITCHING CHARACTERISTICS 





*d(ON)(ns) 


*r(ns) 


* *OFF(ns) 


Vdd 


Rl 


TYP 


MAX 


TYP 


MAX ' 


TYP 


MAX 


5 


680 


0.6 


1.0 


0.7 


1.0 


9.0 




10 


680 


0.7 




0.8 




9.0 




15 


Ik 


0.9 




1.0 




14.0 





*tQpp is dependent on Riband does not depend 
on the device characteristics. 



TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves tfie riglit to 
change specifications for this product in any manner without notice. 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



2825 



DC ELECTRICAL CHARACTERISTICS Ta = +25°C unless otherwise specified. 



PARAMETER 


TEST CONDITIONS 


SD5000 


SD5001 


UNIT 


Min 


Typ 


Max 


Min 


Typ 


Max 


BREAKD( 
BVds 


DWN VOLTAGE 
Drain-to-source 


Vgs = Vbs=-5V. Is = lOnA 


20 


25 




10 


25 




V 


BVsD 


Source-to-drain 


Vgd = Vbd=-5V, Id= lOnA 


20 






10 






V 


BVdb 


Drain-to-substrate 


Vqb" 0^' source Open 
lD=10nA 


25 






15 






V 


BVqO 


Source-to-substrate 


Vrb- OV, drain Open , 
1 - ini / A 

Is 1 UjLtM 


25 






1 ^ 

1 






V 


LEAKAGE 
Ids(OFF) 


CURRENT 
Drain-to-source 


^GS ~ V BS - 3V, V DS - ^'iUV 




1 


10 








nA 


Vgs=Vbs=-5V, Vds=+10V 










1 


10 


Isd(OFF) 


Source-to-drain 


''GD ''BD <J*i*SD 




1 


10 








nA 


Vgd = Vbd=-5V, Vsd=+10V 










1 


10 


'gbs 


Gate 


Vdb = Vsb=OV, Vgb=30V 






1 








/^A 


Vdb=Vsb=OV, Vgb=25V 












1 


Vt 


Threshold voltage 


Vds= Vgs= Vt. Is= I^A 
VsB= OV 


0.1 


1.0 


2.0 


0.1 


1.0 


2.0 


V 


rDs(On) 


Drain-to-source 
resistance 


Id= 1.0mA. Vsb=0,Vgs=+5V 




50 


70 




50 


70 


n 


Id= 1.0mA, VsB = 0, Vgs= +10V 




30 






30 




Id = 1.0mA, VsB = 0, Vgs= +15V 




23 






23 




1 D = 1 .0mA, V SB = 0, V Gs = +20V 




19 






19 




rDs(On) 


Resistance match 
(Note 1) 


Id = 1.0mA, VsB = 
Vgs=+5V 




1 


5 




1 


5 





PARAMETER 


TEST CONDITIONS 


SD5002 


SD5200 


UNIT 


Min 


Typ 


Max 


Min 


Typ 


Max 


BREAKDOWN VOLTAGE 


Vgs=Vbs=OV. Id^10)^A 








30 


35 




V 


BVds 


Drain-to-source 


Vgs = Vbs = -5V, Is =10nA 


15 


25 










BVsD 


Source-to-drain 


Vgd=Vbd = -5V, Id= lOnA 


15 












V 


BVdb 


Drain-to-substrate 


Vgb = OV, source Open 
Id= lOnA 


22.5 












V 


BVsB ' 


Source-to-substrate 


Vqb = OV, drain Open 
ls= 10m A 


22.5 












V 


LEAKAGE 
Ids{OFF) 


CURRENT 
Drain-to-source 


Vgs=Vbs=-5V 

Vds=+15V 

Vds=+10V 




1 


10 








nA 


Isd{OFF) 


Source-to-drain 


Vgd=Vbd=-5V 

VsD=+15V 

VsD-+10V 




1 


10 








nA 


'gbs 


Gate 


Vdb=Vsb = OV 
Vgb = 30V 






1 








^^ 




Threshold voltage 


VDS=VGs=VT.is=1iUA 

Vsb=OV 


0.1 


1.0 


2.0 


0.5 


1.0 


2.0 


V 


rDs(On) 


Drain-to-source 
resistance 


Id= 1.0mA. VsB = 0, Vgs= +5V 




50 


70 




50 


80 




Id= 1.0mA. VsB = 0, Vgs= +10V 




30 






30 




ln= 1.0mA, VsB=0, Vgs=+15V 




23 






23 




1 D = 1 .0mA, V SB = 0, V Gs = + 20V 




19 






19 




rDs(On) 


Resistance match 
(Note 1) 


Id= 1.0mA, Vsb= 
Vgs=+5V 




1 


5 








SI 



1. This untested parameter is guaranteed by design. 



TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves tiie right to 
change specifications for this product in any manner without notice. 



2826 



Siliconix 



© IC MASTER 1983 



AC ELECTRICAL CHARACTERISTICS 



PARAMETER 


TEST CONDITIONS 


SD5000 


SD5001 


UNIT 


Min 


TVD 


Max 


Min 


TVD 


Max 


gfs 


Forward transconductance 


Vds= 10V, VsB^OV 
Id = 20mA, f = 1kHz 


10 


15 




10 


15 . 




mmhos 


C(GS*GD+GB) 


Gate node capacitances 


Vds= 10V, f = 1MHz 
Vgs= Vbs=-15V 




2.4 


3.5 




2.4 


3.5 




CfGD+DB) 


Drain node capacitances 




1.3 


1.5 




1.3 


1.5 


Pf 


C(GS+SB) 


Source node capacitances 


See capacitance model 
in Figure 1 




3.5 


4.0 




3.5 


4.0 


Cdg 


Reverse transfer capacitances 




0.3 


0.5 




0.3 


0.5 




Ct 


Cross talk 


See test circuits 
no.1 and 2, f = 3kHz 




-107 






-107 




dB 




PARAMETER 


TEST CONDITIONS 


SD5002 


SD5200 


UNIT 


Min 


Typ 


Max 


Min 


Typ 


Max 


gfs 


Forward transconductance 


Vds= 10V, VsB-OV 
Id = 20mA, f = 1kHz 


10 


15 




10 


15 




mmhos 


C(GS-GD+GB) 


Gate node capacitances 


Vds~ 10V, f - 1MHz 
Vgs= Vbs=-15V 




2.4 


3.5 




2.4 


3.5 




(GD*DB) 


Drain node capacitances 




1-3 


1.5 




1.3 


1.5 


pf 


C(GS*SBl 


Source node capacitances 


See capacitance model 
in Figure 1 




3.5 


4.0 








'-'DG 


Reverse transfer capacitances 




0.3 


0.5 




0.3 


0.5 




Ct 


Cross talk 


See test circuits 
no.1 and 2, f = 3kHz 




-107 






-107 




dB 



THEORY OF OPERATION 

The SD5000 series consists of four SPST 
switches with analog signal capability of 
up to ±10 volts for the SD5000 and ±7.5 
volts for the SD5002. Each switch of the 
array is a D-MOS N-channel field-effect 
transistor of the enhancement-mode type; 
that is, the device is normally off when 
gate-to-source voltage (Vqs) is zero volts. 
When Vqs exceeds the threshold voltage, 
V J, the FET switch starts to turn ON with 
Vcsin excess of +10 volts, a low resistance 
path (typically 30Q) exists between input 
and output of the switch. Figure 1 shows 
the normal mode of operation of a single 
switch of thearrayfor±5 voltanalog signal 
processing. Note that the source is recom- 
mended for the input since feedback or 
reverse transfer capacitance is lower when 
drain is used as the output. When analog 
signals are routed from one point to 
another the important factors are isola- 
tion, crosstalk between switches, feed- 
through and feedback transients, insertion 
loss and speed of operation. The SD5000 
series offers superior performance in all 
these areas (Figure 1). 



Isolation. ON resistance is typically 30Q 
and OFF resistance is typically 10 ^"Q, which 
results in an OFF to On resistance ratio in 
excess of lO^. Isolation from output to 
input from 3kHz analog signals is typically 
-107dB.' 

Feedback and feedthrough transients. 

These are kept to a minimum because of 
the very low feedback and feedthrough 
capacitances. This means that "glitch- 
less" or "clean" signals appear at the 
output. 



Insertion loss. This depends upon the 
source and load impedances involved. As 
an example, for 600Q source impedance 
the insertion loss for voice signals (IV 
RMS at 3kHz) is less than 0.3dB. This 
indicates that the SD5000 series would 
make good telephone cross-point switches. 
Speed. Because of the low ON resistance 
and low input capacitance, the SD5000 
switches ON at sub-nanoseconds speeds. 
They are also capable of handling very 
high frequency analog signals and still 
maintain excellent isolation (20-30dB-at 
1GHz). 



8 

INPUT O- 
(•5V) 



Cgs 



Cqd 



T 

"TCSB 



Cgb 



I 



-O OUTPUT 
(•5V) 



-lOV^ 



Cdb 



GATE 

-lo- 
ts 

OUTPUT ■ 
-5 



Figure 1 



Note that the body (B) is biased to the most negative voltage in the circuit. 



TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves the right to 
change specifications for this product in any manner without notice. 



© 10 MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



2827 



TYPICAL PERFORMANCE CHARACTERISTICS 



MAXIMUM POWER DISSIPATION 
vs TEMPERATURE 




20 40 60 80 
TEMPERATURE(°C) 



z 
o 

"to 
□ 



DRAIN— TO— SOURCE RESISTANCE vs 
SOURCE— TO-SUBSTRATE AND 
GATE-TO— SOURCE VOLTAGE 



150 
135 
120 
105 
90 
75 
60 
45 
30 
15 






k 


.III 


oJ 




(Vsb) 


K^LL 1 O LJ LJ O 

VOLTS 


1 nrt 1 c- 






-10 








5-V 




















































— DRAIN 
AMBIE 


-TO-SC 
NT TEMP 


)URCE C 
ERATURE 


JRRENT = 

I (Ta) =25 
1 


5mA 

"C 



4 8 12 16 20 

GATE— TO— SOURCE VOLTAGE (Vqs) VOLTS 



DRAIN— TO— SOURCE RESISTANCE 
vs TEMPERATURE 



SOURCE— TO— DRAIN LEAKAGE 
CURRENT vs TEMPERATURE 



100 
90 
80 
70 
60 
50 
40 
30 
20 
10 




























'GS=5\ 








\ 


















V 


GS = 10 








<-'*'\/ on\/ 








» us *- 



























rr 100M 



25 ' 50 75 100 

AMBIENT TEMPERATURE (Ta) °C 



O 
Q 



10M 
1M 
100k 
10k 
Ik 
100 
10 
1 



GATE— TO— SUBSTRATE VOLTAGE Vqq = OV 
SOURCE-TO-DRAIN VOLTAGE Vsq = 10^^ 










GATE- 

GATE— TO- 


-TO— DRAI 
-DRAIN VO 


si VOLTAGE 
.TAGE (Vq 


(Vgd) = oV 

3)=-5V — 



























25 40 56 70 85 

AMBIENT TEMPERATURE (Ta)°C 



DRAIN— TO— SOURCE LEAKAGE 
CURRENT vs TEMPERATURE 



SOURCE— TO— SUBSTRATE LEAKAGE 
CURRENT vs TEMPERATURE 



100k 



LU 

(D 
< 

< Q. 

-J uT 
UJ u. 

u 9, 
og 

I- 
O UJ 

H OC 

is 

3" 

CC 
Q 



10k 



1 k 



100 



10 



SOURC 
VSB=( 
GATE- 
DRAIN 


1 1 

;e-to- 

)V 

-TO-S( 
-TO— S 


-SUBST 

DURCE 
OURCE 


RATE V 

^/OLTAC 
VOLTA 


OLTAG 

5EVgs = 
GEVds 


r 

= 0V 

= 10V_ 







































25 35 45 ■ 55 65 75 85 
AMBIENT TEMPERATURE (Ta)°C 



< 

< 
111 
_i 

m < 
K- c 

< " 
cc 



1,000 



100 



CQ 



(O — 

to H 

D Z 

(A UJ 

> ^ 

UJ 
(J 
CC 

O 

(A 



iP 10 



.01 



SOURC 
VsB = - 
GATE- 
• DRAIN 


1 1 

E-TO- 
5V 

-TO-SC 
OPEN 


-SUBST 
DURCE 


RATE V 
i/OLTAC 


r' 

OLTAG 
EVqS 


E 

: -5V 







































25 35 45 56 65 75 
AMBIENT TEMPERATURE (Ta)°C 



85 



TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves the right to 
change specifications for this product in any manner without notice. 



2828 



Siliconix 



© IC MASTER 1983 



TYPICAL PERFORMANCE CHARACTERISTICS (Cont.) 



CROSSTALK vs FREQUENCY 



GATE LEAKAGE CURRENT 
vs TEMPERATURE 



-120 
-110 
-100 
-90 
-80 
-70 
-60 
-50 
-40 



-30 



V 










— N— 






IN -IV 


:rms) 



















































































5? 100k 

< 

a 



^ 10k 



Ik 



100 



10 



1 1 1 1 1 . 

DRAIN— TO— SOURCE VOLTAGE Vqs = 

SOURCE— TO-SUBSTRATE VOLTAGE 
- n 1 1 1 1 


GATE 


-TO-S 


OURCE 


VOLT A 


GEVqs 


= 10V 







































100 Ik 10k 100k 1M 
FREQUENCY (Hz) 



10M 



25 35 45 55 65 75 85 
AMBIENT TEMPERATURE (Ta)°C 



PACKAGE OUTLINES 



riimmmmmmm 



tij biJ IhJ H I15J 

TOP VIEW 



0.23O 

tSMi 
15 841 




0.01s jYP 

Lsai 

1.38) 



0.030 

(1.781 ' 
I 76 1 



iJSSL 
0020 

11.271 
1. 511 



9^ ISJS2 

0.110 (2 791 

t SFtTiun 

PLANE 



0.310 
0.275 

(7.871 
(6 991 



0.110 (2 791 ' 

TOLERANCE 
NON-ACCUMULATIVE 





0.200 (5 081 

o.ioor?*»; 

SEATING 
PLANE 



0.070 - , 
0.040 

LUSl 
(1.02) 



0.008 ( 201 

0.090 (2 291 0.290 ^7 J/; 

TOLERANCE 
NON-ACCUMULATIVE 



16 LEAD DUAL IN LINE PACKAGE (N) 
(PLASTIC) 



16 LEAD DUAL IN LINE PACKAGE (I) 
(SIDE BRAZE) 




■ X 

CO o 

o 

O 

ro 



CO 

a 

01 
ro 
o 
o 



PIN 1.INDEX IS ONE OR MORE OF THE FOLLOWING 

• DOT (INK OR IMPRESSION) ON TOP OF PACKAGE 

• NOTCH OR HOLE IN PIN 1 VISIBLE FROM TOP AND/OR SIDE 

• NOTCH IN END OF PACKAGE VISIBLE FROM TOP AND/OR BOTTOM 

ALL DIMENSIONS IN INCHES 

(ALL DIMENSIONS IN MILLIMETERS) 



TENTATIVE DATA SHEET. This page provides tentative information on a new product. Siliconix reserves tine right to 
change specifications for this product in any manner without notice. 



S Siliconix 



2201 Laurelwood Road Santa Clara, CA 95054 
(408)988-8000 TWX: 910-338-0227 



Siliconix incorporated reserves the rigtit to make chianges in the circuitry or 
specifications at any time without notice, henceforth, assumes no responsibility 
for the use of any circuits described herein and mal<es no representations that 
they are free from patent infringement. Printed in U.S.A. 

5K - 8/82 



© IC MASTER 1983 



See Product Selector Guides on Pages 2779-2783. 



2829 



Si7250 

High Current Power Driver 

Designed as Coil Pre-Driver for Bubble Memories 



Siliconix 

Revised April 1982 



FEATURES 

■ Capable of Driving a 500 pf Load With Less Than 25 ns Transitions 

■ Very Low Standby Power Consumption 

■ TTL Compatible Inputs 

■ Single 12V Power Supply 

■ CMOS Technology 

■ Ideal for use in Magnetic Bubble Memory Systems 

■ Power Fail Reset for Maximum Protection of Bubble Memories 

■ Standard 16 Pin Dual-ln-Line Package. 



DESCRIPTION 

The Si7250 is a low power coil pre-driver for direct 
use with the Siliconix VQ7254 to drive magnetic 
bubble memory coils. The Si7250 has TTL com- 



patible inputs and complimentary outputs designed 
to drive high capacitance, low on resistance MOS- 
POWER® devices. 



LOGIC DIAGRAM 



X + .IN O f 



cs O 



X - IIM O 



® 
® 



RESET O 



Y + .IN O 



Y -.IN O 



® 



-I |-f-rV-=-0 X +.0UT 



X + .OUT 



X -.OUT 



X - .OUT 



Y +.OUT 



• Y +.OUT 



r— l>o-0 Y - .OUT 



Y - .OUT 



PIN CONFIGURATION 



cs 

RESET [2 
X +.IN Q 
X -.IN 

Y +.IN [Z 

Y -.IN [2 
Y - .OUT [2 7 

GND 8 



5 ^ X + .OUT 
^ X + .OUT 



X -.OUT 
^ X - .OUT 
^ Y + .OUT 
^ Y + .OUT 

^ y"^TJt 



ORDER NUMBER: Si7250CK 



2830 



© IC MASTER 1983 



25° C unless otherwise noted) 



ABSOLUTE MAXIMUM RATINGS (Ta = 

Ambient Temperature Under 

Bias -20°Cto+80°C 

Storage Temperature -65°C to +150°C 

Voltage on Any Pin with 

Respect to Ground -0.5 to Vpo + 0-5V 

Supply Voltage, Vdd -0.5to+14V 

Output Current 250 mA 

(One Output @ 100% Duty Cycle) 



Maximum Operating Junction Temperature 150°C 
6jc = 25°C/W 
0JA = 75°C/W (No Airflow) 

Stresses listed under "Absolute Maximum Ratings" may be applied 
(one at a time) to devices without resulting in permanent damage. 
This is a stress rating only and not subject to production testing. 
Exposure to absolute maximum rating conditions for extended 
periods may affect device reliability. 



ELECTRICAL CHARACTERISTICS All DC parameters are 100% tested at 25°C. Lots are sample-tested for 
AC parameters and High and low temperature limits to assure performance with specifications. 



Characteristic 


Limits 


Unit 


Test Conditions 
Unless otherwise noted: 
Ta = 0°C to 70°C 

Vdd = 12V ±10% 


Min 


Tvn^ 


Max 


1 


1 

N 
P 
U 
T 


|l||\|| Input Current 






10 


fjA 


V|=0.8V 


2 


V||_ Low Level Input Voltage 






0.8 


V 




3 


V|H High Level Input Volage 


2.2 






V 




4 


O 
U 
T 

n 

r 

u 

T 


^OLI Output Low Voltage 




1.45 


2.0 


V 


Iql = 200 mA 


5 


Voi_2 Output Low Voltage 




0.1 


0.2 


V 


IOL=10niA 


6 


^OHI Output High Voltage 


"DD 


V DD ' 




,v 


Iqh = -200 mA 


7 


Vqh2 Output High Voltage 


VdD-0.2 


Vdd-0.1 




V 


Iqh = -10 


8 


Iql Output Sink Current 








mA 


Vol = 2.0V, 30% Duty Cycle 


9 


IIqhI Output Source Current 


200 






mA 


VqH = VDD-2.0V, 30% 

D 1 1 tw Ov/pI P 


10 


D 
Y 
N 
A 
M 
1 

C 


Propagation Delay from X+.IN, 
X-.IN, Y+.IN, Y-.IN 




55 


100 


ns 


500 pF Load 


11 


Propagation Delay from CS 
or RESET 




90 


150 


ns 


500 pF Load 


12 


tr Rise Time ( 1 0% to 90%) 




25 


45 


ns 


500 pF Load 


13 


tf Fall Time (90% to 10%) 




25 


45 


ns 


500 pF Load 


14 


^ Skew Between an Output and 
^ its Complement 




10" 


20 


ns 


500 pF Load 


15 


C||\j^ Input Capacitance 






10 


pF 




16 


S 

u 
p 
p 

L 
Y 


Iqqq Supply Current 




1.0 


4.5 


mA 


Chip Deselected: CS - V||-|, 

Vdd = 12.6V 


17 


IddI Supply Current 






75 


mA 


f = 100 kHz, VdD= 12.6V, 
Outputs Unloaded 


18 


IDD2 Supply Current 






90 


mA 


f - 200 kHz, Vdd = 12.6V, 
Output Unloaded 



Note 1: This parameter is periodically sampled and is not 1 00% tested. Condition of measurement is f= 1 MHz, VbiaS~ 2V, Vqd= OV, and 
Ta= 25°. 

Note 2: Typical Values are for DESIGN AID ONLY, not guaranteed and not subject to production testing (Typical values at T « = 25°C and 



VdD= 12V) 



© IC MASTER 1983 



Siliconix 

See Product Selector Guides on Pages 2779-2783. 



AC TEST CONDITIONS 



INPUT 



OUTPUT 



OUTPUT 



Tp 



3.0V 

1.5V 

OV 



50% 



^^50°/ 



PIN DESCRIPTION 

CS{Pinl) 

Chip select is active low. When high, chip is de- 
selected and Iqq is significantly reduced. Chip 
Select is most commonly used for system expansion. 



X-.OUT, X-.OUT, X+.OUT, X+.OUT{Pins 12-15) 

High current outputs and their complements for 
driving the gates of the 7254 QUAD MOSPOWER® 
FETs which in turn drive the X coils of the bubble 
memory. 



RESET (Pin 2) 



Active low input from RESET. OUT of the Con- 
troller results in removal of power from the chip so 
that bubble memory is protected in the event of 
power supply failure. 



Y+.IN, Y-.IN (Pins 5, 6) 

Active low inputs from controller which turn on 
the high current Y outputs. 



X+.IN, X-.IN (Pins 3, 4) 

Active low inputs from controller which turn on 
the high current X outputs. 



Y-.OUT, Y+DUT, Y+.OUT, Y-.OUT (Pins 9-11 
and 7) 

High current outputs and their complements for 
driving the gates of the 7254 QUAD MOSPOWER® 
FETs which in turn drive the Y coils of the bubble 
memory. 



TRUTH TABLE 



INPUT PINS 



OUTPUT PINS 



1 


2 


3 


4 


5 


6 


7 


9 


10 , 


11 


12 


13 


14 


15 


cs 


R 


X+. 




Y+. 




Y-. 




Y+. 


Y+, 


X-. 




X + . 


x+7 


1 


X 


X 


X 


X 


X 





1 










1 





1 


X 





X 


X 


X 


X 





1 










1 





1 



8 INPUT STATES DECODED 











1 





1 





1 


1 







1 


1 













1 


1 





1 













1 


1 













1 


1 


1 





1 










1 


1 


' 















1 





1 


1 




1 








1 












1 





1 










1 








1 












1 


1 





1 







1 








1 









1 





1 





1 


1 












1 









1 


1 





1 


















1 


The 8 remaining input states are not decoded resulting in a reset output condition This is to 
prevent the inadvertent shorting of any power drivers directly across the supplies in a standard 
bubble memory configuration 






















1 















1 
















1 





1 















1 













1 








1 















1 













1 


1 





1 















1 










1 











1 















1 







1 














1 















1 







1 


1 











1 















1 







1 


1 


1 


1 





1 















1 



INPUT STRUCTURE 



'DO 



INPUT 

O Wv- 



OUTPUT STRUCTURE 



'DD 



OUTPUT 



1^ 



2832 



Siliconix 



© IC MASTER 1983 



MOSPOWER Prime Product Selector Guide 



MOSPOWER Prime Product 
Selector Guide 



Packages: 






& 

7/ 1 


1 


i 


11 








BVdss 
(Volts) 


103 


TO-220 


TO-39 


TO-237 


TO-92 


TO-202 


Quad 
Side Braze 


Quad 
Plastic 


450-500 


IRF450 
13A, O.AU 


IRF840 
8A, 0.850 














IRF440 
8A, 0.85fi 


VN5001D/IRF830 
4A, 1.50 














VNP002A* 
6.5A, 1.5n 


IRF820 
2.5A, 30 














VN5001A/IRF430 
4A, ^.5U 
















350-400 


IRF350 
15A, 0.3U 


JRF740 
10A, 0.550 














IRF340 
10A, 0.55n 


VN4000D/IRF730 
6A, 1.00 














VNM001A* 

RA 1 no 


IRF720 
1 fin 














VN4000A/IRF330 
6 A, 1.00 
















150-240 


IRF250 
30A, 0.085n 


IRF640 
18A, 0.180 


VN2406B 
0.8A, 60 


VN2406M 
0.3A, 60 


VN2406L 
0.21A, 60 








IRF240 
18A, 0.1812 


IRF630 
9A, 0.40 




VN2410M 
0.25A, 100 


VN2410L 
0.16A, 100 








IRF230 
9A, 0.4n 


IRF620 
5A, 0.80 














IRF220 
5A, 0.80 


VN2406D 
1.4A, 60 















Silconix 



INTERFACE 



MOSPOWER Prime Product Selector Guide 



Packages: 






/fv 
// 1 


H 

n 


n 

! Ii il 








BVdss 
(Volts) 


TO-3 


TO-220 


TO-39 


TO-237 


TO-92 


TO-202 


Quad 
Side Braze 


Quad 
Plastic 


100-120 


IRF150 
40A, 0.055fi 


IRF540 
27A, 0.085n 


IRFF120 
6A, 0.300 


VN1206M 
0.3A, 60 


VN1206L 
0.21A, 60 








IRF140 
27A, 0.085n 


VN1200D/IRF530 
12A, 0.18n 


IRFF122 
5A, 0.400 


VN1210M 
0.25A, 100 


VN1210L 
0.16A, 100 








VN1200A/IRF130 

12A, o.ien 


IRF520 
8A, o.3on 


VN1206B 
0.8A, 60 


VP1008M 
0.37A, 50 


VP1008L 
0,4A, 60 










VN1206D 

1.4A, en 


VP1008B 
9A, 5U 












80-90 


VN0800A 
12A, 0.18n 


VN0800D 
12A, 0.1 8n 


2N6661 
0.9A, 40 


VN0808M 
0.35A, 40 


VP08Q8L 
0.37 A, 5» 


VN88AF 
1.5A, 40 


VQ1006P 
0.40A, 4.50 


VQ1006J 
0.40A, 4.50 


2N6658 
1.9A, 4n 


VN88AD 
1.7A, An 


VP0808B 
0.9A, 50 


VP0808M 
0.37A, 50 




VN80AF 
1.3 A, 50 


VQ2006P 
1.3A. m. 


VQ2006J 
1.3A, 50 


60 


IRF151 
40A, 0.055Q 


IRF541 
27A, 0.085n 


IRFF121 
6A, 0.300 


VN0606M 
0.4, 30 


VN0610L 
0.2A, 50 


VN66AF 
1.7 A, 30 


VQ1004P 
0.46A, 5.50 


VQ1004J 
0.46A, 5.50 


IRF141 
27A, 0.085n 


VN0600D 
16A, 0.120 


IRFF123 
5A, 0.400 


VN10KM 
0.3A, 50 


VN2222L 
0.15A, 7.50 


VN67AF 
1.6A, 3.50 


VQ1000P 
0.225A, 3.50 


VQ1000J 
0.225A, 3.50 


VN0600A 
16A, 0.120 


IRF531 
14A, 0.18n 


2N6660 
1.1A, 30 


VN2222KM 
0.25A, 7.50 






VO2004P 
1.3A. 5« 


VQ2004J 
1.3A, 5ft 


IRF131 
14A, 0.18n 


IRF521 
8A, 0.300 


VN67AB 
1A, 3.50 












2N6657 
2A, 3Q 


VN66AD 
1.9A, 30 














30-40 


VN0400A 
16A, 0.12n 


VN0400D 
16A, 0.120 


2N6659 
1.4A, 1.80 


VN0300M 
0.7A, 1.20 




VN46AF 
1.6A, 30 


VQ1001P 
0.85A, 1.00 


VQ1001J 
0.85A, 1.00 


2N6656 
2A, ^.8U 


VN0300D 
2.5A, 1.50 


VP0300B 
1.3 A. 2.6JJ 


VP0300M 
0.48A, 2.50 




VN40AF 
1.3A, 50 


VQ2001P 
1.3 A, 20 


VQ2001J 

1.3A, an 


Specialty Products 
(N- and P-Channel 
Quad Arrays) 














VQ3001P 
30V, 30 Total 


VQ3001J 
30V, 30 Total 














VQ7254P 
20V, 30 Total 


VQ7254J 
20V, 30 Total 



VQ1000P ■ VQ1000J 



Siliconix 



60V 



N-Channel Enhancement Mode 

Quad MOSPOWER Array 



This power FET is designed especially for low power high frequency inverters, interface to 
CMOS and TTL logic, line drivers and Analog Switching. 



FEATURES 

■ High Input Impedance 

■ Extremely Fast Switching 

■ Rugged 

■ Internal Drain-Source Diode 

■ Dual-ln-Line Package for Packing 
Density and Automatic Insertion 

BENEFITS 

B Reduced Component Count 

■ Simpler Designs 

— Directly Interfaces CMOS & TTL 
B Improved Circuit Performance 
^ Increased Reliability 



Product Summary 



Part 
Number 


BVdss 
(Volts) 


Rds(on) 
(Ohms) 


Package 


xmo 


VQ1000P 


60 


5.5 


Side Braze 




VQ1000J 


60 


5.5 


Plastic 


CO 



D2 S2 G2 NC G] Si Di 




N N 

[aj [9j ^ [iij [i2j [13J [14J 

D3 S3 ■ 63 NC G4 S4 D4 

TOP VIEW 
ORDER NUMBER: VQ1000P, VQ1000J 



s 



ABSOLUTE MAXIMUM RATINGS (Ta=25°C unless otherwise noted) 

Drain-Source Voltage 60V 

Drain-Gate Voltage 60V 



Linear Derating Factor 

Single 10.4mW/°C 

Quad 16mW/°C 



Drain Current 

Continuous^ ±225mA 

Pulsedi'2 _ 

Gate-Source Voltage ±30V 

Gate Current Peak ±1A 

Power Dissipation 

Single 1.30W 

Quad 2W 



Operating and Storage 

Temperature -55°C to +150°C 

Lead Temperature 
(1/16" from case for 10 sees) +300°C 



Note: 1: Single device alone. Package limited. 
Note: 2: Pulse test: 80^s to 300^5, 1% duty cycle. 



PACKAGE DIMENSIONS 




PIN 1 INDEX IS ONE OR MORE OF 
THE FOLLOWING 

• DOT (INK OR IMPRESSION) ON 
TOP OF PACKAGE 

• NOTCH OR HOLE IN PIN 1 
VISIBLE FROM TOP AND/OR 
SIDE 

• NOTCH IN END OF PACKAGE 
VISIBLE FROM TOP AND/OR 
BOTTOM 



m m m m m m m 



PIN 1 INDEX IS ONE OR MORE OF 
THE FOLLOWING 

• DOT (INK OR IMPRESSION) ON 
TOP OF PACKAGE 

• NOTCH OR HOLE IN PIN 1 
VISIBLE FROM TOP AND/OR 
SIDE 

• NOTCH IN END OF PACKAGE 
VISIBLE FROM TOP AND/OR 
BOTTOM 

ALL DIMENSIONS IN INCHES 

{Alt mMFNSIONS IN MtLLIMETEf^Sy 



0.090 (!.29l 
TOLERANCE 
NON-ACCUMULATIVE 



-^I—IOUOUtyp 

' n nno / '>ni 




0.310 17.871 . ,1 
0.290 17 371 I U 

-Owls' 0012 -\\— - 



14-LEAD DUAL-IN-LINE PACKAGE (P) 
(SIDE BRAZE) 



14-LEAD DUAL-IN-LINE PACKAGE (J) 
(PLASTIC) 



© IC MASTER 1983 



See Product Selector Guides on Pages 2833-2834. 



2835 



Parameter 


Min 


Max 


Unit 


Test Conditions 


Static 


BVdss Drain-Source Breakdown 


60 




V 


Vgs = 0, Id = 100mA 


VGS(th) Threshold Voltage 


0.8 


2.5 


V 


Vne = Vr^c. In = 1 mA 


Iqss Body Leakage 




100 


nA 


Vr!Q = 10V, Vn<? = 




500 


Vrc; = 10 V, Vnq = 0. Ta = 125°C 


loss Zero Gate Voltage Drain Current 




10 


mA 


Vgs = 0, Vns = 48V 

OO ' L/O 




500 


Vrjc; = 0, Vnc; = 48 V. T& = 125''C 


VDS(on) Drain-Source Saturation Voltage^ 




1.5 


V 


Vgs = 5V, Id = 0.2 a 




1.65 


Vgs = 10V, Id = 0.3 a 


'■DS(on) Drain-Source On Resistance^ 




7.5 


Q 


Vgs = 5V, Id = 0.2 a 




5.5 


Vgs = 10V, Id = 0.3A 


'□(on) On-State Drain Current'' 


0.2 




A 


Vds = 15V, Vgs = 5V 


0.5 




Vds=15V, Vgs = 10V 


Dynamic 


gfs Forward Transconductancei 


100 




mS 


Vds = 15V, Id = 0.5 a 


Cjss Input Capacitance 




60 


PF 


Vds = 25V, Vqs = 0, f = 1 MHz 


Crss Reverse Transfer Capacitance 




5 


Cqss Common-Source Output Capacitance 




25 


toN Turn-ON Time 




10 


ns 


Vdd = 15V, Rl = 23Q, Rg = 25Q, Id=0.6A 
(Figure 1) 


toFF Turn-OFF Time 




10 



ELECTRICAL CHARACTERISTICS (Ta=25°C unless otherwise noted) 



Drain-Source Diode Characteristics 



Typ 



VsD Forward ON Voltage^ 



-0.85 



is = -0.5A, Vgs = 



Reverse Recovery Time 



165 



ns 



iF = lR = 0.3A, Vgs = 
(Figure 2) 



Note 1 : Pulse test — 80ms to 300 jiS, 1 % duty cycle 

TEST CIRCUITS 

FIGURE 1. Switching Test Circuit 



VNiVIL 



FIGURE 2. JEDEC Reverse Recovery Circuit 



V|N Vdd 
O 



r 




' Rin 



:rl 

i^-r 
J. 

T 
i- J 



-O VoUT 



AW— f 1 

50 Q 



cs 



.5TO50mF 
y'^ l(p)^)Adjust 



PULSE 



[CIRCUIT ■= 
'UNDER 



[GENERATORJ [TEST | 

P.W. = 1us Cs<50pF 
DUTYCYCLE = 1% 



di/dt Adjust 
{^-27^H) 




FROM TRIGGER CKT 



2836 



Siliconix 



© 10 IVI ASTER 1983 



VQ1004P ■ VQ1004J ■ VQ1006P ■ VQ1006J 



Siliconix 



90V 



N-Channel Enhancement Mode 

Quad MOSPOWER Array 



This power FET is designed especially for low power high frequency inverters, interface to 
CMOS and TTL logic, line drivers and Analog Switching. 



FEATURES 

■ High Input Impedance 

■ Extremely Fast Switching 

■ Rugged — Dissipation Limited SOA 

■ Internal Drain-Source Diode 

■ Dual-ln-Line Package for Packing 
Density and Automatic Insertion 

BENEFITS 

■ Reduced Component Count 
B Simpler Designs 

— Directly Interfaces CMOS & TTL 
B Improved Circuit Performance 
B Increased Reliability 



Product Summary 



Part 
Number 


Package 


RDS(on) 


Id 


BVdsS 


>< 


VQ1004P 


14 Pin DIP, Side Braze 


3.5 Q 


0.46A 


60 V 


'c 




VQ1004J 


14 Pin DIP, Plastic 


_o 


VQ1006P 


14 Pin DIP, Side Braze 


4.5Q 


0.40 A 


90 V 


(75 


VQ1006J 


14 Pin DIP, Plastic 




D2 S2 G2 NC Gi Si Di 






N N 
[8J [9J [lOj [llj [12J [13J [14J 
D4 



D3 S3 G3 NC G4 S4 

TOP VIEW 

ORDER NUMBER: VQ1004P, VQ1004J, VQ1006P, VQ1006J 



ABSOLUTE MAXIMUM RATINGS (Ta=25°C unless otherwise noted) 



Drain-Source Voltage 

VQ1004P, J 60V 

VQ1006P, J 90V 

Drain-Gate Voltage 

VQ1004P, J 60 V 

VQ1006P, J. . . 90V 

Gate Current (Peak) ±1A 

Gate-Source Voltage ±30V 

Drain Current Continuous^ 

VQ1004P, J ±0.46 A 

VQ1006P, J ±0.40 A 

Drain Current 

Pulsed2 ±2A 

Note 1: Single device alone. Package limited. 
Note 2: Pulse test: SOfiS to 300ms, 1 % duty cycle. 



Power Dissipation 

Single 1.30W 

Quad 2W 

Linear Derating Factor 

Single 10.4mW/°C 

Quad 16mW/''C 

Thermal Resistance 

Single 96.2°C/W 

Quad ..62.5°C/W 

Operating and Storage 

Temperature -55°C to -i-150°C 

Lead Temperature 
(1/16" from case for 10 sees) -i-300°C 



PACKAGE DIMENSIONS 



DEX IS ONE OR MORE OF 
E FOLLOWING 

OR IMPRESSION) ON 




m m m rri m m m 



PIN 1 INDEX IS ONE OR MORE OF 
THE FOLLOWING 

ESSIONl ON 



0.110 (2.79) 
0-090 (2.29) 
TOLERANCE 
NON-ACCUMULATIV 




14-LEAD DUAL-IN-LINE PACKAGE (P) 
(SIDE BRAZE) 



14-LEAD DUAL-IN-LINE PACKAGE (J) 
(PLASTIC) 



© IC MASTER 1983 



See Product Selector Guides on Pages 2833-2834. 



2837 



ELECTRICAL CHARACTERISTICS (Ta=25''C unless otherwise noted) 



Parameter 


Part Number 


Min 


Max 


Unit 


Test Conditions 


Static 


bVdss 


Drain-Source Breakdown 


VQ1004 


60 




V 


Vgs = 0, Id = 10mA 


VQ1006 


90 






VGS(th) 


Gate-Source Threshold 
Voltage 


All 


0.8 


2.5 


V 


VdS = VgS. lD = ''f"A 


'gss 


Gate Body Leakage 


All 




100 


nA 


Vgs = 15V, Vds = 




500 


Vgs = 15 V, Vns = 0, Tfi = 125°C 


■dss 


Zero Gate Voltage Drain 


Ail 




1 


mA 


Vgs = 0, Vds = 0-8 Max Rating 


Current 




500 


Vqs = 0, Vds = 0.8 Max Rating, Ta = 125''C 






All 




1.5 




Vgs = 5V, Id = 0-3A 


VDS(on) 


Drain-Source Saturation 
Voltage'' 


VQ1004 




3.5 


V 


Vgs = 10V, Id = 1A 




VQ1006 




4.5 








All 




5 




Vgs = 5V, Id = 0.3A 


''DS(on) 


Drain-Source On 
Resistance^ 


VQ1004 




3.5 


Q 


Vgs = 10V, Id = 1A 




VQ1006 




4.5 




'□(on) 


On-State Drain Current 


All 


1.5 




A 


Vgs = iov, Vds = 25V 


Dynamic 


Qfs 


Forward Transcon- 
ductance^ 


All 


170 




mS 


Vds = 25V, Id = 0-5 A 


C|ss 


Input Capacitance 


All 




60 






^rss 


Reverse Transfer Capaci- 
tance 


All 




10 


PF 


Vds = 25V, Vgs = 0, f = 1MHz 


Cqss 


Common-Source Output 
Capacitance 


All 




50 








Turn-ON Time 


All 




10 


ns 


Vdd = 25V, Rl = 23Q, Rg = 25Q, Id=1A 


tOFF 


Turn-OFF Time 


All 




10 



Drain-Source Diode Characteristics 



Typ 



VsD Forward ON Voltage^ 



All 



-0.9 



Vgs = 0, Is = -1A 



trr Reverse Recovery Time 



All 



35 



ns Vgs = 0, If = Ir = 1 A 



Note 1: Pulse test — SO^s to 300ms, 1% duty cycle 

TEST CIRCUITS 

FIGURE 1. Switching Test Circuit 



V|N Vdd 

Q 



FIGURE 2. JEDEC Reverse Recovery Circuit 



r 




:rl 



't— <• 



-r 
j_ 

T 



-O VoUT 



Cs 



PULSE 



i circuit — 
'under 



lG_ENERATO_Rj [f_EST | 

P.W. = 1l(S Cs<50pF 
DUTY CYCLE =1% 




FROM TRIGGER CKT 



Siliconix 



© 10 MASTER 1983 



VQ2006P ■ VQ2006J 



S 

Siliconix 



90V 



P-Channel Enhancement Mode 

Quad MOSPOWER Array 



This power FET is designed especially for low power high frequency inverters, interface to 
CMOS and TTL logic, line drivers and Analog Switching. 



FEATURES 

■ High Input Impedance 

■ Extremely Fast Switching 

■ Rugged 

■ Internal Drain-Source Diode 

■ Dual-ln-Line Package for Packing 
Density and Automatic Insertion 

BENEFITS 

■ Reduced Component Count 

■ Simpler Designs 

— Directly Interfaces CMOS & TTL 
B Improved Circuit Performance 

■ Increased Reliability 



Product Summary 



Part BVdss RdS(ON) 
Number (Volts) (Ohms) 


Package 


VQ2006P -90 


5 


Side Braze 


VQ2006J -90 


5 


Plastic 




D2 S2 G2 NC Gi Si Di ' 




D 

s 




p p 

( 

p p 






[8j ^ [loj [llj [12J [13J [l4j 
D3 S3 G3 NO G4 S4 04 







>< 
"c 
o 
o 



TOP VIEW 
ORDER NUMBER: VQ2006P, VQ2006J 



ABSOLUTE MAXIMUM RATINGS (Ta=25°C unless otherwise noted) 

Drain-Source Voltage -90V 

Drain-Gate Voltage -90V 



Linear Derating Factor 

Single 10.4mW/°C 

Quad 16mW/°C 



Drain Current 

Continuous^ ±410mA 

Pulsedi-2 ±3.0A 

Gate-Source Voltage ±20V 

Gate Current Peak ±1A 

Power Dissipation 

Single 1.30W 

Quad 2W 



Operating and Storage 

Temperature -55°C to H-ISCC 

Lead Temperature 
(1/16" from case for 10 sees) +300°C 



Note 1: Single device alone. Package limited. 
Note 2: Pulse test: 80ms to 300^3, 1% duty cycle. 



PACKAGE DIMENSIONS 




INDEX IS ONE OR MORE 01 
FOLLOWING 
DOT (INK OR IMPRESSION) ON 
TOP OF PACKAGE 
NOTCH OR HOLE IN PIN 1 
VISIBLE FROM TOP AND/OR 
SIDE 

NOTCH IN END OF PACKAGE 
VISIBLE FROM TOP AND/OR 
BOTTOM 



m m m m nn m m 



L8j LU IHJ inJ IhJ LiiJ H 



0.270 
0.230 

(6.8GJ 



PIN 1 INDEX IS ONE OR MORE OF 

• DOT (INK OR IMPRESSION! ON 
TOP OF PACKAGE 

• NOTCH OR HOLE IN PIN 1 
VISIBLE FROM TOP AND/OR 
SIDE 

• NOTCH IN END OF PACKAGE 
VISIBLE FROM TOP AND/OR 
BOTTOM 

ALL DIMENSIONS IN INCHES 

fALL DIMENSIONS IN MILLIMETERS) 



X 



0.023 

flft015^„„ ^ 




0.200 (5. 
1 0.110 12.79) 

L-i. 



M ' / 

' 0.030 _. r f^O OaO <2-29) ' 



0.090 12.29) 
TOLERANCE 
NON-ACCUMULATtVE 



, 0.310 (7.87) , il 
0.290 i7.37)^ \\ 

■0 lo 15° 0.012 ^y-— 



14-LEAD DUAL-IN-LINE PACKAGE (P) 
(SIDE BRAZE) 



14-LEAD DUAL-IN-LINE PACKAGE (J) 
(PLASTIC) 



© IC MASTER 1983 



See Product Selector Guides on Pages 2833-2834. 



2839 



ELECTRICAL CHARACTERISTICS (Ta 


=25°C unless Otherwise noted) 




Parameter 


Min 


Max 


Unit 


Test Conditions 


static 


bVdss 


Drain-Source Breakdown 


-90 




V 


Vgs=o, Id = -10mA 


VGS(th) 


Gate Threshold Voltage 


-2.0 


-4.5 


V 


Vds = Vqs. lD = ~1niA 


Iqss 


Gate Body Leakage 




-100 


nA 


Vgs = -30V, Vds = 




-500 


Vqs = -30V, Vds = 0, Ta = 125''C 


'dss 


Zero Gate Voltage Drain Current 




-10 


mA 


Vgs = 0, Vds = -90V 




-500 


Vqs = 0, Vds = -90V, Ta = 125»C 


VDS(on) 


Drain-Source Saturation Voltage^ 




-5.0 


V 


Vgs = -10V, Id = -1A 


""DSton) 


Drain-Source On Resistance^ 




5.0 


Q 


Vqs = -10V, iD = -1A 


'□(on) 


On-State Drain Currenf 


-1.0 




A 


Vqs = -10 V, Vds = -15V 


Dynamic 


Qfs 


Forward Transconductancei 


200 




mS 


Vds = -25V, lD = -500mA 


^iss 


Input Capacitance 




150 






Crss 


Reverse Transfer Capacitance 




20 


PF 


Vds = -25V, Vgs = 0, f = 1MHz 


Cqss 


Comnnon-Source Output Capacitance 




60 








Turn-ON Time 




15 


ns 


Vdd = -25V, Rl = 23£2, Rg = 25Q, Id=-1A 


tOFF 


Turn-OFF Time 




15 


(Figure 1) 



Drain-Source Diode Characteristics 



Typ 



Vsd Forward ON Voltage^ 



0.9 



Vgs = 0, is = 0.5 a 



Reverse Recovery Time 



65 



ns 



Vgs = 0, If = Ir = -0.5A 
(Figure 2) 



Note 1 : Pulse test — SO^s to 300ms, 1 % duty cycle 

TEST CIRCUITS 

FIGURE 1. Switching Test Circuit 



VPMH1G 



FIGURE 2. JEDEC Reverse Recovery Circuit 




PULSE 



|_GENERATORj QEST | 

Cs<50pF 



P.W. = 1 ^t 
DUTY CYCLE = 1% 



2840 



Siliconix 



© 10 IVI ASTER 1983 



VQ3001P ■ VQ3001J 




Quad N-and P-Channel Enhancement Mode 

MOSPOWER 



Siliconix 

August 1982 



These power FETs are designed especially for low power high frequency inverters, 
interface to CMOS and TTL logic, line drivers and Analog Switching. 

FEATURES 



Product Summary 



■ High input impedance 

■ Extremely Fast Switching 

■ Rugged 

B internal Drain-Source Diode 
BENEFITS 

■ Reduced Component Count 
o Simpler Designs 

— Directly Interfaces CMOS & TTL 
B Improved Circuit Performance 
B increased Reliability 



Part 
Number 


BVoss 
Volts 


'■OS(ON) 

. (ohms) 


Package 


VQ3001P 


30 


1 &2 


Side Braze 


VQ3001J 


30 


1 & 2 


Plastic 



0: St Q] NC a, s. 0, 

n m rn rn m (Tj n 



H liJ H W y ^ H 

□] S] G] NC a, s, Ot 



N-Channel 



P-Channel 



0^^ 



ABSOLUTE MAXIMUM RATINGS (Tc = 25°C unless otherwise noted) 



Drain-Source Voltage 30V 

Drain-Gate Voltage 30V 

Drain Current 
Continuous^ 

P-Channel ±600 mA 

N-Channel ±850 mA 

Pulsed^ 

P-Channel ±2.0A 

N-Channel ±3.0A 

Gate Source Voltage ±20V 



Power Dissipation 

Single 1.30W 

Quad 2W 

Linear Derating Factor 

Single 10.4mW/°C 

Quad 16mW/°C 

Operating and Storage 

Tennperature -55°C to +15p°C 

Lead Tennperature 

(1/16" fronn Case for 10 sees) +300°C 



Note: 1. Single device alone. Limited by package dissipation. 
2. Pulse Test: 80 fis - 300 ^s, 1% Duty Cycle. 

PACKAGE DIMENSIONS 

^ I J- PIN t IND€X IS ONE OR MORE OF 

^ ' THE FOLLOWING 

• DOT (INK OR IMPRESSIONI ON 
TOP OF PACKAGE 

• NOTCH OR HOLE IN PIN t 
VISIBLE FROM TOP ANO/OR 
SIDE 

• NOTCH IN END OF PACKAGE 
VISIBLE FROM TOP ANO/OR 
BOTTOM 

ALL DIMENSIONS IN INCHES 

lALL OluenSIOHS in MILLIME TiRSI 




m fsi m pn m m m 



LlJ LlI N liU iiiJ LiiJ LiiJ 

TOf VIEW 



0.230 
15 841 



' 0O8 ' 



0O8 ' 
0.290 i> 3>l 




^mtzzsj TYP 

0090 12:^1 

TOLERANCE 
NON-ACCUMULATIVE 



0.290 '/37l I U 

0IO15' o.oi; - 



14-LEAD DUAL-IN-LINE PACKAGE (P) 
(SIZE-BRAZE) 



14-LEAD DUAL-IN-LINE PACKAGE (J) 
(PLASTIC) 



© IC MASTER 1983 



See Product Selector Guides on Pages 2833-2834. 



2841 



ELECTRICAL CHARACTERISTICS (Ta=25°C unless otherwise noted) 



Symbol 


Parameter 


N-Channei 


P-Channel 


Unit 


Test Conditions 
(Reverse Polarity (or P-Channel) 


Min 


Max 


Min 


Max 


Static 




Drain Source Breal<down 


30 




-30 




V 


Vgs = 0. Id=10mA 


^GS(th| 


Gate Threshold Voltage 


0.8 


2.5 


-2.0 


-4.5 


V 


^08= VgsJo= 1 mA 


' GSS 


Gate Body Leakage 




100 




-100 


OA 


Vos = 0, Vgs = 16V 




500 




-500 


Vds = 0. Vgs=16V. Ta=125=C 


loss 


Zero Gate Voltage Drain 
Current 




10 




-10 


M A 


Vds=24V. Vg<5=0 




500 




-500 


Vds= 24V. Vqs = 0. Ta = 125°C. 
Note 2 


' D(ON) 


ON-State Drain Current' 


2.0 




-1.5 




A 


Vgs=12V, Vds=15V 


Vqs 


Drain-Source On-State 
Voltage ' 




0.35 






V 


Vgs=5.V. Id= 200mA 




1.0- 




-2.0 


Vgs= 12V, Io=1 a 


Dynamic 


9(5 


Forward Transconductance ' 


250 




200 




mS 


Vds= -15V. lD=i:500mA 


C,ss 


Input Capacitance 




100 




150 


pF 


Vgs=0- ^03= 15V. f = 1 MHz 


CqSS 


Output Capacitance 




80 




100 


Crss 


Reverse Transfer 
Capacitance 




55 




60 


^ on 


Turn-On Time 




30 




30 


ns 


Voo = 15V, Ri_ = 2311. Rg=25n 
ID « 0.6A (Figure 1) 


^Off 


Turn-Off Time 




30 




30 


Drain-Source Diode Characteristics 






Typ 


Typ 


Unit 




VsD 


Forward On Voltage 


-■72 


.72 


V 


If = 50 mA. V(33 = 


trr 


Reverse Recovery Time 


50 


65 


ns 


1f = Ir = 0.5A, Vgs = 
(Figure 2) 



Note 1 : Pulse test — 80 to 300 ms, 1% duty cycle. 



TEST CIRCUITS (Reverse Polarity for P-Channel) 
FIGURE 1 Switching Test Circuit 



FIGURE 2 Reverse Recovery Test Circuit 




oy 



OUT 



PULSE • ■ UNDER 
|_GENERATORj {J}^ 

P W- • 1 MJ Cc < 50 pF 

DUTY CYCLE - 1% 



_ J 



CURRENT SET 




10 M* - 



I r 

•ft " 



+ If 

OlOOE 

UNDER 
TEST 100% 
-Ir 




CURRENT 
PROBE 



2842 



Siliconix 



© IC MASTER 1983 




Sink or Source in order of (1) output current rating, (2) output voltage rating, (3) number of drivers 



1 TYPICAL DRIVING APPLICATIONS 


OUTPUTS* 
mA V # 


EXTENDED TEMP. 
SPRAGUE MILITARY HERM. 
PART NUMBER AVAILABLE 


1 DISPLAYS 

LED V. FLUOR. GAS DIS. INCAND. 


INDUCTIVE 
SOLENOID- MOTOR 


PRINTERS 
THERMAL ELECTRO. SENS. 


SINK DRIVERS 


— — ^ _ 

— — ^/' — 

— — ^ — 






5 130 5 
1 30 7 
130 8 


UHP-480 ^ 
UHP-482 ^ 






- 


20 -115 8 


SERIES UDN-7180A _ 


»^ — _ 1^ 






100 20 8 


UDN-2595A ^ 


^ — , — ^ 
^ — ■. _ ^ 


I-' 


l/* — 


250 70 4 
10O 4 


SERIES UHP-400 ^ 
SERIES UHP-500 i/' 


SCR ARRAY ^ 
SCR ARRAY ^ 


— 
— 




275 35 6t 
35 8t 


UTN-2886B — 
UTN-2888A - 


t^' . ' _■ _ . . . . : . 
»^ ■ _ ■„ ^^.'.■ 
^^ ■ ■ ■ — — 

„>x 'i/^ ■ 
PIN DIODE DRIVER 


" , : >^ 


^ ' — 


300 80 2 
80 2 
80 4 

80 4 
120 4 


SERIES UDN-3610M ^ 
SERIES UDN-5710M <^ 
SERIES UDN-5700A »^ 

UDN-5733A »^ 
UDN-5790/91A ^ 


\\\ \\\\\\ 

III III III 

III Ml Ml 


— 

\^ — 
. ^ 


^ — 

— 

>^ 


350 50 4t 
50 7 
50 8 

50 8t 
50 8t 
80 8t 

95 7 
95 8 
100 8t 


UCN-4401A 
SERIES ULN-2000A 
SERIES ULN-2800A 

UCN-4801A ^ 
UCN-4821A ^ 
UCN-4822A ^ 

SERIES ULN-2020A ^ 
SERIES ULN-2820A ^ 
UCN-4823A >^ 


STEPPER MOTOR DRIVER 


' — 




500 35 4 
50 7 
50 8 
50 8t 


UCN-4202/03A ~ 
SERIES ULN-2010A 
SERIES ULN-2810A 

UCN-4807/08A i/' 


FULL-BRIDGE 


— 1^ 




±1000 36 1 


UDN-2952B - 








1250 • 60 4 


UDN-2540B - 


II III 

M ill 




— ^ 


1 500 50 2 
50 4 
-50 4 

80 2 
80 4 


ULN-2061 M - 
SERIES ULN-2064B 
SERIES UDN-2840B - 

ULN-2062M — 
SERIES ULN-2065B 


HALF-BRIDGE 
FULL-BRIDGE 


■/:''yv'- ■ 




±2000 30 1 

■ ■ ■ 'se'' . \ 


UDN-29492 - 
UDN-2952W - 


SOURCE DRIVERS 






_ ^^ ^ _ 
_ ^ ^ _ 
— >^ — 






-15 -80 5 
-80 6 
—80 6 


UHP-490 . y 
UHP-491 >y 

UHr'-4yo ^ 


— _ — 

— ^ — — 

_' _ ^ _ 

— ■ — 

_ _ — 

■■»»",„„,.. . ■ — . 

— ~ </• ' ~ 

.''^ — ■ 






-25 ±40 8 

60 at 

60 lOt 

'IIS'" 6 
115 6 
115 8 

115 8 
140 8 
200 8 


SERIES UDN-6138A - 
UCN-4815A 
UCN-4810A 

SERIES UDN-6116A - 
UDN-6164A - 
SERIES UDN-6118A ™ 

UDN-6184A - 
UDN-6514A — 
UDN-6510A - 


»^ - _ - ^ 
_ ^ ^ 

l/- t/f — 

!>' — — 
i/' ~ 


— 
— 

>/" — 
^ 1^ 


I/' 


-350 20 8 
50 8 
-80 5 

80 8 
80 8 
80 8 


UDN-2585A <y 
UDN-2981/82A ^ 
UDN-2956/57A - 

SERIES UDN-2580A ^ 
SERIES UDN-2588A ^ 
UDN-2983/84A 


FULL-BRIDGE 






±1000 36 1 


UDN-2952B _ 


^ _ _ ^ 
»^ — — i/" 

_ _ _ 

1^ — — 
ix- — — 


>^ 1/* 
1^ ^ 


- 1^ 


-1500 50 2 
50 4 
-50 4 

80 2 
80 4 


ULN-2061 M — 
SERIES ULN-2074B V 
SERIES UDN-2840B - 

ULN-2062M — 
SERIES ULN-2075B 


HALF-BRIDGE 
FULL-BRIDGE 


— , 




±2000 30 1 
36 1 


UDN-2949Z — 
UDN-2952W - 



*Current is maximum tested condition, voltage is absolute maximum rating. 



i Latched Driver. 



For application engineering assistance, write or call Semi- 
conductor Division, Sprague Electric Company, 115 Norttieast 
Cutoff, Worcester, Mass. 01606. Tel. 617/853-5000. 



For the name of your nearest Sprague Semiconductor Distributor, 
write orcali Sprague Products Company, Northi Adams, Mass. 01247. 
Tel. 413/664-4481. 



© IC MASTER 1983 



2843 



Authorized IC Master 
International Distributors 



ARGENTINA, COLOMBIA, 
ECUADOR, VENEZUELA, 
MEXICO, PERU 

Intectra 

2629 Terminal Blvd. 
Mt. View, CA 94043 
Tel. (415) 967-8818 



AUSTRALIA 

A J Distributors Pty Ltd. 
P.O. Box 71 

Prospect, S. Australia 5082 
Tel. 269-1244 
Telex (790) 82635 



AUSTRIA 

LBG GmbH 
Tichtelgasse 10/2/12 
A-1120 Vienna, Austria 
Tel. (0222) 83 41 01 
Telex (847) 134106 



BELGIUM 

J. P. Le Maire 
Rampe Gaulouise la 
1020 Bruxelles, Belgium 
Tel. 02 478 4847 
Telex (846) 24610 



BRAZIL 

Filcres Importacao 
Rua Auroraigs 
CEP 01209 
Caixa Postal 18767 
Sao Paulo, Brazil 
Tel. (Oil) 223 7388 
Telex 113298 



CYPRUS 

MOR Electronics Ltd. 

P.O. Box 4155 

Ramat Gan 52141, Israel 



DENMARK 

Advanced Electronik 

55, Mariendalsvej 

DK2000, Copenhagen F, Denmark 

Tel. 01 194433 

Telex (855) 22431 



ENGLAND 

Paterson/Steadman & Partner 
4 Gold Street 

Saffron Walden, Essex CB10 lEP 
England 
Tel. 27067 
Telex 81653 



J. B. Tratsart Ltd. 
Dogmersfield Nr. Baskingstoke 
Hampshire RG27 8SU, England 
Tel. 02514 3334 
Telex (851) 8814136 



FRANCE 

Conseilet Promotion 
1 Rue Damiens 
92100 Boulogne, France 
Tel. 621-30-77 
Telex 250030F 

OFFILIB 

48 Rue Gay-Lussac 

75240 Paris, Cedex 05, France 

Tel. 329-2132 

Telex: None 



HOLLAND 

Manudax-Nederland B. V. 
54732G Heeswijk (N.B.) 
Meerstraat 7, Holland PB25 
Tel. 04139 2901 
Telex (844) 50175 



HONG KONG 

Conmos Products, Ltd. 
Haynein BIdg., 11th Floor 
1 Tai Yip Street 
Keun Tong, Kowloon 
Tel. 3-684572 
Telex 85448 



INDIA, MALAYSIA, 
SINGAPORE, THAILAND 

Radio & Craft Publications 
4794/23 Bharat Ram Road 
Daryanganj, New Delhi 2, India 
Tel. 277147 
Telex: None 



ISRAEL 

STG International Ltd. 
10 Huberman Street 
P.O. Box 1276 
61012 Tel-Aviv, Israel 
Tel. 248231 
Telex 342229 

ITALY 

Gruppo Editoriale Jackson 

Technoclub 

Direzione Redacione e 

Amministrazione 

Via Rosellini 12 

20124 Miiano, Italy 

Tel. 688-0951 



JAPAN 

Asahl Glass Company, Ltd. 
Electronic Components Group 
1-2 Marunouchi 2-chome 
Chiyoda-ku, Tokyo 100, Japan 
Tel. (03) 218-5813 
Telex TK4616 



JAPAN (Continued) 

Overseas Data Service Co., Ltd. 
Shugetsu Building, No. 12-7 
Kita-Aoyama 3-chome 
Minato-ku, Tokyo 107, Japan 
Tel. (03) 400-7090 
Telex (781 )J26487 

Tokyo International 
Communications, Inc. 
Miyajima Blvd. 

28 Yoyogi 1-chome, Shibuya-ku 
Tokyo 151, Japan 
Tel. 379-2561 
Telex: 33106 

NORWAY, FINLAND, SWEDEN 

Ingenioerforlaget A/S 
Kronprinsens Gate 17 
Boxs 2476 Soil! 
Oslo 2, Norway 
Tel. (02) 11-51-70 
Telex 72400Y 

SOUTH AFRICA 

Suntronika PTY Ltd. 
P.O. Box 46268 Orange Grove 
Johannesburg 2119, South Africa 
Tel. 725-1210 

SPAIN 

Sagitron 
Castello 25, 2, ° 
Madrid 1, Spain 
Tel. 402 6085 
Telex (831) 43819 

SWITZERLAND 

W. Stolz AG 
Taefernstrasse 15 
CH-5404 Baden-Daettwil 
Switzerland 
Tel. 056 840151 
Telex (845) 54070Z 

TAIWAN 

Alfred M. L. Pien 
IBS Publications Ltd. 
P.O. Box 55-879 
Taipei, Taiwan 

TURKEY 

EEMPA Elektronik 
Tersane Cad. Kuthan 38/408 
TR/Kara Koy, Istanbul 
Turkey 

Tel. (11)49-6249 
Telex 24429 

WEST GERMANY 

Astronic GmbH 
Winzererstrasse 47d 
8000 Munich 40 
West Germany 
Tel. (089) 309031 
Telex (841) 5216187 



"^^^ TELEDYNE 
SEMICONDUCTOR 



TSC450 
Dual Power 
MOSFET Driver 



General Description 

The TSC450 is a low cost dual driver with TTL compatible 
Inputs and high voltage outputs. Each device may be confi- 
gured in an Inverting or non-Inverting configuration. The 
active pullup, high voltage outputs will drive power f^OSFET 
gates. 

The TSC450 also serves as a logic level translator and dis- 
crete analog switch driver. 



Ordering Information 



Part No. 


Supply 
Voltage 


Temp. 
Range 


Package 


TSC450AIJE 


15 V 


-25° C to +85° C 


ISPinCerDIP 


TSC450ACPE 


15 V 


0°C to +70°C 


16 Pin Epoxy 


TSC450BIJE 


12 V 


-25° C to +85° C 


16 Pin CerDIP 


TSC450BCPE 


12 V 


0°C to +70°C 


16 Pin Epoxy 


TSC450AMJE 


15 V 


-55°C to +125°C 


16 Pin CerDIP 


TSC450BMJE 


12 V 


-55° C to +125°C 


16 Pin CerDIP 


TSC450 
AMJE/883 


15 V 


MIL-STD-883B 

Processing 
-55°C to +125° C 


16 Pin CerDIP 


TSC450 
BMJE/883 


12 V 


MIL-STD-883B 

Processing 
-55°C to +125°C 


16 Pin CerDIP 



Features 

• Dual Device for High Packing Density 

• User Selectable Inverting or Non-Inverting Operation 

• Single Supply Operation 

• TTL Compatible Inputs 

• High Output Sink Current 12 mA 

• High Output Source Current 6 mA 

• Fast Switching 125 ns 

• Available with Mil-STD-883B Processing 



Pin Configuration 



NC [T 


• 




OUTPUT 1 [T 




"is] NC 


GROUND [T 

INVERTING 
INPUT 1 ' — 

GROUND 
NON-INVERTING Tf 
INPUT 1 I — 
NC [T 

GROUND [±_ 


TSC450 


"h1 OUTPUT 2 
"ii] GROUND 

771 INVERTING 
— 1 INPUT 2 
TT] GROUND 

-rr\ NON-INVERTING 
INPUT 2 

T] NC. 






NC = No Connection 



o 

13 
T3 
C 

o 
o 



Functional Diagram (1/2 Circuit) 



''cc O- 



INVERTING O- 



6(10) Ijf 



7.5 kn > 1.8 kn 



-O OUTPUT, 



< 



-OGND 



©1982 

© 10 MASTER 1983 



^^^^ TELEDYNE SEMICONDUCTOR 



2845 



"^if^ TELEDYNE 
SEMICONDUCTOR 



TSC 700A 

Four Digit LED Display 
Decoder and Driver 
High Segment Drive Current 



o 

■D 

C 

o 
o 

E 

0) 
CO 

0) 

c 




h- 



General Description 

The TSC700A drives common anode LED displays with 28 
high current, open-drain N channel output transistors. Four 
seven segment LED displays may be driven. Drive current is 
guaranteed to be 1 1 mAminimum. Thisistwicethe minimum 
drive current available from comparable devices and will 
provide high LED luminance. High luminous intensity is an 
important factor when a dark contrasting background is 
unavailable or the LED is viewed at a distance. The TSC700A 
current capability makes it an ideal large character LED driver. 

Four data bit inputs and four digit select signals permit inter- 
facing to multiplexed BCD or binary output devices. The four 
bit data input is decoded into the seven segment alpha- 
numeric code known as "Code B". A to 9, — , E, H, L, P or 
"blank" reading may be displayed. 

An added feature includes a brightness control input that 
adjusts segment drive current. The control pin may also be 
used as a digital display enable. The TSC700A is an improved 
pin compatible and functional equivalent to the ICM7212A. 

Ordering Information 



Part No. 


Temp. 
Package Range 


LED 

Segment Output 
Current Code 


TSC700AMJL 


40 Pin 
CerDIP 


-55°Cto+125°C 


14 mA 


Code B 


TSC700AIJL 


40 Pin 
CerDIP 


-25° C to +85° C 


14 mA 


Code B 


TSC700 
AMJL/883 


40 Pin 
CerDIP 


-55°Cto+125°C 


14 mA 


Code B 


TSC700A/Y 


CHIP 


25°C 


14 mA 


Code B 



Features 

• High Drive Current for High Luminance LED Display 

• Guaranteed High LED Segment Current 11 mA Minimum 

• 28 Common Anode LED Drivers (4 Digits) 

• Code B Output Format ... to 9, — , E, H, L, P, "blank" 

• BCD/Binary Input to 7 Segment LED Code 

• Four Separate Digit Selects for Multiplexed Input 

• Digital or Analog Brightness Control 

• Digital Display Enable 

• Low Thermal Resistance Package 

• Military Temperature Range Devices Available 

• Pin Compatible With TSC7212A, ICM7212A 

Pin Configuration 



[Z 



[Z 
•IT 
■EI 



E2 I 10 

G2 nr 



C3 I 15 
□ 3 I 16 
E3 pf7" 
G3Qr 
F3 I 19 
A4 Ho 



40 I D1 
39 I C1 
38~| B1 ■ 

Hi]- 

36 ] GND 
35~| GND 
34~| D4 1 MSD 



TSC700A 



ID 



3 

ID 



If Brightness Control is not needed, connect BRT (pin 5) to Vs- 



Functional Diagram 



BRIGHTNESS 
CONTROL O- 



GND 
GND 



INPUT 1 o 



DIGIT 
SELECT 



SEGMENT OUTPUTS 



SEGMENT 
DRIVERS 



DATA 
LATCHES 



4 TO 7 LINE 
ROM DECODER 



DIGIT SELECT 

LOGIC AND 

ONE SHOT STROBE 



DIGIT 3 DIGIT 2 DIGIT 1 

I 1 r" — 1 I ^ — 



DIGIT LATCH 



COMMON 

ANODE 

LEDS 



/ 
/ 


o 


o 
o 


3 




' 7 ^ 


'7 ^ 




'' 7 



TO TSC700A 
OUTPUTS 



"Limits Pac(<age Power Dissipation 



©1982 



2846 



W TELEDYNE SEMICONDUCTOR 

® IC MASTER 1983 



TELEDYNE 
SEMICONDUCTOR 



TSC7109| 

12-Bit Plus Sign CIVIQS 
A/D Converter 
Microprocessor/UART Interface 



General Description 

The TSG7109 is a 12-bit plus sign CMOS low power A/D 
converter. The single CMOS IC contains all the necessary 
active devices to interface with microprocessors. 

In direct mode, Chip Select and High/Low Byte Enables con- 
trol parallel bus interface. In the handshake mode the 
TSC7109 will operate with industry standard UARTs in con- 
trolling serial data transmission, ideal for remote data logging. 
Control a nd mo nitoring of conversion timing is provided by 
the RUN/HOLD and STATUS outputs. The TSC7109 requires 
only the addition of 8 passive components plus a crystal to 
operate as a dual slope integrating A/D converter. The 
TSC7109 has features that make it an attractive per-channel 
alternative to analog multiplexing for many data acquisition 
applications. These features include typical input bias current 
of 1 pA, drift of less than 1 fi\//°C, input noise typically 15 /xV 
p-p, and auto-zero. True differential input and reference 
allows the measurement of bridge-type transducers such as 
load cells, strain gauges and temperature transducers. 

Ordering Information 



Part No. 


Temp. Range 


Package 


TSC7109MDL 


-55° C to +125°C 


40 Pin CerDIP 


TSC7109IDL 


-25°Cto +85° C 


40 Pin CerDIP 


TSC7109CPL 


0°Cto +70° C 


40 Pin Plastic 


TSC7109IJL 


0°Cto +70° C 


40 Pin CerDIP 



Features 

• 12-bit plus sign integrating analog-to-digital converter! 
with overrange indication 

• Sign magnitude coding format 

• True differential signal input and differential reference 
input 

• Low noise — typically 15 /iV p-p 

• High normal mode noise and line frequency rejection 

• 1 pA typical input current 

• No zero adjustment potentiometer needed 

• TTL compatible byte organized Tri-State outputs 

• UART handshake mode for simple serial data 
transmission 

• Direct bus connection to 8 or 16-bit bus 

• Dual mode on-chip oscillator 

- 3.58 MHz crystal provides 7.5 conversions per second 

for 60 Hz rejection 

- External RC network provides up to 30 conversions per 

second 

• Power dissipation typically less than 20 mW 



o 

13 
T3 
C 

o 
o 

E 

(D 
CO 

0) 

c 

■D 
_Q) 





Pin Configuration 



HIGH 
ORDER 
BYTE ■ 
OUTPUTS 



LOW 
ORDER 
BYTE 
OUTPUTS 



BYTE 
CONTROL 
INPUTS 
OR FLAG 
OUTPUTS 



1 GND 

2 STATUS 

3 POL 

4 OR 

5 B12 

6 811 

7 BIO 

8 B9 

9 B8 

10 B7 

11 B6 

12 B5 

13 B4 

14 B3 

15 B2 

16 B1 

17 TEST 

18 LBEN 

19 HBEN 

20 ceTload 



TOP VIEW 

-\u — 



V^ 40 
REF IN- 39 
REF CAP - 38 
REF CAP+ 37 
. REF IN+ 36 
IN HI 35 
IN LO 34 
COMMON 33 
3 INT 32 

AZ 31 
BUF 30 
REF OUT 29 
V" 28 
SEND 27 
RUN/HOLD 26 
BUF OSC OUT 25 
OSC SEL 24 
OSC OUT 23 
OSC IN 22 
MODE 21 



DIFFERENTIAL 
REFERENCE 



.01 pF 



-O INPUT HIGH 
-O INPUT LOW 



CiNTi 



iCaz 



.15 /iFl 



'.33 mF 



R|NT 



-vw- 



-0-5V 

2KS2 



-W* O V* 



•GND 



3.5795 MHz 
TV CRYSTAL 



Normal Mode Rejection Growth 

m 




INPUT FREQUENCY 



W TELEDYNE SEMICONDUCTOR 



© IC MASTER 1983 



2847 



SEMICONDUCTOR 



TSC7126 
Low Power 3 1/2 Digit CMOS 

A/D Converter 
— 50 Microamp Supply Current 



o 

13 
T3 
C 

o 
o 

E 

(D 
CO 


C 

■D 



0) 



General Information 

The TSC7126 is designed to operate from a 9 volt battery 
drawing 50 /lA typical, 100/iA maximum supply current. The 
single CMOS IC 3-1/2 digit A/D converter contains all the 
necessary active devices including seven segment decoders, 
liquid crystal display drivers, bac.kplane drive, clock and 
reference. 

With ah auto zero less than 1 /xV, zero drift less than 1 /iiV/° C, 
input bias current of 10 pA max and rollovererrorof less than 
one count, the TSC7126 brings exceptional value to the port- 
able battery powered field. 

In addition, the differential input and reference allows the 
measurement of load cells, strain gauges and other bridge 
type transducers. The TSC7126 can be used as a plug-in 
replacement for the TSC7106 changing only the values of the 
seven passive components. 



Ordering Information 



Part 

Number 


Temp. 
Range 


Package 


• 
• 


TSC7126CDL 
TSC7126CPL 


0-70° C 
0-70° C 


40 pin Ceramic DIP 
40 pin Plastic DIP 













SET REF = 100.0 mV > 240KJ! 





DISPLAY 
I 



) 



715^ TSC7126 

10 



J J I II I I I I I I I I T 



LIQUID CRYSTAL DISPLAY 
♦ 



Figure 1: Typical Circuit Configuration for 3 readings/ 
second 



Features 

• 8000 hours typical 9 volt battery life 

• Pin compatible with TSC71 26 

• Auto-zero, auto-polarity 

• True polarity at zero for precise null detection 

• True differential input and reference 

• 1 pA input current 

• Direct LCD Display drive — no external components 
required 

• Low noise — less than 15 /xV p-p 

• On-chip clock and reference 

• Power dissipation typically less than 1 mW 

• No other active circuits required 



Applications 

• Portable Instruments 

• Multimeters 

• Digital Voltmeters 
Digital Thermometers 
Digital Bridges (strain gauges, load cells) 
Ph meters 



RELATIVE BATTERY LIFE 

(Times 7106 Ballery Lifel 



•8000 HOURS ON A 9V ALKALINE BATTERY 



LED LED 

I TSC7107Tl TSC71W I 



LCD 



LCD 



LCD 



Figure 2: Battery Life Comparisons 



2848 



TELEDYNE SEMICONDUCTOR 

® IC MASTER 1983 



TSC7126 



Low Power 3 1/2 Digit CMOS! 

A/D Converter 

— 50 Microamp Supply Current! 



Absolute Maximum Ratings'" 

Supply Voltage (V+ to V-) 15V 

Analog Input Voltage (either input)l^l V+toV" 

Reference Input Voltage (either input) V"'"toV~ 

Clock Input Test to V+ 



Power Dissipation'^' 

Ceramic Package 1000 mW 

Plastic Package 800 mW 

Operating Temperature 0°Cto+70°C 

Storage Temperature — 65°C to +160°C 

Lead Temperature (Soldering, 60 sec) 300°C 



Electrical Characteristics' 



CHARACTFRI^TIf^ 

w r 1 r\ n r\ w 1 L« n 1 O l IwO 




ivii n 


TVD 


MAY 
MM A 


1 IMITQ 
uni 1 o 


Zero Input Reading 


V|N -o.ov 

run ocaie - ^lUU.u mv 


-UUU.U 


+UUU.U 


4-nnn n 
+UUU.U 


Digital Reading 


Ratiometric Reading 


V|N = Vref 


999 


999/1000 


1000 


Digital Reading 


Rollover Error (Difference in 
reading forepual positive and 
negative reading near Full Scale) 


-V|N = +V|N 200.0 mV 


-1 


±0.2 


+1 


Counts 


Linearity (Max. deviation from 
best straight line fit) 


hull bcale - 200 mV 
or Full Scale = 2.000 V 


-1 


±0.2 


+ 1 


Counts 


Common Mode Rejection Ratiol''! 


VcM - ±'V, V|N - ov. 
Full Scale = 200.0 mV 




50 




\//\/ 


Noise (Pk - Pk value not exceeded 95% 
of time) 


ViN = ov 

Full Scale = 200.0 mV 




15 




/^V 


Leakage Current @ Input 


V|N = 0V 




1 


10 


pA 


Zero Reading Drift 


V|N = 

, 0° < Ta < 70° C 




0.2 


1 


AiV/°C 


Scale Factor Temperature Coefficient 


V|N = 199.0 mV 
< Ta < 70°C 
(Ext. Ref. Oppm/°C) 




1 


5 


ppm/°C 


Supply Current (Does not 
include Common current) 


V|N = 

< Note 6i 




50 


100 




Analog Common Voltage (with respect 
to positive supply) 


250Kil between Common and 
• positive supply 


2.4 


2.8 


3.2 


V 


Temp. Coeff. of Analog Common 
(w'ith respect to positive supply) 


250KI1 between Common and 
positive supply 




80 




ppm/°C 


Pk-Pk Segment Drive Voltage 
(Note 5) 


VMoV-=9V 


4 


5 


6 


V 


Pk-Pk Backplane Drive Voltage 
(Note 5) 


VMoV-=9V 


4 


5 


6 


V 


Power Dissipation Capacitance 


vs. Clock Frequency 




40 




PF 



o 

13 

■o 

c 
o 
o 

"e 

<D 
CO 

CD 
C 
>s 

T3 
0) 





Notes: 

1. Input voltages may exceed the supply voltages provided the 
input current is limited to ±100 ;uA. 

2. Dissipation rating assumes device is mounted with all leads 
soldered to printed circuit board. 

3. Unless otherwise noted, specifications apply at Ta = 25°C, 
fciock = 16kHz and are tested in the circuit of Figure 1. 



4. Refer to "Differential Input" discussion on page 4. 

5. Backplane drive is in phase with segment drive for 'off seg- 
ment, 180° out of phase for 'on' segment. Frequency is 20 times 
conversion rate. Average DC component is less than 50 mV. 

6. During auto zero phase, current is 10-20 /lA higher. 48 kHz 
oscillator, Figure 2, increases current by 8 ^xA (typ. i 



'stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, 
and functional operation of the device at these or any other conditions above those indicated in the operational sections of the specif ications 
is not implied. Exposure to absolute maximum rating conditions for extended periods may effect device reliability. 



3-1/2 Digit ADC Family Comparison 





10 mV 


Low Power 


Single 


Internal 


Differential 


Differential 


Display "Hold" 


LCD 


LED 


Part No. 


Resolution 


(Is < 100 mA) 


Supply 


Reference 


input 


Reference 


Feature 


Drive 


Drive 


TSC7106 


X 




X 


X 


X 


X 




X 




TSC7126 


X 


X 


X 


X 


X 


X 




X 




TSC7116 






X 


X 


X 




X 


X 




TSC7107 


X 






X 


X 


X 






X 


TSC7117 


X 






X 


X 




X 




X 



WTELEDYNE SEMICONDUCTOR 



© IC IVI ASTER 1983 



2849 



TELEDYNE 
SEMICONDUCTOR 



TSC7135 
4 1/2 Digit Precision 
Analog-to-Digital Converter 



o 

•D 
C 

o 
o 

"e 

CO 


C 

■o 

_CD 




Generai Description 

The TSC7135 4 1/2 digit analog converter offers 50 ppm 
(1 part in 20,000) resolution with a maximum linearity errorof 
1 count. An auto-zero cycle reduces the zero error to below 
' 10 and zero drift to 0.5 ^tV/°C. Source impedance error 
sources are minimized by a 10 pA maximum input current. 
Rollover error is limited to ± 1 count. 

By combining the TSC7135 with a TSC7211A (LCD), 
TSC7212A (LED)orTSC700A(High LED Segment Current) 
driver a 4 1/2 digit display DVM or DPM can be constructed. 
Overrange and underrange signals support automatic range 
switching and special display blanking/flashing applications. 

Micro-processor base d measu rement system s are supported 
by the TSC7135 Busy, Strobe and Run/HOLD control signals. 
Remote data acquisition systems with data transfer via UART 
are also possible. The additional control pins and multiplexed 
BCD outputs make the TSC7135 the ideal converter for dis- 
play or ju-processor based measurement systems. 



Ordering Information 



Features 



Part No. 


Package 


Temperature 
Range 


TSC7135CJI 


28 Pin CerDIP 


0°C to +70° C 


TSC7135CPI 


28 Pin Plastic 


0°C to +70° C 



Typical 4 1/2 Digit DVM with LCD Display 



Low Rollover Error ±1 Count Maximum 

Guaranteed ± 1 Count Maximum Error 
Guaranteed Zero Reading for V Input 
True Polarity Indication at Zero for Null Detection- 
Multiplexed BCD Data Output 
TTL Compatible Outputs 
Differential Input 

Control Signals Permit Interface to UARTS and 
/x-Processors 

Auto-ranging Supported with Over and Underrange 
Signals 

Blinking Display Visually Indicates Overrange Condition 

Low Input Current 1 pA 

Low Zero Reading Drift 2i^y/°C 

Interface to TSC7211A, TSC7212A, and TSC700A 

Display Drivers 



Pin Configuration 









v-[J 




la] UNDERANGE 


REF In| 2 




Tj] OVERANGE 


ANALOG COMMON [T 




le] STROBE 


INT OUT [T" 




25] RUN/HOLD 


AZ IN [T 




24] DIGITAL GROUND 


BUFF OUT [T 


23] POLARITY 


REF CAP -[T 


TSC7135 


"22] CLOCK IN 


REF CAP*|T" 




"21] BUSY 


-INPUT [T" 




'20] (LSD)Dl 


♦ INPUT QF 




T]] 02 


V* pTT 




D3 


IMSDID5 [u 




"l7| D4 


■ ' (LSB)BlQT 




Te] (MSBIB8 , 


B2 Q7 




"iil B4 










UR 



REF IN 



ANALOG 
COMMON 



OR 
STROBE 
INT OUT RUN/HOLD 
AZ IN DIG. GND 



BUF OUT 
REF CAP- 
RE F CAP+ 
- INPUT 
+ INPUT 



POL 
CLOCK 
BUSY 
D1 



TSC7135 



4 1/2 DIGIT LCD DISPLAY 



hn h O O O O 

i-j u u u u 



1 16 15 14 12 5 3 4 

CD4054A 
7 8 13 11 10 9 2 6 



i 



120kHz = 3 READING/SEC 
< CLOCK IN 



i 



TSC7211A 



SEG 
OUT 



2,3,4 
6 - 26 
37 ■ 40 



OPTIONAL 
CAPACITOR 

OSC -)|-- +5V 

II 



2850 



TELEDYNE SEMICONDUCTOR 

© IC MASTER 1983 



TSC7135 



4 1/2 Digit Precision 
Analog-to-Digital Converter 



Absolute Maximum Ratings (Note i) 

Positive Supply Voltage +6 V 

Negative Supply voltage -9 V 

Analog Input Voltage (Pin 9 or 10) V"^ to V~ (Note 2) 

Reference Input Voltage (Pin 2) V"^ to V~ 

Clock Input Voltage V to V* 



Operating Temperature Range 0°C to +70° C 

Storage Temperature Range -65° C to +160° C 

Soldering Lead Temperature (10 Seconds) 300°C 

CerDIP(J) Package Power Dissipation 1 W 

Plastic(P) Package Power Dissipation 0.8 W 



Electrical Specifications: ta = 25° c, f clock = 120 kHz. v* = 5.0 v. v" = -5 v 











TEST 




TSC7135 






TYPE 


NO. 


SYMBOL 


PARAMETER 


CONDITIONS 


MIN 


TYP 


MAX 


UNIT 


A 


1 




Display Reading with 
Zero Volt Input 


Note 3,4 


-0.0000 


±0.0000 


+0.0000 


Display 
Reading 


N 
A 
L 


2 


TCz 


Zero Reading 
Temperature Coefficient 


ViN = V 
Note 5 


— 


0.5 


2 


mV/°C 



G 


3 


TCfs 


Full Scale 

Temperature Coefficient 


ViN = 2V 
Notes 5.6 


> — 


— 


5 


ppm/°C 




4 


NL 


Nonlinearity Error 


Note 7 




0.5 


1 


count 


8 
E 
C 


5 


DNL 


Differential 
Linearity Error 


Note 7 




0.01 




LSB 


t 
1 


6 




Display Reading In 
Ratiometric Operation 


ViN = Vref 
Note 3 


+0.9998 


+0.9999 


+1 .0000 


Display 
Reading 



N 


7 


±FSE 


± Full Scale Symmetry 
Error (Rollover Error) 


-ViN = +V|N 

Note 8 


— 


0.5 


1 


count 




8 


llN 


Input Leakage Current 


Note 4 




1 


10 


pA 










Peak-to-Peak 












9 


Vn 


Noise 


Value not exceed 
95% of time 


— 


15 


— 


MVp-p 




10 


Inl 


Input Low Current 


ViN = V 


— 


10 


100 




S 


11 


Inh 


Input High Current 


ViN = +5 V 


— 


0.08 


10 


mA 


1 E 


12 


Vol 


Output Low Voltage 


lOL = 1.6 mA 




0.20 


0.40 


V 


GC 
1 t 
T 1 


13 


VOH 


Output High Voltage 
(Bi, B2, B4, Bs, Di - D5) 


lOH - 1 mA 


2.4 


4.4 


5.0 


V 


AO 






Output High Voltage 












L N 


14 


VOH 


(Busy, Polarity, Overrange, 
Underrange, Strobe) 


lOH = 10 mA 


4.9 


4.99 


5.0 


V 




15 


fCLK 


Clock Frequency 







120 


200 


kHz 




16 


V* 


Positive Supply Voltage 




4 


5 


6 


V 


Op 


17 


v~ 


Negative Supply Voltage 




-3 


-5 


-8 


V 


W 


18 




Positive Supply Current 


fCLK = Hz 




1.0 


3.0 


mA 




19 


r 


Negative Supply Current 


fCLK = Hz 




0.7 


3.0 


mA 


Ry 


20 


Pd 


Power Dissipation 


fCLK = Hz 




8.5 


30 


mW 



Notes: 

1. Functional operation is not implied. 

2. Limit input current to under 100 /iA if input voltages exceed supply voltage. 

3. Full Scale Voltage = 2.000 V. 

4. ViN = 0.0000 V. 

5. 0''C.<Ta<+70''C. 



O 
ZJ 
■D 
C 

o 
o 

"e 


CO 

CD 

c 
>^ 

■D 




6. External Reference Temperature Coefficient less than 0.01 ppm/°C. 

7. -2 V < ViN < +2 V. 

8. IVinI = 1.959 V. 

9. Test Circuit show/n in Figure 1. 



TELEDYNE SEMICONDUCTOR 

© IC MASTER 1983 



2851 



"P^"^ TELEDYNE 
SEMICONDUCTOR 



TSC7211A (LCD) 
TSC7212A (LED) 

Four Digit CMOS 
Display Decoder and Driver 



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General Description 

The TSC7211A (LCD Decoder/Driver) andTSC7212A (LED 
Decoder/Driver) are direct drive, four digit, seven segment 
display decoder and drivers. 

The TSC7211A drives conventional LCD displays. An RC 
oscillator, divider chain, backplane driver, and 28 segment 
outputs are provided on a single CMOS chip. The segment 
drivers supply square waves of the same frequency as the 
backplane but in phase for an OFF segment and out of phase 
for an ON segment. The net d.c. voltage applied between 
driver segment and backplane is zero. 

The TSC7212A drives common anode LED displays with 28 
current controlled, low leakage, open drain, N-Channel out- 
put transistors. The brightness control input can be used as a 
digital display enable. A varying voltage at the control input 
will allow continuous display brightness control. 

The TSC7211A (LCD) and TSC7212A (LED) require only 
four data bit inputs and four digit select signals to interface 
with multiplexed BCD or binary output devices such as the 
ICM7217, ICM7226, ICL7103 and TSC7135. The four bit 
binary input code is decoded into the seven segment alpha- 
numeric code known as "Code B." 

The "Code B" output format results in a to 9, — , E, H, L, P 
or blank display. True BCD or binary inputs will be correctly 
decoded to the seven segment display format. 

The CMOS TSC7211A and TSC7212A are available in a 40 
pin epoxy dual-in-line package. All inputs are protected 
against static discharge. 



Ordering Information 



Part 
No. 


Driver 
Type 


Package 


Output 
Code 


Input 
Config. 


TSC7211AIPL 


LCD 


40 Pin 
Epoxy DIP 


Code B 


Multiplexed 4 
Bit Binary or 
BCD 


TSC7212AIPL 


LED 


40 Pin 
Epoxy DIP 


Code B 


Multiplexed 4 
Bit Binary or 
BCD 


TSC7211AA' 


LCD 


DICE 


Code B 


Multiplexed 4 
Bit Binary or 
BCD 


TSC7212A/Y 


LED 


DICE 


Code B 


Multiplexed 4 
Bit Binary or 
BCD 



TSC7211A Features (LCD Driver) 

• Four digit non-multiplexed 7 segment LCD display out- 
puts with backplane driver. 

• RC oscillator on chip generated backplane drive signal. 

• Eliminates d.c. bias which degrade LCD display life. 

• Backplane input/output pin permits synchronization of 
cascaded slave device to a master backplane signal. 

• Separate digit select inputs to accept multiplexed 
BCD/binary inputs. 

• Binary and BCD inputs decoded to code B (0 to 9, — , E, 
H, L, P, blank). 

• Pin compatible and functionally equivalent to ICM7211A 
andDF411. 



TSC7212A Features (LED Driver) 

• 28 current limited outputs drive common anode LEDs at 
greater than 5 mA per segment. 

• Brightness input allows potentiometer control of LED 
segment current. Pin also serves as digital display enable. 

• Same input configuration and output decoding as the 
TSC7211A. 

• Pin compatible and functionally equivalent to ICM7212A. 



Pin Configuration 



El I 2 
Gl I 3 
Fl 
BP 

A2 [X^ 
B2 [T^ 

C2 pi" 

D2[T^ 
E2 Qo[ 
G2 I 11 
F2 [jT 
A3 [IT 
83 QT 
C3 IjF 
D3 [iF 
E3 

G3 Qr 

F3 

A4 I 20 



40 I D1 

39~| CI 
IF] 81 
171 A1 

36] OSCILLATOR 

35] GND 

sTl 04 • 



TSC7211A (LCD) 



33JD3 

32 I D2 
TT] 01 
30 I B3 
29] B2 
28 I B1 
27] 80 
26 I F4 
25 I G4 
24] E4 
I3] D4 
22 I C4 
It] B4 



DIGIT 

SELECT 

INPUTS 



El I 2 
Gl [T[ 
Fl [1^ 
BRT I 5 
A2 I 6 

B2 |~r 

C2 I 8 
02 pF 
E2 Qo^ 

02 [22. 
n QF 
A3 I 13 
83 QT 
C3 I 15 

03 Q? 
E3 Q7 
G3piF 
F3 pi? 
A4r20 



7^" 



TSC7212A (LED) 



I GNO 
35 I GND 

33 I 



30 I 
28 I 

JLl 



DIGIT 

SELECT 

INPUTS 



© 1982 



2852 



^^N^ TELEDYNE SEMICONDUCTOR 

© IC IVI ASTER 1983 



^ii^ TELEDYNE 
SEMICONDUCTOR 



TSC800 

15 Bit PILis Sign Integrating 
Analog to Digital Converter 
- 8/16 Bit ju-Processor Interface 
- UART Interface 



General Description 

The TSC800 is a 15 bit plus sign integrating analog to digital 
converter. The TSC800 improves the conventional two phase 
dual slope conversion cycle by incorporating system zero 
and integrator output zero phases. , 

External zero nulling potentiometers are unneededand over- 
range recovery time is enhanced. Conversion speed may be 
set to reject the 50, 60 and 400 Hz line frequency interference 
signals common in industrial environments. 
Interface control signals support either single byte (16 bits) 
or two byte (8 bits) parallel data transfer to processor data 
busses. A "handshake" operating mode permits serial data 
transmission with a UART. 

The high Impedance differential inputs, 16bitdynamic range 
and bus interface ease make the TSC800 the ideal converter 
in precision process control, data logging and "intelligent" 
measurement applications. 



Ordering 


Information 










Temp. 


Max Linearity 


Part No. 


Package 


Range 


Error 


TSC800AMJL 


40 Pin CerDIP 


MIL 


2LSB 


TSCSOOAIJL 


40 Pin CerDIP 


IND 


2LSB 


TSC800ACPL 


40 Pin Plastic 


COM 


2LSB 


TSC800BMJL 


40 Pin CerDIP 


MIL 


4LSB 


TSC800BIJL 


40 Pin CerDIP 


IND 


4LSB 


TSC800BCPL 


40 Pin Plastic 


COM 


4LSB 


Typical fi 


-Processor Interface 





Features 

• 15 Bit Resolution Plus Sign Bit 

- 96 dB Dynamic Range I 

• Integrating Dual Slope Converter 

- Monotonic 

- Eliminate 50/60 Hz "Line" Interference 

- High Noise Immunity 

-Auto Zero Cycle Eliminates Trimming 

- Incorporates Integrator Zero Cycle for Fast Overload 

Recovery 

• Three State Data Bit/Sign Bit Outputs 

- 8 or 16 Bit Parallel Data Transfer to /i-Processor Bus 

• UART Control Signals 

- Serial Data Transmission 

- "Handshake" Data Transfer 

- Distributed Control Systems 

- Fiber Optic Transmission Systems 

• Easy Conversion Cycle Monitoring and Control 

- Data Valid Output Signal 

- Continuous or Convert on Command Operation 

• High Impedance Differential Input 

- 15 pA Maximum Input Current 

• Low Input Noise 
-15m Vp-p 

• On Chip Crystal Oscillator for 2.5 Conversions/ Sec. 

- fxtal = 2.4576 MHz 

- 100 mSEC Integration Period Rejects 50, 60, 400 Hz 

Interference Signals 

• Convenient ±5 V Supply Operation 

- Low Power Dissipation 20 mW 



o 

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c 
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CO 


c 
>» 
■D 




h- 



^INT '-INT 



ANALOG 
INPUT 



II Ib OkSi^ ^ ^ |j0.47| jF 



'R ^BUFF ^AZ 



DB15DB9 



HBEN 
LBEN 



PARALL/HAND OSC, OSCj 



OSC 
CONT 



VpEF = 3.2678 V Tj-y.'.,. 




74C30 I-(r/W VMA 



MC6800 
or 

MCS650X 



ADDRESS DATA CONTROL 
BUS BUS BUS 



TELEDYNE SEMICONDUCTOR 



® IC MASTER 1983 



2853 



^^^"^ TELEDYNE 
SEMICONDUCTOR 



TSC9403 
TSC9404 
Serial Input/16 Bit Parallel 
Output Peripheral Driver 
— High Voltage, High Current Outputs 



General Description 



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c 
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£ 


CO 


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0) 



The Teledyne Semiconductor TSC 9403 and TSC 9404 are 
serial input, 16 bit parallel output shift registers. High output 
power MOS switching transistors nnake the TSC 9403 and 
TSC 9404 ideal interface circuits between microprocessor 
I/O ports and high current/voltage peripherals. The MOS 
construction limits quiescent power dissipation to 20 mW. 

The TSC 9403 common source, open drain MOS outputs 
sustain 20V in the OFF state and maintain leakage currents 
under 100 ^iA. The TSC 9404 outputs are rated at 15V. The 16 
parallel outputs will continuously sink 60 mA. (Vsat<0.5Vi. 

Successive connection of serial data outputs to serial data 
inputs make longer length serial to parallel conversions pos- 
sible. Device cascading makes the TSC 9403 and TSC 9404 
ideal thermal printhead or high resolution LED bar graph 
drivers. ■ ' ■ 



Features 

• High Voltage Outputs: 20V (TSC 9403), 15V (TSC 9404) 

• High Output Current Sink Capability; 60 mA 

• Low Standby Power: 20 mW 

• High Speed Operation: 3.0 MHz 

• 16 Parallel Outputs 

• Cascading Possible for Longer Data Words 



Applications 

• Thermal, Printhead Driver 

• LED Bar Graph Driver 

• High Current, Microprocessor Serial Port Expander 

• Relay/Solenoid Driver 

• Tungsten Lamp Driver 
e SCR Gate Driver 



Ordering Information 







Temperature 


Output 


Order 


Part 


Package 


Range 


Voltage 


Part U 


TSC 9403 


24 Pin 


0°Cto 70° C 


20V 


TSC 9403CJ 




Epoxy DIP 








TSC 9403 


24 Pin 


-25° C to 85° C 


20V 


TSC 94031 L 




Cerdip 








TSC 9404 


24 Pin 


0°C to 70° C 


15V 


TSC 9404CJ 




Epoxy DIP 








TSC 9404 


24 Pin 


-25°Cto 85° C 


15V 


TSC 94041 L 




Cerdip 









Simplified Schematic 



Pin Configuration 



SERIAL DATA INPUT C 
LOGIC GROUND C 
Ql C 
Q2 C 
Q3 C 
Q4 C 

OUTPUT GROUND [I 
O5 C 

OUTPUT GROUND Q 



□ V* ■ 

□ CLOCK 

□ SERIAL DATA OUTPUT 

□ Q16 

□ Ql5 

□ Ql4 

□ Q13 

□ OUTPUT GROUND 

□ Q12 
D Q11 

□ Q10 

3 Q9 



V"^ LOGIC GROUND 

T24 T2 



SERIAL 
DATA O- 
INPUT 



OUTPUT 
GROUND 



I 



1 


2 


3 


4 


5 


6 


7 


8 


9 


10 


11 


12 


13 


14 


15 


16 



10 



11 



13 



14 



TSC 9403 
TSC 9404 



15 



16 



19 



20 



21 



22 SERIAL 
— O DATA 

OUTPUT 



17 OUTPUT 
^ GROUND 



'►--Vv\ O Vb 

Rload 



Ql O2 Q3 Q4 Q5 Qe Q? Qs Qg Q10 Q11 Q12 Q13 Qi4 Q15 Q16 
NOTE: LOGIC 1 SERIAL DATA INPUT BIT TURNS OUTPUT NMOS ON. 



2854 



TELEDYNE SEMICONDUCTOR 
® IC MASTER 1983 



Peripheral Drivers 

from Texas Instruments 



Dual, high current, peripheral drivers 
Types SN75407, SN75408 



Features 

• Very low quiescent power ... 100 mW typical 

• Very low input current ... 1 ixA typical 

• No output latch-up at 50 V 

• Characterized for use to 500 mA 

• Output clamp diodes 

• TTL OR MOS compatible-diode clamped inputs 

• Standard 5-V supply voltage 

Applications 

• Logic buffers 

• Hammer drivers 

• DC motor drivers 

• DC relay/solenoid drivers 

Logic Functions 

SN75407 — NAND 
SN75408 — OR 

Description 

The SN75407 and SN75408 series of dual peripheral 
drivers are designed for use in systems that require high 
current, high voltage, and fast switching outputs. These 
devices have diode-clamped inputs as well as high-current, 
high-voltage inductive-clamp diodes on the outputs. Use of 
PNP circuitry enables this series to feature very low 
quiescent power and minimal input current requirements. 

Absolute maximum ratings over operating free-air 
temperature range (unless otherwise noted) 



Supply voltage, Mqq (see Note 1) 


7 V 


Input voltage 


5.5 V 


Output current (see Note 2) 


500 mA 


Output clamp diode current 


500 mA 


Continuous total dissipation at (or below) 25°C free-air 
temperature (see Note 3) 




P (copper) 


1380 mW 


Operating free-air temperature 


0°C to 70°C 


Storage temperature range 


-65°C to 150°C 


Lead temperature 1/16 inch from case for 10 seconds: 


260°C 



Notes: 1. Voltage values are with respect to network ground terminal. 

2. Botti halves of this dual circuit may conduct rated current simultaneously; however, 
power dissipation averaged over a short time interval must fall within the continuous 
dissipation ratings. 

3. PG packagefor operation above 25°C free-air temperature, derate at 11.1 mW/°C 



SN75407 
DUAL-IN-LINE 
PACKAGE (TOP VIEW) 



SN75408 
DUAL-IN-LINE 
PACKAGE (TOP VIEW) 




S lA IV QNO 

positive logic: Y = A + S 



SN75407 
function table 
(each driver) 



INPUTS 


OUTPUT 
Y 


A S 


L L 


H 


L H 


H 


H L 


H 


H H 


L 



2100 
2000 
1900 
1800 
1700 
1600 
1500 
1400 
1300 
1200 
1100 
1000 
900 
800 
700 
600 
500 
400 
300 
200 
100 





positive logic: Y = AS 



SN75408 
function table 
(each driver) 



INPUTS 


OUTPUT 
Y 


A S 


L L 


L 


L H 


H 


H L 


H 


H H 


H 



25 30 35 40 45 50 55 60 
Ta-FREE-AIR TEMPERATURE-°C 




Texas Instruments 

INCORPORATED 
POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



© IC MASTER 1983 2855 



Peripheral Drivers 

from Texas Instruments 



Quadruple, hi-current, peripheral drivers 
Types SN75436, SN75437A, SN75438 



Features 

•Saturating outputs with low on-resistance 

• Very low standby power . . . 26mW max 

• High voltage outputs ... 70 V min 

• High impedance MOS or TTL compatible inputs 

• Standard 5 V supply voltage 

• No output glitch during power up or power down 

• Output clamp diodes for transient suppression 

• 2W power pkg ... 60°C W RojA 

10°CWRojc 

Applications 

• Relay drivers 

• DC and stepping motor drivers 

• Solenoid drivers 

• Land drivers 

• Hammer drivers 

• Memory drivers 

Logic Functions 

• All 3 devices — NAND 

Description 

The SN75436, SN75437A, and SN75438 quad peripheral 
drivers are designed for use in systems requiring high 
current, high voltage, and high load power. Each features 
four inverting open collector drivers with a common enable 
input which, when taken low, disables all four outputs. 

Absolute maximum ratings over free-air 
temperature range (unless otherwise noted) 



Supply voltage, Vcc 


7 V 


Input voltage 


5.5 V 


Output voltage 


70 V 


Output current 


1.0 A 


Output clamp diode current 


1.0 A 


Continuous total dissipation, T/\ s 25°C (free-air) Note 1 


2075 mW 


Operating free-air temperature 


0°C to 70°C 



Note 1: For operating above 25 C ambienl temperature derate at 16.6 mW C 



Recommended operating conditions 





MIN 


NOM 


MAX 


Supply voltage, Vqc 


4.75 V 


5.0 V 


5.25 V 


Output current SN75436, SN75437 
SN75438 






500 mA 
1.0 A 


Output voltage SN75436 

SN75437, SN75438 






50 V 
35 V 



Selection guide 



FEATURE 


75436 


75437A 


75438 


Output current 


500 mA 


500 mA 


1000 mA 


IVlax VSAT 


0.5 V 


0.5 V 


1.0 v 


Ivlax switctiing volt. 


50 V 


35 V 


35 V 



NE 

DUAL-IN-LINE 
PACKAGE (TOP-VIEW) 



Logic diagram 




vcco 




4--^ rT |LT * --.^ Ebr 

1A 2A 3A 4A 



Equivalent of each input 




Function table 
(each nand driver) 



INPUTS 


OUTPUT 
Y 


A G 


L X 


H 


X L 


H 


H H 


L 




Texas Instruments 

INCORPORATED 
POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



2856 



® IC MASTER 1983 



Peripheral Drivers 

from Texas Instruments 



2 Amp Half-H motor driver 
Types SN75603, SN75604 



Features 

• ±2 Amp Continuous Output Current 

• ±5 Amp Peak Output Current 

• Vcc Operating Range from 8V to 40V 

• Sink-Source Interlock Protection 

• Transient Suppression Diodes 

• Thermal Shutdown 

• High Impedance 

• TTL or MOS Compatible Inputs 

• 5 Lead TO220 Power Package 



Description 

The SN75603 and SN75604 are designed for H-drive 
motor applications. A full-H driver can be implemented 
using 1-75603 and 1-75604 without adding any additional 
gates or inverters, thereby achieving easy interface 
between a microprocessor or stepper motor controller. 

The "A" input determines direction of current flow 
through the motor coil by activating either the sink or 
source output. The "E" input is an enable, which when 
taken low, provides a high impedance output of the 
driver and shuts off current to the motor. This also 
provides for chopper mode operation and pulse width 
modulation to achieve lower power dissipation and 
speed control. 

These drivers offer desirable protection features 
such as thermal shutdown if the junction temperature 
exceeds 150°C, sink-source interlock to prevent the 
sink and source outputs from conducting 
simultaneously, and transient suppression diodes. 

FUNCTION DIAGRAM 



SN75603, 75604 KG 




Truth Tables 



75604 



75603 



(0 
■*-» 

c 
E 

(0 

c 

(0 
CO 
X 




A 


E 


Y 


1 


X 





Z 


off 





1 . 


1 




1 


1 








A 


E 


Y 


1 


X 





Z 


off 





- 1 







1 


1 


1 





(DIRECTION) < 




{> 





■O Y 





Texas Instruments 

INCORPORATED 

POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



© iC MASTER 1983 



2857 



Line Circuits for 

EI A Industry Standards 

from Tfexas Instruments 



SN75176, SN75177, SN75178 
differential bus transceivers/repeaters 



Features: 

Meets EIA standard RS422A 
Designed for multipoint bus transmission 
-7V to + 12V bus common mode range 
Single +5V supply 

Low power requirements . . . 35 mA max. 

High Impedance to bus with driver in 3-state or with power 
off over entire common mode range 

Driver thermal shutdown protection 

Positive and negative current limiting on driver outputs 

60mA driver output capability 

± 200m V receiver sensitivity 

12kn minimum receiver input impedance 

50mV typical receiver hysteresis 



Description 

The SN75176, SN75177, and SN75178 transceivers are 
designed to meet EIA standard RS422 with extended 
positive and negative common mode range for bus , 
appli^cations. These transceivers are capable of transmitting 
and receiving data at rates up to 4M bits and over distances 
up to 4000 ft. If distances greater than 4000 ft. are required, 
the SN75177 and SN75178 repeaters can be used as a pair 
for bi-directional communication, or individually for one way 
communication. 

With the SN75176 transceiver, the RE and DE inputs can 
be connected together to use as a direction control input, or 
used Individually for independent control of the driver and 
receiver. 

The SN75177 and SN75178 enable inputs are 
complementary such that when paired and connected 
together, this pin serves as a direction control for 
bi-directional communication. 



Absoiute maximum ratings 

Supply voltage, Vcc 7 V 

Enable input voltage 5.5 V 

Common mode bus voltage +15 V/-10 V 

Differential bus- voltage ±25 V 

Continuous total power dissipation 

at25°C 830 mW 



Recommended operating conditions 





MIN 


MAX 


Supply voltage 


4,75 V 


5.25 V 


Common mode bus voltage 


-7 V 


+ 12 V 


Driver output current 


± 60 mA 


Receiver high-level output current 


- 400 |jlA 


Receiver low-level output current 


+ 16 mA 


Operating free air temperature 


0°C 


+ 70°C 



SN75176 
JG OR P PACKAGE 
(TOP VIEW) 




SN75177 
JG OR P PACKAGE 
(TOP VIEW) 




SN75178 
JG OR P PACKAGE 
(TOP VIEW) 



BUS IN BUS OUT 





Texas Instruments 

I NCORPOR ATED 
POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



2858 



© IC MASTER 1983 



Display Drivers 

from Ibxas Instruments 



0UT8 
OUT; 
0UT6 



CLOCK 4 



VSS 
VOD 



STROBE I 7 
OUT5 
OUT4 



18 OUTg 



17| OUT10 

I SERIAL 
DATA OUT 



15j Vbb 
14] 

13I BLANKING 



SERIAL 
DATA IN 



12J OUT1 
U] OUT2 

W] 0UT3 



N Dual-ln-Line Package Pinout 



TL4810A BIDFET 
10-Bit Serial-Input Latched Driver with Active Pull-Down 

Features 

• High-voltage outputs 60V 

• CMOS compatible inputs 

• Low power CMOS logic and latches 

• Active totem-pole outputs 

• Wide supply voltage range 

• Directly interchangeable with UCN4810A 

Description 

The TL4810A is a monolithic BIDFET inte- 
grated circuit designed to drive a segmented, 
dot character, or full dot matrix vacuum fluo- 
rescent display (VFD). 

The primary feature of the TL4810A 10-bit 
VFD driver is its unique output structure. The 
TL4810A utilizes an active totem-pole output 
to improve the sink current capability without 
sacrificing the resulting power consumption as 
conventionally experienced in a passive pull- 
down structure. The totem-pole output de- 
creases the inter-digit-blanking time required 
and the overall device power consumption. 

Unlike most VFD drivers which are limited 
to an 85% duty cycle at 50°C the TL4810A will 
sustain a 25 mA per output load at 100% duty 
cycle over its entire operating temperature 
range of 70°C. 

Designed to control 10 VFD inputs, the 
TL4810A contains a positive edge triggered 10- 
bit serial shift register with a serial data out- 
put for serial transmission and registration of 
the display information. A 10-bit D-type latch 
accepts parallel data from the serial shift reg- 
ister when the strobe input is high. The data 
stored in the latch circuitry when the strobe 
input is taken low remains un-altered regard- 
less of subsequent changes in the data present 
in the serial shift register. The latched infor- 
mation is then transferred to the outputs 
through the gated output buffers when the 



blanking input is low. A logic high on the 
blanking input causes all outputs to go low. All 
outputs are capable of sourcing 40mA each 
at a supply voltage of 60V, providing the max- 
imum allowable package power limitation is 
not exceeded. All device inputs are dibde-clam- 
ped and compatible with standard MOS, 
CMOS and DMOS logic. The addition of a pull- 
up resistor to VdD is required when driven by 
standard TTL logic. 



VDD 



Vbb 



CLOCK 

SERIAL o r>- 

DATA 
IN 



V 




01 


01 








D2 


02 








D3 


03 


10-BIT 




04 


04 


SERIAL 




05 


05 


SHIFT 




06 


06 


REGISTER 




07 


07 








08 


08 








D9 


09 








010 


10 



STROBE o P>- 

BLANKING o — P»— 




TL4810 Functional Block Diagram 



vss 



SERIAL 
J DATA 
OUT 



FUNCTIONAL TABLE 


Function 


Control Inputs* 


Shift Register 

Contents 
R1 Thru RIO 


Latches 
Contents 
L1 Thru L10 


Outputs 


Clock 


Strobe 


Blanking 


Serial 


0-1 Thru 010 


Load 


J" 






Load and Shift 


Determined by 
Strobe & R1/R10 


R10 


Determined By 
Blanking & L1/L10 


1 


No Change 


Latch 


X 
X 


High 




As Determined 
Above 


L1=R1;L2 = R2;ETC 


R10 


Determined By 
Blanking & L1/L10 


Low 


Stored Data 


Blanking 






High 


As Determined 
Above 


As Determined 
Above 


R10 


All Low 


Low 


10 = L1;02 = L2; 
ETC 



*AII control inputs are independent of each other 




Texas Instruments 

INCORPORATED 

POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



© IC MASTER 1983 



2859 



Display Drivers 

from Texas Instruments 



SN75512A 

12-Bit Serial-Input Display Driver with Latches 



Features 

• Each device drives 12 lines 

• 60V output voltage swing capability 

• 25mA output source current capability 

• High-speed serially-shifted data input 

• TTL compatible inputs 

• Latches on all driver outputs. 

Description 

The SN75512A is a monolithic BIDFET 
integrated circuit (bipolar, double diffused, 
n-channel MOS and p-channel MOS transistors 
on same chip) designed to drive a dot matrix 
or segmented vacuum fluorescent display. 

All device inputs are diode-clamped p-n-p 
inputs and will assume a high logic level when 
open-circuited. The nominal input threshold is 
1.5 V. Outputs are totem-pole structures 
formed by n-p-n emitter follower and double- 
diffused MOS (DMOS) transistors. 

Input data is stored in the 12-bit serial shift 
register on the positive transition of the clock 
input. Parallel data is presented to the output 
buffers through a 12-bit-type latch. Data at the 
respective output of the serial shift register is 
transferred through the 12-bit latch while the 
latch input is high. Data present at the latches, 
inputs during the negative transition of the 
latch is stored regardless of subsequent 
changes providing the latch input remains 
low. The active low strobe input enables all 



LATCH 
ENABLE ' 



STROBE- 



CLOCK 



DATA 
IN 



12 BIT 
STATIC 
SHIFT 
REGISTER 



12 

LATCHES 



Q2 



8 OUTPUTS 
(03 THRU Q10) 
NOT SHOWN 



012 



-SERIAL 




1 14 1 06 



N Dual-ln-Line Package Pinout 

output gates. 

Each output is capable of sourcing 25mA 
at a supply voltage of 60V providing the 
maximum package power dissipation is not 
exceeded. Based on the maximum allowable 
voltage drop across the output at 25mA source 
current, the total package capabilities are as 
shown. (Table). All inputs of the SN75512A 
are TTL compatible. A serial data out is also 
available for cascading additional drivers. 

The SN75512A is characterized for operation 
from 0°C to 70°C. 



SN75512A OPERATIONAL DUTY CYCLE (%) 



NUMBER OF 
OUTPUTS ON 
Iq = 25mA 



MAX RECOMMENDED DUTY CYCLE 
AT AMBIENT TEMPERATURE OF 

25°C 40°C 50°C 60°C 70°C 



77 
84 
92 
100 



100 



75 
82 
91 
100 



100 



62 
67 
74 
82 
93 
100 



100 



55 
60 
66 
73 
83 
94 
100 
I 

100 



52 
58 
61 
73 
82 
96 
100 
100 



SN75512A Functional Block Diagram 




Texas Instruments 

INCORPORATED 
POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



2860 



© IC MASTER 1983 



Display Drivers 

from Texas Instruments 



SN75513A 

12-Bit Serial-Input Display Driver with Reset 



Features 

» Each device drives 12 lines 

• GOV output voltage swing capability 

o 25mA output source current capability 

• High-speed serially-shifted data input 
o TTL compatible inputs 

• Reset input 

Descriptiosi 

The SN75513A is a monolithic BIDFET inte- 
grated circuit (bipolar, double-diffused, n-chan- 
nel MOS, and P-channel MOS transistors on 
the same chip), designed to drive a dot matrix 
or segmented vacuum fluorescent display. 

All device inputs are diode-clamped p-n-p 
inputs and will assume a high logic level when 
open-circuited. The nominal input threshold is 
1.5V. Outputs are totem-pole structures 
formed by n-p-n emitter follower and diffused 
MOS (DMOS) transistors. 

Input data is shifted into a 12-bit serial shift 
register on the positive transition of the clock. 
Data appearing at the corresponding outputs 
of the shift register is presented directly to the 
output gates and is reflected at the output, 
when the strobe input is low. Data in the shift 
register can be cleared with the reset input. A 
logic on the reset input clears the shift regis- 
ter contents to a logic 0. All outputs are capa- 
ble of supplying 25mA of source current at a 
supply voltage of GOV providing the absolute 
maximum package power Hmitation is not ex- 
ceeded. Table I reflects the derating resulting 
from this consideration. All inputs are TTL 
compatible and assume a logic high if left 
open. A serial data output allows cascading of 
several devices without additional circuitry. 

The SN75513A is characterized for operation 
from 0°C to 70°C. 



SN75513A OPERATIONAL DUTY CYCLE (%) 



NUMBER OF 
OUTPUTS ON 
Iq = 25mA 



12 
11 
10 
9 
8 
7 
6 
5 
1 



MAX RECOMMENDED DUTY CYCLE 

AT AMBIENT TEMPERATURE OF 
25°C 40''C 



77 
84 
92 
100 



68 
75 
82 
91 
100 



100 100 



50°C 


60°C 


70°C 


62 


55 


48 


67 


60 


52 


74 


66 


58 


82 


73 


61 


93 


83 


73 


100 


94 


82 




ICO 


96 




1 


100 


100 


100 


100 



Q11 




9 


! 20 1 


Q10 


Q12 








09 


STROBE 








08 


SERIAL OUT 






[tt] 


07 


DATA IN 






a 


VCC2 


Vcci 
CLOCK 


1 




il 

I14J 


GND 
06 


RESET 








05 


01 








04 


02 


4 




r 


03 



N Dual-ln-Line Package Pinout 




SN75513A Functional Block Diagram 




Texas Instruments 

INCORPORATED 
POST OFFICE BOX 2 2 56 1 2 • DALLAS, TEXAS 75265 



® IC MASTER 1983 



2861 



Display Drivers 

from Ibxas Instruments 



Vacuum fluorescent display driver 
Type SN75518 



Features 

• Each Device Drives 32 Lines 

• 60V Output Voltage Swing Capability 

• 25 mA Output Source Current Capability 

• High-Speed Serially-Shifted Data Input 

• Totem Pole Outputs 

• Latches on All Driver Outputs 

Description 

The SN75518 is a monolithic BIDFET integrated circuit 
(bipolar, double-diffused, n-channel MOS and p-channel 
MOS transistors on same chip!) designed to drive a 
dot matrix or segmented vacuum fluorescent display. 

The device consists of a 32-bit shift register, 32 
latches and 32 output AND gates. Serial data is entered 
into the shift register on the low-to-high transition of the 
clock. When high, the latch enable input transfers the 
shift register contents to the outputs of the 32 latches. 
The active-low strobe input enables all Q outputs. 
Serial data output from the shift register may be used 
to cascade shift registers. This output is not affected 
by the latch enable or strobe inputs. 

The SN75518 is characterized for operation from 
0°C to 70°C. 



N DUAL-IN-LINE PACKAGE (Top view) 



Vcc, 

SERIAL DATA OUT 
OUTPUT 032 
OUTPUT 031 
0UTPU8 O30 
OUTPUT 029 
OUTPUT 028 
OUTPUT 027 
OUTPUT 026 
OUTPUT 025 
OUTPUT 024 
OUTPUT 023 
OUTPUT 022 
OUTPUT 021 
OUTPUT Q20 
OUTPUT 019 
OUTPUT 018 
OUTPUT 017 
STROBE 
GND 




Vcc, 

DATA IN 
OUTPUT 01 
OUTPUT 02 
OUTPUT 03 
OUTPUT 04 
OUTPUT 05 
OUTPUT 06 
OUTPUT 07 
OUTPUT 08 
OUTPUT 09 
OUTPUT Q10 
OUTPUT Oil 
OUTPUT 012 
OUTPUT 013 
OUTPUT 014 
OUTPUT QlS 
OUTPUT 016 
LATCH ENABLE 
CLOCK 



FUNCTIONAL BLOCK DIAGRAM 



■-[>— f 



32-BIT 
STATIC 
SHIFT 
REGISTER 



o 
to 



OUTPUT 031 



OUTPUT 032 




Texas Instruments 



' INCORPORATED 

POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 

2862 © IC MASTER 1983 



Display Drivers 

from Texas Instruments 



Gas discharge display driver 
TypeSN75581 



Features 

• Each Device Drives 7 Lines 

• 150V Output Voltage Swing Capability 

• TTL Compatible Inputs 

• Latches on All Driver Outputs 

• High Speed Serially-Shifted Data Input 

• Output Enable/Disable Function 

• Serial Data Output for Cascade Operation 

• Shift Register Has Synchronous Clear Function 

Description 

The SN75581 is a monolithic BIDFET integrated circuit 
designed to drive a dot matrix or segmented display. 
The output characteristics of this driver make it 
compatible to several display types including VF and 
DC Plasma displays. 

All device inputs are diode clamped PNP inputs and 
will assume a high logic level when open circuited. 
The nominal input threshold is 1.5 volts. Outputs are 
open source DMOS transistors for excellent high 
voltage characteristics and reliability. 

The device consists of a 7-bit shift register, 7 latches 
and 7 output gates. Serial data is entered into the 
shift register on the low-to-high transition of the clock. 
When high, the latch enable transfers the shift register 
contents to the latch outputs. When latch enable is 
pulled low from a high state, the shift register is 
cleared. The output enable input enables all outputs. 
Serial data output is not affected by the output enable 
function. 

The SN 75581 is characterized for operation over the 
industrial temperature range of 0°C to 70°C. 



N, J DUAL-IN-LINE PACKAGE (Top view) 



Vcc + 
N/C 



OUTPUT 
ENABLE 



CLOCK 4 

LATCH 5 
ENABLE 



DATA 
IN 



Vcc- 



GNO 



6 



u 



16 



15 



OUTPUT Q1 
OUTPUT 02 



14 OUTPUT 03 



13 OUTPUT 04 



12 



11 



10 



OUTPUT 05 

OUTPUT 06 
OUTPUT 07 

SERIAL DATA 



J^^Vi Texas Instruments 



INCORPORATED 
POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



© IC MASTER 1983 



2863 



Display Drivers 

from Texas Instruments 



High-voltage 7-segment latch/ 
decoder/cathode driver 
Type SN75584 



Features 

• Output Current Adjustable From 0.1 mA to 4 mA 

• DMOS Outputs for High Breakdown Voltage 
Segment Outputs — 100V Min 

Decimal Point Output— 100V Min 

• Input Data Latches 

• Blanking Input Provided 

• P-N-P Inputs for Minimal Input Loading 

• Low Power Requirements 

• Thermal Protection Circuitry 

o Supply Voltage Variable Over Wide Range — 
4.75V to 15V 

• Decimal Point Output Provided 

• Suitable for Multiplex Operation 

Description 

The SN75584A is designed to decode four lines of BCD 
data and drive a gas-filled seven-segment display tube 
such as Beckman and Panaplex lit displays. Latches 
are provided to store the BCD and decimal point data 
while the enable input is at a low-level voltage. 

The design employs a read-only memory to provide 
output decoding for the BCD digits to 9. For input 
data greater than BCD 9, the segment outputs are 
blanked. Each sink output is regulated to ensure a 
constant brightness of the display even with a 
fluctuating supply voltage. The on-state output current 
is essentially constant over the output voltage range of 
4 volts to 100 volts. Each current sink is ratioed to the 
"b" segment output current as required for even 
illumination of all segments. 



t Trademark or Burroughs Corporation. 



N DUAL-IN-LINE PACKAGE (Top view) 




FUNCTIONAL BLOCK DIAGRAM 



BLANKING 
INPUT 




DECIMAL 
POINT 
INPUT 



CURRENT (4) 

PROGRAMMING 

INPUT 



/ OUTPUTS 



(17) DECIMAL 

POINT 

OUTPUT 



w-,1 CONSTANT-CURRENT 
Tsli REGULATOR (ADJUSTED 
^ BY CHANGING Rf) 



LOGIC SYMBOLt 



A 12L 

B 



(3) 



EN 
CIO 



10D 



la g IQ ADJUST] 





(13) 




(12) 


— (11) 




(10) 


(16) 




(15) 




(17) 



t This symbol is in accordance witii IEEE Std 91/ANSI Y32.14 and current 
discussions in lEC and IEEE. 




Texas Instrument^ 

INCORPORATED 

POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



2864 



© IC MASTER 1983 



Data Acquisition Circuits 



8-Bit analog-to-digital converter with 
15-analog and 12-digital input channels 

Type TL530N 



Features 

• 8 Bit Resolution 

o Total Unadjusted Error: ±V2 LSB IVlax for TL530 
(±1 LSB MaxforTL531) 

• Up to 15 Analog Inputs 

• Up to 12 Digital Inputs, Including 3 I/O Pins 

• Three-state, Bidirectional Data Bus 

• Access & Conversion in 300 /^Sec @ 85°C 

• 16-Channel On-Chip Analog Multiplexer 

• Ratiometric Conversion 

• Single 5-Volt Supply 

• Low Power Consumption of 15 mW, Typical 

• Three 16-Bit On-Chip Data Registers 
» Polled or Interrupt Driven 

• Designed to be a Pin-Compatible, Functional 
Replacement for MC144444 

• Pin-For-Pin replacement for 74C924 
Description 

The TL530 is a monolithic CMOS device with 
16-channel analog multiplexer, 8-bit ratiometric 
analog-to-digital (A/D) converter, a register to store 
digital data from 9 inputs and 3 input/outputs, 
bus-compatible 8-pin input/output data ports and 
microprocessor-compatible control logic. Three on-chip 
data registers store control, conversion-results, and 
digital data that can be accessed via the IC's data port 
in two 8-bit bytes (most-significant-byte first). The A/D 
conversion is accomplished using successive- 
approximation technique and employing a high- 
impedance chopper-stabilized comparator, a 256R 
end-compensated voltage divider with analog switch 
tree, and a successive-approximation register (SAR). 
These methods eliminate the possibility of missing 
codes, nonmonotonicity, and a need for zero or 
full-scale adjustment. Positive and negative reference 
inputs make possible ratiometric conversion and 
reference isolation from supply noise. 



N DUAL-IN-LINE PACKAGE (Top view) 



Vref 

I 

GROUND (GND) 
DIGITAL I/O DO 
DIGITAL 1/0 D1 
DIGITAL 1/0 D2 
(Digital) INPUT D3 
(Digital) INPUT D4 



(Digital) INPUT D5 
-1 

(IVISB) 2 

-2 



(LSB) 2 
READ/WRITE (R/W) 
CLOCK 

REGISTER SELECT (RSL) 
CHIP SELECT (CS) 



-E 
E 
E 
E 
E 
E 
E 
E 
E 
E 

-sE 

E 

"'E 
-E 
E 
E 
E 

I 20 



39 j 
38 I 

36 I 
35 j 

3 

32 I IN 

3 

30 [ 
29 I 
28 I 

3 

26 j 

3 
3 

23 I 
22 I 

3 



VREf + 

SUPPLY (Vcc) 



INTERRUPT REQUEST (IRQ) 
MULTIPLEXER OUTPUT (MO) 
INPUT AO (Analog) 
INPUT A2 (Analog) 
INPUT A3 (Analog) 
INPUT A4 (Analog) 
PUT AS (Analog) 
INPUT A6 (Analog) 
INPUT A7 (Analog) 
INPUT A8 (Analog) 
INPUT A9 (Analog) 
INPUT A10/D10 (Analog/Digita 
INPUT A11/D11 (Analog/Digita 
INPUT A12/D12 (Analog/Digita 
INPUT A13/D13 (Analog/Digita 
INPUT A14/D14 (Analog/Digita 
INPUT A15/D1S (Analog/Digita 
RESET 



(0 

•4— • 

c 
E 

13 
i_ 
^— > 
CO 

_c 
CO 

X 

(D 




Texas Instruments 

INCORPORATED 

POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 



© IC MASTER 1983 2865 



<0 

c 

CO 

(a 

X 




Data Acquisition Circuits 

from Ibcas Instruments 



8-Bit analog-to-digital converter with 
15-analog and 12-digital input channels 

Type TL531N 



Features 

• 8 Bit Resolution 

• Total Unadjusted Error: ±1 LSB Max for TL531 
(±1/2 LSB Max for TL530) 

• Up to 15 Analog Inputs 

• Up to 12 Digital Inputs, Including 3 I/O Pins 

• Three-state, Bidirectional Data Bus 

• Access & Conversion in 300 /iSec @ 85°C 

• 16-Channel On-Chip Analog Multiplexer 

• Ratiometric Conversion 

• Single 5-Volt Supply 

• Low Power Consumption of 15 mW, Typical 

• Three 16-Bit On-Chip Data Registers 

• Polled or Interrupt Driven 

• Designed to be a Pin-Compatible Functional 
Replacement for 74C924 & MCI 44444 

Description 

The TL531 is a monolithic CMOS device with 
16-channel analog multiplexer, 8-bit ratiometric 
analog-to-digital (A/D) converter, a register to store 
digital data from 9 inputs and 3 input/outputs, 
bus-compatible 8-pin input/output data ports and 
microprocessor-compatible control logic. Three on-chip 
data registers store control, conversion-results, and 
digital data that Can be accessed via the IC's data port 
in two 8-bit bytes (most-significant-byte first). The A/D 
conversion is accomplished using successive- 
approximation technique and employing a high- 
impedance chopper-stabilized comparator, a 256R 
end-compensated voltage divider with analog switch 
tree, and a successive-approximation register (SAR). 
These methods eliminate the possibility of missing 
codes, nonmonotonicity, and a need for zero or 
full-scale adjustment. Positive and negative reference 
inputs make possible ratiometric conversion and 
reference isolation from supply noise. 



N DUAL-IN-LINE PACKAGE (Top view) 



Vref- 

GROUND (GND) 

DIGITAL I/O DO 

DIGITAL i/0 D1 

DIGITAL I/O D2 

(Digital) INPUT D3 

(Digital) INPUT D4 

(Digital) INPUT D5 
-1 

(MSB) 2 

-2 

2 

-3 

D 2 
A 

T -4 
A 



B 

U 2 
S 



(LSB) 2 
READ/WRITE (R/W) 
CLOCK 

REGISTER SELECT (RSL) 
CHIP SELECT (CS) 



E 
E 
E 
E 
E 
E 
E 
E 
E 

E 
E 
E 
E 
E 
E 
E 
E 
E 
E 



u 



Vref + 
1 SUPPLY (Vcc) 



3 

3 

38 I INTERRUPT REQUEST (IRQ) 
37 I MULTIPLEXER OUTPUT (MO) 
36 j 

3 
B 

33 j 
32 j 

3 

3 

29 I 
28 j 

3 

26 j INPUT A11/D11 (Analog/Digital) 

"^5^ INPUT A12/D12 (Analog/Digital) 

^Tj INPUT A13/D13 (Analog/Digital) 

23 j INPUT A14/D14 (Analog/Digital) 

22^ INPUT A15/D15 (Analog/Digital) 

3 



INPUT AO (Analog) 
INPUT A2 (Analog) 
INPUT A3 (Analog) 
INPUT A4 (Analog) 
INPUT A5 (Analog) 
INPUT A6 (Analog) 
INPUT A7 (Analog) 
INPUT A8 (Analog) 
INPUT A9 (Analog) 
INPUT A10/D10 (Analog/Digital) 



RESET 




g^i Texas Instruments 



INCORPORATED 
POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 

2866 ® IC MASTER 1983 



Data Acquisition Circuits 



8-Bit analog-to-digital converter with 
5 analog and 6 multipurpose inputs 

Type TL532N 



Features 

• 8 Bit Resolution 

• Total Unadjusted Error: ±1/2 LSB Max for TL532 
(±1 LSB Max for TL533) 

o 5 Analog Inputs 

• 6 Multipurpose Analog or Digital Inputs 

• Three-state, Bidirectional Data Bus 

• Access & Conversion in 300 fiSec @ 85°C 
« 12-Channel On-Chip Analog Multiplexer 

o Ratiometric Conversion 
o Single 5-Volt Supply 

o Low Power Consumption of 15 mW, Typical 

o Three 16-Bit Data Registers 

o Software Compatible with Larger 21-lnput Version, 
TL530 

o Pin-for-Pin Replacement for 74C934 
Description 

The TL532 is a monolithic CMOS device with 
12-channel analog multiplexer, 8-Bit ratiometric 
analog-to-digital (A/D) converter, a register to store 
digital data from 6 multipurpose inputs, a 
TTL-Compatible 8-pin input/output data port, and 
microprocessor-compatible control logic. Three on-chip 
data registers store control, conversion-results, and 
digital data that can be accessed via the IC's data port 
in two 8-bit bytes (most-significant-byte first). The A/D 
conversion is accomplished using successive- 
approximation technique and employing a high- 
impedance chopper-stabilized comparator, a 256R 
end-compensated voltage divider with analog switch 
tree, and a successive-approximation register (SAR). 
These methods eliminate the possibility of missing 
codes, nonmonotonicity, and a need for zero or 
full-scale adjustment. Positive and negative reference 
inputs'make possible ratiometric conversion and 
reference isolation from supply noise. 



N DUAL-IN-LINE PACKAGE (Top view) 



GROUND (GNO) 
-1 

MSB 2 

-2 



D 

A -4 
I ^ 

-5 
S -6 



-7 



-8 



MSB 2 
READ/WRITE (R/W) 
CLOCK 

REGISTER SELECT (RSL) 



CHIP SELECT (CS) 



•I 


1 j 


2 




3 




4 




5 




6 




7 




8 




9 




10 




11 
12 




13 
14 





3 



Vref + 

SUPPLY (Vcc) 

INPUT AO (Analog) 

INPUT A2 (Analog) 

INPUT A3 (Analog) 

INPUT A4 (Analog) 

INPUT AS (Analog) 

INPUT A10/D10 (Analog/Digita 

INPUT A11/D11 (Analog/Dlglta 

INPUT A12/D12 (Analog/Diglta 

INPUT A13/D13 (Analog/Dlglta 

INPUT A14/D14 (Analog/Dlgita 

INPUT A15/D15 (Analog/Dlgita 



RESET 




g^i Texas Instruments 



INCORPORATED 

POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 

© IC MASTER 1983 2867 



Data Acquisition Circuits 

from Ibxas Instruments 



8-Bit analog-to-digital converter with 
5 analog and 6 multipurpose inputs 

TypeTL533N 



CO 

c 



E 

v_ 
•+-• 

_c 

CO 
CO 
X 
CD 
\- 



Features 

• 8 Bit Resolution 

• Total Unadjusted Error: ±1 LSB Max for TL533 
(±1/2 LSB Max for TL532) 

• 5 Analog Inputs 

• 6 Multipurpose Analog or Digital Inputs 

• Three-state, Bidirectional Data Bus 

• Access & Conversion in 300 pSec @ 85°C 

• 12-Channel On-Chip Analog Multiplexer 

• Ratiometric Conversion 

• Single 5-Volt Supply 

• Low Power Consumption of 15 mW, Typical 

• Three 16-Bit Data Registers 

• Software Compatible with Larger 21 -Input Versions, 
TL531 

• TL533 is a Pin-Compatible, Functional 
Replacement for 74C934 



Description 

The TL533 is a monolithic CMOS device with 
12-channel analog multiplexer, 8-Bit ratiometric 
analog-to-digital (A/D) converter, a register to store 
digital data from 6 multipurpose inputs, a 
TTL-Compatible 8-pin input/output data port, and 
microprocessor-compatible control logic. Three on-chip 
data registers store control, conversion-results, and 
digital data that can be accessed via the IC's data port 
in two 8-bit bytes (most-significant-byte first). The A/D 
conversion is accomplished using successive- 
approximation technique and employing a high- 
impedance chopper-stabilized comparator, a 256R 
end-compensated voltage divider with analog switch 
tree, and a successive-approximation register (SAR). 
These methods eliminate the possibility of missing 
codes, nonmonotonicity, and a need for zero or 
full-scale adjustment. Positive and negative reference 
inputs make possible ratiometric conversion and 
reference isolation from supply noise. 



N DUAL-IN-LINE PACKAGE (Top view) 



Vref- 

GROUND (GND) 
-1 

MSB 2 

-2 



D 
A 

I 2 



B 2 
U 

S -6 



-8 



MSB 2 



READ/WRITE (R/W) 
CLOCK 

REGISTER SELECT (RSL) 



CHIP SELECT (CS) 



1 


u 


2 




3 




4 




5 




6 




7 




8 
9 




10 
11 
12 


■ 


13 
14 





Vref + 

SUPPLY (Vce) 
INPUT AO (Analog) 
INPUT A2 (Analog) 
INPUT A3 (Analog) 
INPUT A4 (Analog) 
INPUT AS (Analog) 
INPUT A10/D10 (Analog/Digital 
INPUT A11/D11 (Analog/Digital 
INPUT A12/D12 (Analog/Digital 
INPUT A13/013 (Analog/Digital; 
INPUT A14/D14 (Analog/Digita 
INPUT A15/D15 (Analog/Digital; 
RESET 




'np\ Texas Instruments 

''^Z I INCORPORATED 

POST OFFICE BOX 225612 • DALLAS, TEXAS 75265 

2868 



© IC MASTER 1983 



WESTERN DiGiTAL 

CORPORAT/ON 

WD2501/2511 Packet Network Interface (LAP/LAPB) 



FEATURES 

• Packet switching controller, compatible with 
CCITT recommendation X.25, level 2, LAP (2501) or 
LAPB (2511) 

• Programmable primary timer (T1) and retrans- 
mission counter (N2) 

• Programmable A-field which provides a wider 
range of applications than defined by X.25. These 
include: DTE-to-DTE connection, multipoint and 
loop-back testing 

• Direct memory access (DMA) transfer two 
channels; one for transmit and one for receive. 
Send/receive data accessed by indirect addressing 
method. Sixteen output address lines. 

• Zero bit insert and delete 

• Automatic appending and testing of PCS field 

• Computer bus interface structure: 8 bit bi- 
directional data bus. CS, WE, RE and four input 
address lines 

• DC to 1.1 MBPS data rate 



• TTL compatible 

• 48 pin dual in-line packages 

• Higher bit rates available by special order 

APPLICATIONS 

X.25 PACKET SWITCHING CONTROLLER 
PART OF DTE OR DOE 
PRIVATE PACKET NETWORKS 
LINK LEVEL CONTROLLER 



GENERAL DESCRIPTION 

The WD2501/251 1 is a MOS/LSI device which handles 
bit-oriented, full-duplex serial data communications 
with DMA, which conforms to CCITT X.25 with 
programmable enhancements. 

The device is fabricated in N-Channel silicon gate 
MOS technology and is TTL compatible on all inputs 
and outputs. 



CO 

Q 

c 
1- 

0) 

-t— « 
0) 
<D 



no connection 
repTv 

WE 



CLK 



DALO 
DAL1 
DAt2 
DAL3 
DAL4 
DAL5 
DAL6 
DAL7 
RD 
RC 



(GNO)VsS C 
TCC 



RTS 

erg 

DRQO 
DROi 



□ Vcc( + 5V) 

□ lAl 
3 lAO 
3 IA2 
] IA3 
jiNTR 

D V[30(+12V) 

□ A5 
3 A4 
J A3 
3A2 
3 A15 
3 A14 
3 A13 
3 A12 
3 A11 
3 A10 
3 A9 
3 A8 
3A7 
3 A6 
3 AO 

3A1 

3DACK 



IA0-IA3 - 
I7ITR ■ 



READ/ 
WRITE 
CONTROL 



REGISTERS 
(16 X 8) 



NTERNAL 
REGISTERS 
(11X8) 



CENTRAL 
MICRO- 
CONTROLLER 



DATA/CONTROL BUS 



• DRQO 
■ DRQI 
. DACK 



TRANSMITTER 



TC 
CTS 

- HTs 



PIN DESIGNATION BLOCK DIAGRAM 



© IC MASTER 1983 



2869 



WESTERN DiGtTAL 

C O R P O R A T / O N 

WD2520 CCITT #7 Data Link Controller 



M FEATURES 

t^l • Performs the controls of the Message Transfer 

■ part of CCITT #7. 

H • Dual Channel DMA for full-duplex operation. 

— • Unique memory access method for buffer 

^ management. 

~ • All formatting of bit-oriented control included: zero 

" bit insertion and deletion. Automatic appending 

E and testing of flags and FCS Fields. 

to • Automatic control of sequence numbers FSN and 
^ BSN, and of control bits FIB and BIB. 

• Optional selection of either "Basic" error correc- 
tion method or the preventive cyclic retransmis- 
sion error correction method. 

• Computer bus interface structure: 8-bit bi- 
directional data bus. 16-bit address bus for DMA. 4- 
bit input address bus (may be tied to lower 4 bits of 
16 bit address). CS, RE, WE. 

• TTL compatible. 

• Speeds to 1 MBit/Sec Transmit-Receive Rate. 



GENERAL DESCRIPTION 

The WD2520 is a MOS LSI device which is com- 
patible with the CCITT Recommendation #7 (Signal- 
ling System Number 7). The overall objective of 
Signalling System #7 is to provide one internationally 
standardized general purpose common channel sig- 
nalling system for information transfer within tele- 
communications networks. (i;e. signalling from one 
central office switch to another). 

The WD2520 performs most of the controls of the 
Message Transfer Part of CCITT#7. The device in- 
cludes a unique buffer management scheme with 
dual channel DMA. 

The WD2520 is pin-for-pin compatible with the 
WD2501/2511 popular Level 2 X.25 controller. 



NO CONNE CTION 
REPLY 
WE 
CS 
RE 
G_LK 
MR 
DALO 
DAL1 
DAL2 
DAL3 
DAL4 
DAL5 
DAL6 
DAL7 
RD 
RC 

(GND)Vss 
1 TO 
TP 
RTS" 
GTS 
PROG 
PRQI 



Vcg( + 5V) 
IA1 
I AO 
IA2 
I A3 
INTR 

Vdp(+12V) 
A5 





CLK 
GND 



ZERO 




" 1 

RR 1 
8| 8> 8 




TR8 




t . 


ZERO 


DELETE 








INSERT 



PIN DESIGNATION 



BLOCK DIAGRAM 



2870 



® IC MASTER 1983 



WESTERN DiGiTAL 



O R 



O R 



T / 



O N 



UC1671 ASTRO 



FEATURES 

SYNCHRONOUS AND ASYNCHRONOUS 

• Full Duplex Operations 

SYNCHRONOUS MODE 

• Selectable 5-8 Bit Characters 

• Two Successive SYN Characters Sets 
Synchronization 

• Programmable SYN and DLE Character 
Stripping 

• Programmable SYN and DLE-SYN Fill 

ASYNCHRONOUS MODE 

• Selectable 5-8 Bit Characters 

• Line Break Detection and Generation 

• 1-, Vh; or 2-Stop Bit Selection 

• False Start Bit Detection Automatic Serial 
Echo Mode 

SYSTEM COMPATIBILITY 

• Double Buffering of Data 

• 8-Bit Bi-Directional Bus For Data, Status, 
and Control Words 

• All Inputs and Outputs TTL Compatible 

• Up to 32 ASTROS Can Be Addressed On Bus 

• On-Line Diagnostic Capability 

TRANSMISSION ERROR DETECTION-PARITY 

• Overrun and Framing 

BAUD RATE — DC TO 1M BIT/SEC 



8 SELECTABLE CLOCK RATES 

• Accepts 1X Clock and Up to 4 Different 32X 
Baud Rate Clock Inputs 

• Up to 47% Distortion Allowance with 
32X Clock 

APPLICATIONS 

SYNCHRONOUS COMMUNICATIONS 
ASYNCHRONOUS COMMUNICATIONS 
SERIAL/PARALLEL COMMUNICATIONS 



CO 
>*-• 

Q 

c 



-4— • 

w 





GENERAL DESCRIPTION 

The UC1671 (ASTRO) is a MOS/LSI device which 
performs the functions of interfacing a serial data 
communication channel to a parallel digital system. 
The device is capable of full duplex communications 
(receiving and transmitting) with synchronous or 
asynchronous systems. The ASTRO is designed to 
operate on a multiplexed bus with other bus-oriented 
devices. Its operation is programmed by a processor 
or controller via the bus and all paraMel data transfers 
with these machines are accomplished over the bus 
lines. 

The ASTRO is fabricated in n-channel silicon gate 
MOS technology and is TTL compatible on all inputs 
and outputs. 



(-5 V) VbB C 

c 
c 
c 
c 
i: 



lACKI 
CS 
WE 



lACKO 
RPLY 
INTR 
DALO 
DAL1 
DAL2 
DAL3 
DAL4 
DAL5 
DAL6 
DAL7 
DTR(CD) 
ID7 

RING (CE) 
MISC 
(GND)Vss 



1 
2 
3 
4 
5 
6 
7 
8 
9 
10 
11 
12 
13 
14 
15 
16 
17 
18 
19 
d20 



UC1671 



□ Vdd (+12V) 

□ RE 

□ RTS (CA) 

□ TDATA (BA) 

□ CTS(CB) 

□ IXTC(DB) 

□ IXRC(DD) 
H R4 

□ R3 

□ R2 

□ R1 



II CARR (CF) 

□ DSR (CC) 

□ RDATA (BB) 
II 103 

D ID4 

□ IDS 

□ "mr 

□ Td6 

□ Vcc (*5V) 



TRANSMITTER 
HOLDING REG 



TDATA 

A 



STATUS REG 



CLOCK 
CONTROL 



IXRC 
IXTC 



COMPARATOR 



RECEIVER 
HOLDING REG 



RECEIVER 
- REG 



COMMUNICATION 
CHANNEL CONTROL 



PIN DESIGNATION 



TTTTT 



9 ° Q 5 



MISC 

CARR- 

RING 

DTR 

DSR 

CTS 

RTS 

MR 

Tntr 

RPLY 
lACKO 
lACKI 
WE 



© iC MASTER 1983 



2871 



WESTERN DiGiTAL 

C ORPORATf ON 

TR1863/TR1865 
Universal Asynchronous Receiver/Transmitter (UART) 



FEATURES 

SINGLE POWER SUPPLY 



+ 5VDC 



D.C. TO 1 MHZ (64 KB) (STANDARD PART) 
TR1 863/5 

FULL DUPLEX OR HALF DUPLEX OPERATION 

AUTOMATIC INTERNAL SYNCHRONIZATION 
OF DATA AND CLOCK 

AUTOMATIC START BIT GENERATION 

EXTERNALLY SELECTABLE 
Word Length 
Baud Rate 

Even/Odd Parity (Receiver/Verification — 

Transmitter/Generation) 

Parity Inhibit 

One, One and One-Half, or Two Stop Bit 
Generation (1 at 5 Bit Level) 

AUTOMATIC DATA RECEIVED/TRANSMITTED 

STATUS GENERATION 

Transmission Complete 

Buffer Register Transfer Complete 

Received Data Available 

Parity Error 

Framing Error 

Overrun Error 

BUFFERED RECEIVER AND TRANSMITTER 
REGISTERS 



THREE-STATE OUTPUTS 
Receiver Register Outputs 
Status Flags 

TTL COMPATIBLE 

TR1865 HAS PULL-UP RESISTORS ON ALL 
INPUTS 



APPLICATIONS 

PERIPHERALS 
TERMINALS 
MINICOMPUTERS 
FACSIMILE TRANSMISSION 
MODEMS 

CONCENTRATORS 

ASYNCHRONOUS DATA MULTIPLEXERS 

CARD AND TAPE READERS 

PRINTERS 

DATA SETS 

CONTROLLERS 

KEYBOARD ENCODERS 

REMOTE DATA ACQUISITION SYSTEMS 

ASYNCHRONOUS DATA CASSETTES 



vcc 


C 


1. 




40 




TRC 


NC 


C 


2 


39 


3 


EPE 


vss 


c 


3 


38 


□ 


WLSi 


RRD 


c 


4 


37 


□ 


WLS2 


RR8 


c 


5 


36 


□ 


BBS 


RR7 


c 


6 


35 


□ 


PI 


RR6 


c 


7 


34 


□ 


CRL 


RR5 


c 


8 


33 


□ 


TR8 


RR4 


c 


9 




32 




TR7 




RR3 


c 


10 




31 




TR6 


RR2 


c 


11 




30 


□ 


TR5 


RRl 


c 


12 




29 


□ 


TR4 






PE 


c 


13 


28 


□ 


TR3 


FE 


c 


14 


27 


□ 


TR2 


OE 


c 


15 


26 




TRi 


SFD 


c 


16 


25 


□ 


TRO 


RRC 


c 


17 


24 




TRE 


DRR 


c 


18 


23 


□ 


THRL 


DR 


c 


19 


22 




THRE 


Rl 


c 


20 


21 


3 


MR 



PIN DESIGNATION 



RRD ^ 



Rl 



RRC. 



.DR 



DRR. 



.OE 



,FE 



SFD, 



A A A A A A ▲ 



RECEIVER HOLDING 
REGISTER 



RECEIVER REGISTER 



RECEIVER 
TIMING AND 
CONTROL 



VCC( + 5V). 



VSS(GND) 



V V W V W w V V 



CONTROL 
REGISTER 



i\ i\ i\ i\ i\ [\ 





TRA 
HOL 
REC 


^NSMITTER 

.DING 

JISTER 






TRANSMITTER 
REGISTER 



THRL 



-TRO 



TRANSMITTER 
TIMING AND 
CONTROL 



TRC 
'THRE 

'TRE 



BLOCK DIAGRAM 



2872 



© 10 MASTER 1983 



WESTERN DiGiTAL 



O R 



O R 



T / 



O N 



WD8250 Asynchronous Communications Element 



FEATURES 

• Designed to be Easily Interfaced to Most Pop- 
ular Microprocessors (Z-80, 8080A, 6800, etc.) 

• Full Double Buffering 

• Independently Controlled Transmit, Receive, 
Line Status, and Data Set Interrupts 

• Programmable Baud Rate Generator Allows 
Division of Any Input Clock by 1 to (2^^ - 1) 
and Generates the Internal 16x Clock 

• Independent Receiver Clock Input 

• Fully Programmable Serial-Interface 
Characteristics 

—5-, 6-, 7-, or 8-Bit Characters 

— Even, Odd, or No-Parity Bit Generation and 
Detection 

— 1-, 1 V2-, or 2-Stop Bit Generation 

— Baud Rate Generation (DC to 56K Baud) 

• False Start Bit Detector 

• Complete Status Reporting Capabilities 

• THREE-STATE TTL Drive Capabilities for Bi- 
directional Data Bus and Control Bus 

• Line Break Generation and Detection 

• Internal Diagnostic Capabilities 

— Loopback Controls for Communications 
Link Fault Isolation 

— Break, Parity, Overrun, Framing Error 
Simulation 



• Full Prioritized Interrupt System Controls 

• Single 5-Volt Power Supply 

GENERAL DESCRIPTION 

The WD8250 is a programmable Asynchronous 
Communication Element (ACE) in a 40-pin pack- 
age. The device is fabricated in N/MOS silicon 
gate technology. 

The ACE is a software-oriented device using a 
three-state 8-bit bi-directional data bus. 

The ACE is used to convert parallel data to a serial 
format on the transmit side, and convert serial 
data to parallel on the receiver side. The serial 
format, in order of transmission and reception, is 
a start bit, followed by five to eight data bits, a 
parity bit (if programmed) and one, one and one 
half (five bit format only) or two stop bits. The 
maximum recommended data rate is 56K baud. 

Internal registers enable the user to program 
various types of interrupts, modem controls, and 
character formats. The user can read the status of 
the ACE at any time monitoring Word conditions, 
interrupts and modem status. 

An additional feature of the ACE is a program- 
mable baud rate generator that is capable of 
dividing an internal XTAL or TTL signal clock by a 
division of 1 to 2^^ - 1. 

The ACE is designed to work in either a polling or 
interrupt driven system, which is programmable 
by users software controlling an internal register. 




C^2 — 

BAUDCSUT 



HLSD 

DSR 

CTS 

MR 

OUT1 

DTR 

HTS 

0Ut2 

INTRPT 



ADS 

CSOUT 

DDIS 



PIN DESIGNATION 



SELECT AND 

CONTROL 

LOGIC 



MODEM 
CONTROL 
AND STATUS 
LOGIC 



INTERRUPT 
ENABLE AND 
CONTROL 



TO FROM 
PERIPHERAL 
MODEM OR 
DATA SET 



MODEM-CONTROL 
FUNCTIONS 
TO FROM MODEM 
OR DATA SET 



BLOCK DIAGRAM 



© IC MASTER 1983 



2873 



WESTERN DiGiTAL 

C O R P O R A T / ON 

WD1943(8116)/WD1945(8136) Dual Baud Rate Clock 



FEATURES 

• 16 SELECTABLE BAUD RATE CLOCK FREQUENCIES 

• OPERATES WITH CRYSTAL OSCILLATOR OR EX- 
TERNALLY GENERATED FREQUENCY INPUT 

• ROM MASKABLE FOR NON-STANDARD FREQUENCY 
SELECTIONS 

• INTERFACES EASILY WITH MICROCOMPUTERS 

• OUTPUTS A 50% DUTY CYCLE CLOCK WITH 0.01 % 
ACCURACY 

• 6 DIFFERENT FREQUENCY/DIVISOR PAIRS 
AVAILABLE 

• SINGLE -f5V POWER SUPPLY 

• COMPATIBLE WITH B